[clang] [clang] Set end loc on declspec() (PR #177001)

Alexander Richardson via cfe-commits cfe-commits at lists.llvm.org
Fri Oct 9 10:53:28 PDT 2026


arichardson wrote:

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#### Stack

- `main`
- #227514
- #227562
- (not submitted) [RISC-V][MC][RVY] Introduce support for the Zyhybrid extension
- #177073
- #203598
- #177074
- ➡️ **#177001**
- (not submitted) [RISC-V][MC] Support RVY jumps
- (not submitted) [RISC-V][MC] Support Zaamo, Zalrsc, and Zabha in RVY mode
- #171739
- (not submitted) [RISC-V][MC][RVY] Support Zyhybrid mode switching in AsmParser
- (not submitted) [RISC-V][MC][RVY] Add capability atomic instructions (lr.y, sc.y, amoswap.y)
- (not submitted) [RISC-V][MC][RVY] Add Zba capability address generation instructions
- (not submitted) [RISC-V][MC][RVY] Add Zcb MC test coverage
- (not submitted) [RISC-V][MC][RVY] Support Zicbom, Zicboz, and Zicbop in RVY mode
- (not submitted) [RISC-V][MC][RVY] Add c.ymv compressed capability move instruction
- (not submitted) [RISC-V][MC][RVY] Add RVY and Zyhybrid CSR definitions
- (not submitted) [RISC-V][MC][RVY] Support vector loads and stores in RVY mode
- #177192
- (not submitted) [SelectionDAG] Support ISD::PTRADD with CHERI capability base pointers
- (not submitted) [RISC-V][RVY] Add basic support for passing and returning capabilities
- (not submitted) [RISC-V][RVY] Add ISel support for RVY load+store
- (not submitted) [RISC-V][RVY] Add support for lowering NULL values
- (not submitted) [RISC-V][RVY] Support codegen for ptradd with CHERI capabilities
- (not submitted) [RISC-V][RVY] Add tests for integer and FP loads and stores via capabilities
- (not submitted) [RISC-V][RVY] Support indirect branches and calls with capabilities
- (not submitted) [RISC-V][RVY] Support integer atomic operations via capability pointers
- (not submitted) [RISC-V][RVY] Support select with CHERI capabilities
- (not submitted) [RISC-V][RVY] Support frameaddress, returnaddress, and thread.pointer
- (not submitted) [RISC-V][MC] Add MC support for the experimental Zabhlrsc extension
- (not submitted) [RISC-V][ISel] Add CodeGen support for the experimental Zabhlrsc extension
- (not submitted) [RISC-V][MC][RVY] Add support for the Zylg extension
- (not submitted) [RISC-V][MC][RVY] Support Zcmp and Zcmt in RV32Y mode
- (not submitted) [RISC-V][MC][RVY] Add Hypervisor (H) extension support
- (not submitted) [RISC-V][MC][RVY] Support Zacas and Zalasr in RVY mode
- (not submitted) [RISC-V][MC][RVY] Add support for the Zybndsrdw extension
- (not submitted) [RISC-V][RVY] Support Zba capability address generation in CodeGen
- (not submitted) [RISC-V][RVY] Support Zacas and Zalasr atomic operations via capability pointers
- (not submitted) [RISC-V][RVY] Support Zicbop prefetch CodeGen with capability pointers
- (not submitted) [SelectionDAG] Support constant pools and jump tables with CHERI capabilities
- (not submitted) [RISC-V][RVY] Support globals, constant pools, block addresses, and jump tables
- (not submitted) [SelectionDAG] Support CHERI capabilities in refineUniformBase
- (not submitted) [RISC-V][RVY] Support RVV vector loads and stores via capability pointers
- (not submitted) [SelectionDAG] Support ptrtoaddr, ptrtoint, inttoptr, ptrmask, and icmp for CHERI capabilities
- (not submitted) [RISC-V][RVY] Support ptrtoaddr, ptrtoint, inttoptr, ptrmask, and icmp
- (not submitted) [AtomicExpand][SelectionDAG] Support atomic operations on CHERI capabilities
- (not submitted) [RISC-V][RVY] Support capability atomic load, store, swap, and cmpxchg

<sub>Managed by [nspr](https://github.com/arichardson/nspr). Each pull request shows only its own changes.</sub>
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https://github.com/llvm/llvm-project/pull/177001


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