[clang] 2e61419 - [ARM][AArch64] Introduce the Armv9.8-A architecture version (#229361)
via cfe-commits
cfe-commits at lists.llvm.org
Fri Oct 9 06:49:21 PDT 2026
Author: Jonathan Thackray
Date: 2026-10-09T14:48:53+01:00
New Revision: 2e614194f7d41c786ce3c28ee8c10653410e32e0
URL: https://github.com/llvm/llvm-project/commit/2e614194f7d41c786ce3c28ee8c10653410e32e0
DIFF: https://github.com/llvm/llvm-project/commit/2e614194f7d41c786ce3c28ee8c10653410e32e0.diff
LOG: [ARM][AArch64] Introduce the Armv9.8-A architecture version (#229361)
This introduces the Armv9.8-A architecture version, including the
relevant command-line option for -march.
More details about the Armv9.8-A architecture version can be found at:
*
https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2026
*
https://support.arm.com/documentation/109697/2026_09/2026-Architecture-Extensions
*
https://support.arm.com/documentation/109697/2026_09/Future-Architecture-Technologies
* https://support.arm.com/documentation/ddi0602/2026-09/
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Added:
clang/test/Driver/aarch64-v98a.c
Modified:
clang/docs/ReleaseNotes.md
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/Basic/Targets/ARM.cpp
clang/test/CodeGen/arm-acle-coproc.c
clang/test/Driver/arm-cortex-cpus-1.c
clang/test/Preprocessor/aarch64-target-features.c
clang/test/Preprocessor/arm-target-features.c
llvm/docs/ReleaseNotes.md
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/include/llvm/TargetParser/ARMTargetParser.def
llvm/include/llvm/TargetParser/Triple.h
llvm/lib/Target/AArch64/AArch64Features.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/ARMArchitectures.td
llvm/lib/Target/ARM/ARMFeatures.td
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
llvm/lib/TargetParser/ARMTargetParser.cpp
llvm/lib/TargetParser/ARMTargetParserCommon.cpp
llvm/lib/TargetParser/Triple.cpp
llvm/unittests/TargetParser/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/clang/docs/ReleaseNotes.md b/clang/docs/ReleaseNotes.md
index 331743b519eb19..b5a6679e443d08 100644
--- a/clang/docs/ReleaseNotes.md
+++ b/clang/docs/ReleaseNotes.md
@@ -1004,6 +1004,9 @@ features cannot lower the translation-unit ABI level;
- C2-Pro (`c2-pro`).
- C2-Ultra (`c2-ultra`).
+- Assembler/disassembler support has been added for Armv9.8-A (2026)
+ architecture extensions.
+
- Added support for pointer authentication discrimination of C++ virtual table
pointers stored in VTTs via the `-fptrauth-vtt-vtable-pointer-discrimination`
option.
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp
index a4841514be35e4..3c53acb8cee4e6 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -400,6 +400,12 @@ void AArch64TargetInfo::getTargetDefinesARMV97A(const LangOptions &Opts,
getTargetDefinesARMV96A(Opts, Builder);
}
+void AArch64TargetInfo::getTargetDefinesARMV98A(const LangOptions &Opts,
+ MacroBuilder &Builder) const {
+ // Armv9.8-A does not have a v8.* equivalent, but is a superset of v9.7-A.
+ getTargetDefinesARMV97A(Opts, Builder);
+}
+
void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Target identification.
@@ -766,6 +772,8 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
getTargetDefinesARMV96A(Opts, Builder);
else if (*ArchInfo == llvm::AArch64::ARMV9_7A)
getTargetDefinesARMV97A(Opts, Builder);
+ else if (*ArchInfo == llvm::AArch64::ARMV9_8A)
+ getTargetDefinesARMV98A(Opts, Builder);
// All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8|16) builtins work.
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
@@ -1279,6 +1287,9 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
if (Feature == "+v9.7a" &&
ArchInfo->Version < llvm::AArch64::ARMV9_7A.Version)
ArchInfo = &llvm::AArch64::ARMV9_7A;
+ if (Feature == "+v9.8a" &&
+ ArchInfo->Version < llvm::AArch64::ARMV9_8A.Version)
+ ArchInfo = &llvm::AArch64::ARMV9_8A;
if (Feature == "+v8r")
ArchInfo = &llvm::AArch64::ARMV8R;
if (Feature == "+fullfp16") {
diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h
index 3ccfa265399bea..ed5c0559f460e3 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -185,6 +185,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
MacroBuilder &Builder) const;
void getTargetDefinesARMV97A(const LangOptions &Opts,
MacroBuilder &Builder) const;
+ void getTargetDefinesARMV98A(const LangOptions &Opts,
+ MacroBuilder &Builder) const;
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index 0e424d031700ba..091df5ff828475 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -196,6 +196,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "9_6A";
case llvm::ARM::ArchKind::ARMV9_7A:
return "9_7A";
+ case llvm::ARM::ArchKind::ARMV9_8A:
+ return "9_8A";
case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -869,6 +871,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_5A:
case llvm::ARM::ArchKind::ARMV9_6A:
case llvm::ARM::ArchKind::ARMV9_7A:
+ case llvm::ARM::ArchKind::ARMV9_8A:
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
break;
@@ -1040,6 +1043,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_5A:
case llvm::ARM::ArchKind::ARMV9_6A:
case llvm::ARM::ArchKind::ARMV9_7A:
+ case llvm::ARM::ArchKind::ARMV9_8A:
getTargetDefinesARMV83A(Opts, Builder);
break;
}
diff --git a/clang/test/CodeGen/arm-acle-coproc.c b/clang/test/CodeGen/arm-acle-coproc.c
index 000fff632f0b75..989bbd7c737543 100644
--- a/clang/test/CodeGen/arm-acle-coproc.c
+++ b/clang/test/CodeGen/arm-acle-coproc.c
@@ -27,6 +27,7 @@
// RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.7a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv9.8a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s
@@ -58,6 +59,7 @@
// RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.6a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.7a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv9.8a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s
// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
// RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
diff --git a/clang/test/Driver/aarch64-v98a.c b/clang/test/Driver/aarch64-v98a.c
new file mode 100644
index 00000000000000..b578c577d00a17
--- /dev/null
+++ b/clang/test/Driver/aarch64-v98a.c
@@ -0,0 +1,19 @@
+// ===== Base v9.8a architecture =====
+
+// RUN: %clang -target aarch64 -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s
+// RUN: %clang -target aarch64 -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s
+// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s
+// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s
+// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s
+// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A %s
+// GENERICV98A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.8a"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p3"{{.*}}
+
+// RUN: %clang -target aarch64_be -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s
+// RUN: %clang -target aarch64_be -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s
+// RUN: %clang -target aarch64 -mbig-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s
+// RUN: %clang -target aarch64 -mbig-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s
+// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s
+// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV98A-BE %s
+// GENERICV98A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.8a"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p3"{{.*}}
+
+// ===== Features supported on aarch64 =====
diff --git a/clang/test/Driver/arm-cortex-cpus-1.c b/clang/test/Driver/arm-cortex-cpus-1.c
index 08cb63b1a92302..535541bc2706cf 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -529,3 +529,19 @@
// RUN: %clang -target arm -march=armebv9.7a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s
// RUN: %clang -target arm -march=armebv9.7-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V97A %s
// CHECK-BE-V97A: "-cc1"{{.*}} "-triple" "armebv9.7{{.*}}" "-target-cpu" "generic"
+//
+// RUN: %clang -target armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s
+// RUN: %clang -target arm -march=armv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s
+// RUN: %clang -target arm -march=armv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s
+// RUN: %clang -target armv9.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s
+// RUN: %clang -target arm -march=armv9.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s
+// RUN: %clang -target arm -march=armv9.8-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V98A %s
+// CHECK-V98A: "-cc1"{{.*}} "-triple" "armv9.8{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armebv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s
+// RUN: %clang -target armv9.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s
+// RUN: %clang -target armeb -march=armebv9.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s
+// RUN: %clang -target armeb -march=armebv9.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s
+// RUN: %clang -target arm -march=armebv9.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s
+// RUN: %clang -target arm -march=armebv9.8-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V98A %s
+// CHECK-BE-V98A: "-cc1"{{.*}} "-triple" "armebv9.8{{.*}}" "-target-cpu" "generic"
diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c
index a3ded91d5695f4..5a7ada1a78fdcc 100644
--- a/clang/test/Preprocessor/aarch64-target-features.c
+++ b/clang/test/Preprocessor/aarch64-target-features.c
@@ -217,6 +217,7 @@
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s
// CHECK-SVE2: __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
// CHECK-SVE2: __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
@@ -698,6 +699,7 @@
// RUN: %clang -target aarch64-none-elf -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
// RUN: %clang -target aarch64-none-elf -march=armv9.6-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
// RUN: %clang -target aarch64-none-elf -march=armv9.7-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
+// RUN: %clang -target aarch64-none-elf -march=armv9.8-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s
// CHECK-V81-OR-LATER: __ARM_FEATURE_ATOMICS 1
// CHECK-V85-OR-LATER: __ARM_FEATURE_BTI 1
// CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1
diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index 689cd8184fd3b9..9db77507ab327b 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -939,6 +939,11 @@
// CHECK-V97A: #define __ARM_ARCH_9_7A__ 1
// CHECK-V97A: #define __ARM_ARCH_PROFILE 'A'
+// RUN: %clang -target armv9.8a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V98A %s
+// CHECK-V98A: #define __ARM_ARCH 9
+// CHECK-V98A: #define __ARM_ARCH_9_8A__ 1
+// CHECK-V98A: #define __ARM_ARCH_PROFILE 'A'
+
// RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s
// CHECK-SOFTVFP-NOT: #define __ARM_FP 0x
diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index ec8d5c679b5ea0..c648c07a6e71e5 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -257,6 +257,9 @@ Makes programs 10x faster by doing Special New Thing.
* Added support for C2-Pro and C2-Ultra CPUs.
+* Assembler/disassembler support has been added for Armv9.8-A (2026)
+ architecture extensions.
+
### Changes to the AMDGPU Backend
* Replaced `xnack` and `sramecc` target features with `amdgpu.xnack`
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 7dfd4f66782407..51ea58a3ec4132 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -124,9 +124,9 @@ struct ArchInfo {
// Defines the following partial order, indicating when an architecture is
// a superset of another:
//
- // v9.7a > v9.6a > v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
- // v v v v v
- // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > ... > v8a;
+ // v9.8a > v9.7a > v9.6a > v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
+ // v v v v v
+ // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > ...
//
// v8r has no relation to anything. This is used to determine which
// features to enable for a given architecture. See
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index 27dbfcaf07b42e..f3aab7cd34da92 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -192,6 +192,11 @@ ARM_ARCH("armv9.7-a", ARMV9_7A, "9.7-A", "+v9.7a", ARMBuildAttrs::CPUArch::v9_A,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
+ARM_ARCH("armv9.8-a", ARMV9_8A, "9.8-A", "+v9.8a", ARMBuildAttrs::CPUArch::v9_A,
+ FK_NEON_FP_ARMV8,
+ (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_FPV5_SP_D16,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h
index 98760af2ac296d..6fb2904def2e52 100644
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -120,6 +120,7 @@ class Triple {
enum SubArchType {
NoSubArch,
+ ARMSubArch_v9_8a,
ARMSubArch_v9_7a,
ARMSubArch_v9_6a,
ARMSubArch_v9_5a,
diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td
index 440151ae6f4e17..cda947c1bbea0b 100644
--- a/llvm/lib/Target/AArch64/AArch64Features.td
+++ b/llvm/lib/Target/AArch64/AArch64Features.td
@@ -617,6 +617,10 @@ def FeatureF16F32DOT : ExtensionWithMArch<"f16f32dot", "F16F32DOT", "FEAT_F16F32
def FeatureF16F32MM : ExtensionWithMArch<"f16f32mm", "F16F32MM", "FEAT_F16F32MM",
"Enable Armv9.7-A Advanced SIMD half-precision matrix multiply-accumulate to single-precision", [FeatureNEON, FeatureFullFP16]>;
+//===----------------------------------------------------------------------===//
+// Armv9.8 Architecture Extensions
+//===----------------------------------------------------------------------===//
+
//===----------------------------------------------------------------------===//
// Future Architecture Technologies
//===----------------------------------------------------------------------===//
@@ -1121,6 +1125,9 @@ def HasV9_7aOps : Architecture64<9, 7, "a", "v9.7a",
[HasV9_6aOps, FeatureSVE2p3, FeatureFPRCVT, FeatureF16F32DOT],
!listconcat(HasV9_6aOps.DefaultExts, [FeatureSVE2p3, FeatureFPRCVT,
FeatureF16F32DOT])>;
+def HasV9_8aOps : Architecture64<9, 8, "a", "v9.8a",
+ [HasV9_7aOps],
+ HasV9_7aOps.DefaultExts>;
def HasV8_0rOps : Architecture64<8, 0, "r", "v8r",
[ //v8.1
FeatureCRC, FeaturePAN, FeatureLSE, FeatureCONTEXTIDREL2,
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index aaa54e658bcc71..b2928485d46add 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3797,6 +3797,8 @@ static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {
Str += "ARMv9.6a";
else if (FBS[AArch64::HasV9_7aOps])
Str += "ARMv9.7a";
+ else if (FBS[AArch64::HasV9_8aOps])
+ Str += "ARMv9.8a";
else if (FBS[AArch64::HasV8_0rOps])
Str += "ARMv8r";
else {
diff --git a/llvm/lib/Target/ARM/ARMArchitectures.td b/llvm/lib/Target/ARM/ARMArchitectures.td
index 9e5bf00007f3f2..f2a0e29cabf805 100644
--- a/llvm/lib/Target/ARM/ARMArchitectures.td
+++ b/llvm/lib/Target/ARM/ARMArchitectures.td
@@ -313,6 +313,18 @@ def ARMv97a : Architecture<"armv9.7-a", "ARMv97a", [HasV9_7aOps,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
+def ARMv98a : Architecture<"armv9.8-a", "ARMv98a", [HasV9_8aOps,
+ FeatureAClass,
+ FeatureDB,
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureDSP,
+ FeatureTrustZone,
+ FeatureMP,
+ FeatureVirtualization,
+ FeatureCRC,
+ FeatureRAS,
+ FeatureDotProd]>;
def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
FeatureRClass,
FeatureDB,
diff --git a/llvm/lib/Target/ARM/ARMFeatures.td b/llvm/lib/Target/ARM/ARMFeatures.td
index 3797ae45a1f1e7..581f8c9590e4de 100644
--- a/llvm/lib/Target/ARM/ARMFeatures.td
+++ b/llvm/lib/Target/ARM/ARMFeatures.td
@@ -769,6 +769,11 @@ def HasV9_7aOps : SubtargetFeature<"v9.7a", "HasV9_7aOps", "true",
"Support ARM v9.7a instructions",
[HasV9_6aOps]>;
+// Armv9.8-A is a v9-only architecture.
+def HasV9_8aOps : SubtargetFeature<"v9.8a", "HasV9_8aOps", "true",
+ "Support ARM v9.8a instructions",
+ [HasV9_7aOps]>;
+
def HasV8_1MMainlineOps : SubtargetFeature<
"v8.1m.main", "HasV8_1MMainlineOps", "true",
"Support ARM v8-1M Mainline instructions",
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 0397eef92c8565..f51a8fd890f3e6 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -902,6 +902,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
case ARM::ArchKind::ARMV9_5A:
case ARM::ArchKind::ARMV9_6A:
case ARM::ArchKind::ARMV9_7A:
+ case ARM::ArchKind::ARMV9_8A:
S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
S.setAttributeItem(ARM_ISA_use, Allowed, false);
S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
diff --git a/llvm/lib/TargetParser/ARMTargetParser.cpp b/llvm/lib/TargetParser/ARMTargetParser.cpp
index 0da4c2a524b318..783150eef34f5d 100644
--- a/llvm/lib/TargetParser/ARMTargetParser.cpp
+++ b/llvm/lib/TargetParser/ARMTargetParser.cpp
@@ -88,6 +88,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
case ArchKind::ARMV9_5A:
case ArchKind::ARMV9_6A:
case ArchKind::ARMV9_7A:
+ case ArchKind::ARMV9_8A:
return 9;
case ArchKind::INVALID:
return 0;
@@ -128,6 +129,7 @@ static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
case ARM::ArchKind::ARMV9_5A:
case ARM::ArchKind::ARMV9_6A:
case ARM::ArchKind::ARMV9_7A:
+ case ARM::ArchKind::ARMV9_8A:
return ARM::ProfileKind::A;
case ARM::ArchKind::ARMV4:
case ARM::ArchKind::ARMV4T:
diff --git a/llvm/lib/TargetParser/ARMTargetParserCommon.cpp b/llvm/lib/TargetParser/ARMTargetParserCommon.cpp
index 6d824c78cab975..818fb64d2e10d2 100644
--- a/llvm/lib/TargetParser/ARMTargetParserCommon.cpp
+++ b/llvm/lib/TargetParser/ARMTargetParserCommon.cpp
@@ -47,6 +47,7 @@ StringRef ARM::getArchSynonym(StringRef Arch) {
.Case("v9.5a", "v9.5-a")
.Case("v9.6a", "v9.6-a")
.Case("v9.7a", "v9.7-a")
+ .Case("v9.8a", "v9.8-a")
.Case("v8m.base", "v8-m.base")
.Case("v8m.main", "v8-m.main")
.Case("v8.1m.main", "v8.1-m.main")
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index ef480281700f4f..4d17c36917f168 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -933,6 +933,8 @@ Triple::SubArchType Triple::parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v9_6a;
case ARM::ArchKind::ARMV9_7A:
return Triple::ARMSubArch_v9_7a;
+ case ARM::ArchKind::ARMV9_8A:
+ return Triple::ARMSubArch_v9_8a;
case ARM::ArchKind::ARMV8R:
return Triple::ARMSubArch_v8r;
case ARM::ArchKind::ARMV8MBaseline:
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 6162c2da7a55b1..95661bf4a007ea 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -50,7 +50,7 @@ const char *ARMArch[] = {
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
"armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
"armv9.4a", "armv9.5-a", "armv9.5a", "armv9.6a", "armv9.6-a",
- "armv9.7a", "armv9.7-a",
+ "armv9.7a", "armv9.7-a", "armv9.8a", "armv9.8-a",
};
std::string FormatExtensionFlags(int64_t Flags) {
@@ -664,6 +664,8 @@ TEST(TargetParserTest, testARMArch) {
ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(testARMArch("armv9.7-a", "generic", "v9.7a",
ARMBuildAttrs::CPUArch::v9_A));
+ EXPECT_TRUE(testARMArch("armv9.8-a", "generic", "v9.8a",
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "generic", "v8r", ARMBuildAttrs::CPUArch::v8_R));
EXPECT_TRUE(testARMArch("armv8-m.base", "generic", "v8m.base",
@@ -978,6 +980,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
case ARM::ArchKind::ARMV9_5A:
case ARM::ArchKind::ARMV9_6A:
case ARM::ArchKind::ARMV9_7A:
+ case ARM::ArchKind::ARMV9_8A:
EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
break;
default:
@@ -1350,6 +1353,7 @@ TEST(TargetParserTest, testAArch64Arch) {
EXPECT_TRUE(testAArch64Arch("armv9.5-a"));
EXPECT_TRUE(testAArch64Arch("armv9.6-a"));
EXPECT_TRUE(testAArch64Arch("armv9.7-a"));
+ EXPECT_TRUE(testAArch64Arch("armv9.8-a"));
}
bool testAArch64Extension(StringRef CPUName, StringRef ArchExt) {
@@ -1655,6 +1659,7 @@ TEST(TargetParserTest, AArch64ArchFeatures) {
EXPECT_EQ(AArch64::StrTab[AArch64::ARMV9_5A.ArchFeature], "+v9.5a");
EXPECT_EQ(AArch64::StrTab[AArch64::ARMV9_6A.ArchFeature], "+v9.6a");
EXPECT_EQ(AArch64::StrTab[AArch64::ARMV9_7A.ArchFeature], "+v9.7a");
+ EXPECT_EQ(AArch64::StrTab[AArch64::ARMV9_8A.ArchFeature], "+v9.8a");
EXPECT_EQ(AArch64::StrTab[AArch64::ARMV8R.ArchFeature], "+v8r");
}
@@ -1685,7 +1690,7 @@ TEST(TargetParserTest, AArch64ArchPartialOrder) {
for (const auto *A :
{&AArch64::ARMV9_1A, &AArch64::ARMV9_2A, &AArch64::ARMV9_3A,
&AArch64::ARMV9_4A, &AArch64::ARMV9_5A, &AArch64::ARMV9_6A,
- &AArch64::ARMV9_7A})
+ &AArch64::ARMV9_7A, &AArch64::ARMV9_8A})
EXPECT_TRUE(A->implies(AArch64::ARMV9A));
EXPECT_TRUE(AArch64::ARMV8_1A.implies(AArch64::ARMV8A));
@@ -1705,6 +1710,7 @@ TEST(TargetParserTest, AArch64ArchPartialOrder) {
EXPECT_TRUE(AArch64::ARMV9_5A.implies(AArch64::ARMV9_4A));
EXPECT_TRUE(AArch64::ARMV9_6A.implies(AArch64::ARMV9_5A));
EXPECT_TRUE(AArch64::ARMV9_7A.implies(AArch64::ARMV9_6A));
+ EXPECT_TRUE(AArch64::ARMV9_8A.implies(AArch64::ARMV9_7A));
EXPECT_TRUE(AArch64::ARMV9A.implies(AArch64::ARMV8_5A));
EXPECT_TRUE(AArch64::ARMV9_1A.implies(AArch64::ARMV8_6A));
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