[clang] [clang][SPIR-V] Add x86 calling conventions and sse/sse2 for MSVC hosts (PR #227665)

[Tom Honermann via cfe-commits]

tahonermann wrote:

@efriedma-quic,
> Instead of adding this to the SPIRV target, should we change the relevant Sema code to query the auxiliary target? See DiagIfDeviceCode().

There likely are opportunities for centralizing auxiliary target handling across the offload device architectures and languages. I don't know specifically though. Perhaps there is an opportunity to introduce an `AuxTargetInfo` or `OffloadTargetInfo` that associates a host and device target in a way that would be useful to all of CUDA, HIP, SYCL, etc... and PTX, AMDGPU, and SPIR-V. It could work somewhat like the `LinuxTargetInfo` and `WindowsTargetInfo` templates.

https://github.com/llvm/llvm-project/pull/227665