[clang] [RISCV] Re-generate rvp-intrinsics.c using common prefix. NFC (PR #227836)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Wed Sep 30 19:12:45 PDT 2026
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/227836
>From 7cc19173f42aead4e848091c262f04f5bc22e9d0 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 30 Sep 2026 12:33:38 -0700
Subject: [PATCH] [RISCV] Re-generate rvp-intrinsics.c using common prefix. NFC
The common prefix was added while widening unzip was in review.
---
clang/test/CodeGen/RISCV/rvp-intrinsics.c | 528 +++++++---------------
1 file changed, 168 insertions(+), 360 deletions(-)
diff --git a/clang/test/CodeGen/RISCV/rvp-intrinsics.c b/clang/test/CodeGen/RISCV/rvp-intrinsics.c
index b16415525a23a..0cd70e243182a 100644
--- a/clang/test/CodeGen/RISCV/rvp-intrinsics.c
+++ b/clang/test/CodeGen/RISCV/rvp-intrinsics.c
@@ -8803,153 +8803,89 @@ int32x2_t test_psati_i32x2(int32x2_t a) { return __riscv_psati_i32x2(a, 16); }
/* Packed Widening Unzip (32-bit) */
-// RV32-LABEL: define dso_local i32 @test_pwunzipe_i16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV32-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.psext.b.v2i16(<2 x i16> [[TMP0]])
-// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-// RV32-NEXT: ret i32 [[TMP2]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunzipe_i16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV64-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.psext.b.v2i16(<2 x i16> [[TMP0]])
-// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-// RV64-NEXT: ret i32 [[TMP2]]
+// CHECK-LABEL: define dso_local i32 @test_pwunzipe_i16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
+// CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.psext.b.v2i16(<2 x i16> [[TMP0]])
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
+// CHECK-NEXT: ret i32 [[TMP2]]
//
int16x2_t test_pwunzipe_i16x2(int8x4_t a) { return __riscv_pwunzipe_i16x2(a); }
-// RV32-LABEL: define dso_local i32 @test_pwunzipo_i16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV32-NEXT: [[SHR_I:%.*]] = ashr <2 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32
-// RV32-NEXT: ret i32 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunzipo_i16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV64-NEXT: [[SHR_I:%.*]] = ashr <2 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32
-// RV64-NEXT: ret i32 [[TMP1]]
+// CHECK-LABEL: define dso_local i32 @test_pwunzipo_i16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
+// CHECK-NEXT: [[SHR_I:%.*]] = ashr <2 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32
+// CHECK-NEXT: ret i32 [[TMP1]]
//
int16x2_t test_pwunzipo_i16x2(int8x4_t a) { return __riscv_pwunzipo_i16x2(a); }
-// RV32-LABEL: define dso_local i32 @test_pwunzipue_u16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV32-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.pzext.b.v2i16(<2 x i16> [[TMP0]])
-// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-// RV32-NEXT: ret i32 [[TMP2]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunzipue_u16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV64-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.pzext.b.v2i16(<2 x i16> [[TMP0]])
-// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-// RV64-NEXT: ret i32 [[TMP2]]
+// CHECK-LABEL: define dso_local i32 @test_pwunzipue_u16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
+// CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.riscv.pzext.b.v2i16(<2 x i16> [[TMP0]])
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
+// CHECK-NEXT: ret i32 [[TMP2]]
//
uint16x2_t test_pwunzipue_u16x2(uint8x4_t a) {
return __riscv_pwunzipue_u16x2(a);
}
-// RV32-LABEL: define dso_local i32 @test_pwunzipuo_u16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV32-NEXT: [[SHR_I:%.*]] = lshr <2 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32
-// RV32-NEXT: ret i32 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunzipuo_u16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV64-NEXT: [[SHR_I:%.*]] = lshr <2 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32
-// RV64-NEXT: ret i32 [[TMP1]]
+// CHECK-LABEL: define dso_local i32 @test_pwunzipuo_u16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
+// CHECK-NEXT: [[SHR_I:%.*]] = lshr <2 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHR_I]] to i32
+// CHECK-NEXT: ret i32 [[TMP1]]
//
uint16x2_t test_pwunzipuo_u16x2(uint8x4_t a) {
return __riscv_pwunzipuo_u16x2(a);
}
-// RV32-LABEL: define dso_local i32 @test_pwunziphe_i16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32
-// RV32-NEXT: ret i32 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunziphe_i16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32
-// RV64-NEXT: ret i32 [[TMP1]]
+// CHECK-LABEL: define dso_local i32 @test_pwunziphe_i16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
+// CHECK-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32
+// CHECK-NEXT: ret i32 [[TMP1]]
//
int16x2_t test_pwunziphe_i16x2(int8x4_t a) { return __riscv_pwunziphe_i16x2(a); }
-// RV32-LABEL: define dso_local i32 @test_pwunziphe_u16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32
-// RV32-NEXT: ret i32 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunziphe_u16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
-// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32
-// RV64-NEXT: ret i32 [[TMP1]]
+// CHECK-LABEL: define dso_local i32 @test_pwunziphe_u16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16>
+// CHECK-NEXT: [[SHL_I:%.*]] = shl <2 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHL_I]] to i32
+// CHECK-NEXT: ret i32 [[TMP1]]
//
uint16x2_t test_pwunziphe_u16x2(uint8x4_t a) {
return __riscv_pwunziphe_u16x2(a);
}
-// RV32-LABEL: define dso_local i32 @test_pwunzipho_i16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8>
-// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32
-// RV32-NEXT: ret i32 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunzipho_i16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8>
-// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32
-// RV64-NEXT: ret i32 [[TMP1]]
+// CHECK-LABEL: define dso_local i32 @test_pwunzipho_i16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8>
+// CHECK-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32
+// CHECK-NEXT: ret i32 [[TMP1]]
//
int16x2_t test_pwunzipho_i16x2(int8x4_t a) { return __riscv_pwunzipho_i16x2(a); }
-// RV32-LABEL: define dso_local i32 @test_pwunzipho_u16x2(
-// RV32-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8>
-// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32
-// RV32-NEXT: ret i32 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i32 @test_pwunzipho_u16x2(
-// RV64-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8>
-// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32
-// RV64-NEXT: ret i32 [[TMP1]]
+// CHECK-LABEL: define dso_local i32 @test_pwunzipho_u16x2(
+// CHECK-SAME: i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8>
+// CHECK-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i8> <i8 poison, i8 0, i8 poison, i8 0>, <4 x i8> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I_I]] to i32
+// CHECK-NEXT: ret i32 [[TMP1]]
//
uint16x2_t test_pwunzipho_u16x2(uint8x4_t a) {
return __riscv_pwunzipho_u16x2(a);
@@ -8957,305 +8893,177 @@ uint16x2_t test_pwunzipho_u16x2(uint8x4_t a) {
/* Packed Widening Unzip (64-bit) */
-// RV32-LABEL: define dso_local i64 @test_pwunzipe_i16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.psext.b.v4i16(<4 x i16> [[TMP0]])
-// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64
-// RV32-NEXT: ret i64 [[TMP2]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipe_i16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.psext.b.v4i16(<4 x i16> [[TMP0]])
-// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64
-// RV64-NEXT: ret i64 [[TMP2]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipe_i16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.psext.b.v4i16(<4 x i16> [[TMP0]])
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64
+// CHECK-NEXT: ret i64 [[TMP2]]
//
int16x4_t test_pwunzipe_i16x4(int8x8_t a) { return __riscv_pwunzipe_i16x4(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunzipo_i16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[SHR_I:%.*]] = ashr <4 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipo_i16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[SHR_I:%.*]] = ashr <4 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipo_i16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[SHR_I:%.*]] = ashr <4 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
int16x4_t test_pwunzipo_i16x4(int8x8_t a) { return __riscv_pwunzipo_i16x4(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunzipue_u16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.pzext.b.v4i16(<4 x i16> [[TMP0]])
-// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64
-// RV32-NEXT: ret i64 [[TMP2]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipue_u16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.pzext.b.v4i16(<4 x i16> [[TMP0]])
-// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64
-// RV64-NEXT: ret i64 [[TMP2]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipue_u16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.riscv.pzext.b.v4i16(<4 x i16> [[TMP0]])
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP1]] to i64
+// CHECK-NEXT: ret i64 [[TMP2]]
//
uint16x4_t test_pwunzipue_u16x4(uint8x8_t a) {
return __riscv_pwunzipue_u16x4(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunzipuo_u16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[SHR_I:%.*]] = lshr <4 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipuo_u16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[SHR_I:%.*]] = lshr <4 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipuo_u16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[SHR_I:%.*]] = lshr <4 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHR_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
uint16x4_t test_pwunzipuo_u16x4(uint8x8_t a) {
return __riscv_pwunzipuo_u16x4(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunzipe_i32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV32-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.psext.h.v2i32(<2 x i32> [[TMP0]])
-// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64
-// RV32-NEXT: ret i64 [[TMP2]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipe_i32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV64-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.psext.h.v2i32(<2 x i32> [[TMP0]])
-// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64
-// RV64-NEXT: ret i64 [[TMP2]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipe_i32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
+// CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.psext.h.v2i32(<2 x i32> [[TMP0]])
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64
+// CHECK-NEXT: ret i64 [[TMP2]]
//
int32x2_t test_pwunzipe_i32x2(int16x4_t a) { return __riscv_pwunzipe_i32x2(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunzipo_i32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV32-NEXT: [[SHR_I:%.*]] = ashr <2 x i32> [[TMP0]], splat (i32 16)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipo_i32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV64-NEXT: [[SHR_I:%.*]] = ashr <2 x i32> [[TMP0]], splat (i32 16)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipo_i32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
+// CHECK-NEXT: [[SHR_I:%.*]] = ashr <2 x i32> [[TMP0]], splat (i32 16)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
int32x2_t test_pwunzipo_i32x2(int16x4_t a) { return __riscv_pwunzipo_i32x2(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunzipue_u32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV32-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.pzext.h.v2i32(<2 x i32> [[TMP0]])
-// RV32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64
-// RV32-NEXT: ret i64 [[TMP2]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipue_u32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV64-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.pzext.h.v2i32(<2 x i32> [[TMP0]])
-// RV64-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64
-// RV64-NEXT: ret i64 [[TMP2]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipue_u32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
+// CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.riscv.pzext.h.v2i32(<2 x i32> [[TMP0]])
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP1]] to i64
+// CHECK-NEXT: ret i64 [[TMP2]]
//
uint32x2_t test_pwunzipue_u32x2(uint16x4_t a) {
return __riscv_pwunzipue_u32x2(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunzipuo_u32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV32-NEXT: [[SHR_I:%.*]] = lshr <2 x i32> [[TMP0]], splat (i32 16)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipuo_u32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV64-NEXT: [[SHR_I:%.*]] = lshr <2 x i32> [[TMP0]], splat (i32 16)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipuo_u32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
+// CHECK-NEXT: [[SHR_I:%.*]] = lshr <2 x i32> [[TMP0]], splat (i32 16)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHR_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
uint32x2_t test_pwunzipuo_u32x2(uint16x4_t a) {
return __riscv_pwunzipuo_u32x2(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunziphe_i16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunziphe_i16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunziphe_i16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
int16x4_t test_pwunziphe_i16x4(int8x8_t a) { return __riscv_pwunziphe_i16x4(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunziphe_u16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunziphe_u16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunziphe_u16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[SHL_I:%.*]] = shl <4 x i16> [[TMP0]], splat (i16 8)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHL_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
uint16x4_t test_pwunziphe_u16x4(uint8x8_t a) {
return __riscv_pwunziphe_u16x4(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunzipho_i16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8>
-// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipho_i16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8>
-// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipho_i16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8>
+// CHECK-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
int16x4_t test_pwunzipho_i16x4(int8x8_t a) { return __riscv_pwunzipho_i16x4(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunzipho_u16x4(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8>
-// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipho_u16x4(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8>
-// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipho_u16x4(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <8 x i8>
+// CHECK-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> <i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0, i8 poison, i8 0>, <8 x i8> [[TMP0]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[SHUFFLE_I_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
uint16x4_t test_pwunzipho_u16x4(uint8x8_t a) {
return __riscv_pwunzipho_u16x4(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunziphe_i32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunziphe_i32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunziphe_i32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
+// CHECK-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
int32x2_t test_pwunziphe_i32x2(int16x4_t a) { return __riscv_pwunziphe_i32x2(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunziphe_u32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV32-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16)
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunziphe_u32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
-// RV64-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16)
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunziphe_u32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <2 x i32>
+// CHECK-NEXT: [[SHL_I:%.*]] = shl <2 x i32> [[TMP0]], splat (i32 16)
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SHL_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
uint32x2_t test_pwunziphe_u32x2(uint16x4_t a) {
return __riscv_pwunziphe_u32x2(a);
}
-// RV32-LABEL: define dso_local i64 @test_pwunzipho_i32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipho_i32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipho_i32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
int32x2_t test_pwunzipho_i32x2(int16x4_t a) { return __riscv_pwunzipho_i32x2(a); }
-// RV32-LABEL: define dso_local i64 @test_pwunzipho_u32x2(
-// RV32-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV32-NEXT: [[ENTRY:.*:]]
-// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV32-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64
-// RV32-NEXT: ret i64 [[TMP1]]
-//
-// RV64-LABEL: define dso_local i64 @test_pwunzipho_u32x2(
-// RV64-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
-// RV64-NEXT: [[ENTRY:.*:]]
-// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
-// RV64-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64
-// RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-LABEL: define dso_local i64 @test_pwunzipho_u32x2(
+// CHECK-SAME: i64 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_COERCE]] to <4 x i16>
+// CHECK-NEXT: [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> <i16 poison, i16 0, i16 poison, i16 0>, <4 x i16> [[TMP0]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to i64
+// CHECK-NEXT: ret i64 [[TMP1]]
//
uint32x2_t test_pwunzipho_u32x2(uint16x4_t a) {
return __riscv_pwunzipho_u32x2(a);
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