[clang] [llvm] [AMDGPU] Implement AsyncMark Stages (PR #220442)

[Sameer Sahasrabuddhe via cfe-commits]

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@@ -0,0 +1,148 @@
+//===- AMDGPUAsyncStages.h --------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+/// Shared AMDGPU asyncmark stage definitions.
+///
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_SUPPORT_AMDGPUASYNCSTAGES_H
+#define LLVM_SUPPORT_AMDGPUASYNCSTAGES_H
+
+#include "llvm/ADT/Sequence.h"
+#include "llvm/Support/ErrorHandling.h"
+#include <cstdint>
+#include <string>
+
+namespace llvm {
+namespace AMDGPU {
+namespace AsyncStage {
+
+// Async stages tracked by the asyncmark / wait_asyncmark intrinsics. Each stage
+// has its own independent sequence of marks.
+//
+// Do not renumber. Some values are RESERVED for later use.
+enum Stage : uint32_t {
+  // Tensor loads to LDS and tensor stores from LDS.
+  TENSOR = 0,
+  // Asynchronous global loads to LDS.
+  GLOBAL_LOAD_ASYNC_TO_LDS = 1,
+  // Asynchronous multicast (cluster) global loads to LDS.
+  GLOBAL_LOAD_ASYNC_TO_LDS_MCAST = 2,
+  // Asynchronous global stores from LDS.
+  GLOBAL_STORE_ASYNC_FROM_LDS = 3,
+  RESERVED_4 = 4,
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ssahasra wrote:

A comment to explain why there is a hole here?

https://github.com/llvm/llvm-project/pull/220442