[clang] dc306a2 - [HLSL] Build elementwise cast results from poison (#225591)
via cfe-commits
cfe-commits at lists.llvm.org
Mon Sep 28 13:55:40 PDT 2026
Author: Farzon Lotfi
Date: 2026-09-28T16:55:32-04:00
New Revision: dc306a24fefef0e3cbde890bc25e30d4b753498f
URL: https://github.com/llvm/llvm-project/commit/dc306a24fefef0e3cbde890bc25e30d4b753498f
DIFF: https://github.com/llvm/llvm-project/commit/dc306a24fefef0e3cbde890bc25e30d4b753498f.diff
LOG: [HLSL] Build elementwise cast results from poison (#225591)
I noticed this unnecessary alloca while doing this pr:
https://github.com/llvm/llvm-project/pull/225519
The change is to initialize vector and matrix elementwise cast results
with poison instead of loading uninitialized temporary storage.
We do this because every result element is overwritten before use,
making the temporary allocation and load unnecessary.
Added:
Modified:
clang/lib/CodeGen/CGExprScalar.cpp
clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
Removed:
################################################################################
diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp
index 0c310816bc268..308c45bcbee4f 100644
--- a/clang/lib/CodeGen/CGExprScalar.cpp
+++ b/clang/lib/CodeGen/CGExprScalar.cpp
@@ -2559,8 +2559,7 @@ static Value *EmitHLSLElementwiseCast(CodeGenFunction &CGF, LValue SrcVal,
assert(LoadList.size() >= VecTy->getNumElements() &&
"Flattened type on RHS must have the same number or more elements "
"than vector on LHS.");
- llvm::Value *V = CGF.Builder.CreateLoad(
- CGF.CreateIRTempWithoutCast(DestTy, "flatcast.tmp"));
+ llvm::Value *V = llvm::PoisonValue::get(CGF.ConvertType(DestTy));
// write to V.
for (unsigned I = 0, E = VecTy->getNumElements(); I < E; I++) {
RValue RVal = CGF.EmitLoadOfLValue(LoadList[I], Loc);
@@ -2580,8 +2579,7 @@ static Value *EmitHLSLElementwiseCast(CodeGenFunction &CGF, LValue SrcVal,
bool IsRowMajor = isMatrixRowMajor(CGF.getLangOpts(), DestTy);
- llvm::Value *V = CGF.Builder.CreateLoad(
- CGF.CreateIRTempWithoutCast(DestTy, "flatcast.tmp"));
+ llvm::Value *V = llvm::PoisonValue::get(CGF.ConvertType(DestTy));
// V is an allocated temporary for constructing the matrix.
for (unsigned Row = 0, RE = MatTy->getNumRows(); Row < RE; Row++) {
for (unsigned Col = 0, CE = MatTy->getNumColumns(); Col < CE; Col++) {
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
index 78988265c3f98..8a27efef75255 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
@@ -185,18 +185,16 @@ int3x2 elementwise_type_cast4(double3x2 d32) {
// ROW-CHECK-NEXT: [[A:%.*]] = alloca [2 x [1 x i32]], align 4
// ROW-CHECK-NEXT: [[B:%.*]] = alloca [2 x <1 x i32>], align 4
// ROW-CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [2 x [1 x i32]], align 4
-// ROW-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i32>, align 4
// ROW-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[A]], ptr align 4 @__const._Z5call2v.A, i32 8, i1 false)
// ROW-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[AGG_TEMP]], ptr align 4 [[A]], i32 8, i1 false)
// ROW-CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr [[AGG_TEMP]], i32 0, i32 0, i32 0
// ROW-CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr [[AGG_TEMP]], i32 0, i32 1, i32 0
-// ROW-CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[FLATCAST_TMP]], align 4
-// ROW-CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[GEP]], align 4
-// ROW-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 0
-// ROW-CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[GEP1]], align 4
-// ROW-CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[TMP4]], i64 1
-// ROW-CHECK-NEXT: [[TMP6:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TMP5]], i32 2, i32 1)
-// ROW-CHECK-NEXT: store <2 x i32> [[TMP6]], ptr [[B]], align 4
+// ROW-CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[GEP]], align 4
+// ROW-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP1]], i64 0
+// ROW-CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[GEP1]], align 4
+// ROW-CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[TMP3]], i64 1
+// ROW-CHECK-NEXT: [[TMP5:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TMP4]], i32 2, i32 1)
+// ROW-CHECK-NEXT: store <2 x i32> [[TMP5]], ptr [[B]], align 4
// ROW-CHECK-NEXT: ret void
//
// COL-CHECK-LABEL: define hidden void @_Z5call2v(
@@ -206,17 +204,15 @@ int3x2 elementwise_type_cast4(double3x2 d32) {
// COL-CHECK-NEXT: [[A:%.*]] = alloca [2 x [1 x i32]], align 4
// COL-CHECK-NEXT: [[B:%.*]] = alloca [1 x <2 x i32>], align 4
// COL-CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [2 x [1 x i32]], align 4
-// COL-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i32>, align 4
// COL-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[A]], ptr align 4 @__const._Z5call2v.A, i32 8, i1 false)
// COL-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[AGG_TEMP]], ptr align 4 [[A]], i32 8, i1 false)
// COL-CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr [[AGG_TEMP]], i32 0, i32 0, i32 0
// COL-CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr [[AGG_TEMP]], i32 0, i32 1, i32 0
-// COL-CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[FLATCAST_TMP]], align 4
-// COL-CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[GEP]], align 4
-// COL-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 0
-// COL-CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[GEP1]], align 4
-// COL-CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[TMP4]], i64 1
-// COL-CHECK-NEXT: store <2 x i32> [[TMP5]], ptr [[B]], align 4
+// COL-CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[GEP]], align 4
+// COL-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP1]], i64 0
+// COL-CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[GEP1]], align 4
+// COL-CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[TMP3]], i64 1
+// COL-CHECK-NEXT: store <2 x i32> [[TMP4]], ptr [[B]], align 4
// COL-CHECK-NEXT: ret void
//
void call2() {
@@ -236,19 +232,17 @@ struct S {
// ROW-CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 1
// ROW-CHECK-NEXT: [[A:%.*]] = alloca [2 x <1 x i32>], align 4
// ROW-CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[STRUCT_S]], align 1
-// ROW-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i32>, align 4
// ROW-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[S]], ptr align 1 @__const._Z5call3v.s, i32 8, i1 false)
// ROW-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[AGG_TEMP]], ptr align 1 [[S]], i32 8, i1 false)
// ROW-CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[AGG_TEMP]], i32 0, i32 0
// ROW-CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[AGG_TEMP]], i32 0, i32 1
-// ROW-CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[FLATCAST_TMP]], align 4
-// ROW-CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[GEP]], align 4
-// ROW-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 0
-// ROW-CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[GEP1]], align 4
-// ROW-CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i32
-// ROW-CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[CONV]], i64 1
-// ROW-CHECK-NEXT: [[TMP6:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TMP5]], i32 2, i32 1)
-// ROW-CHECK-NEXT: store <2 x i32> [[TMP6]], ptr [[A]], align 4
+// ROW-CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[GEP]], align 4
+// ROW-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP1]], i64 0
+// ROW-CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[GEP1]], align 4
+// ROW-CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP3]] to i32
+// ROW-CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[CONV]], i64 1
+// ROW-CHECK-NEXT: [[TMP5:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TMP4]], i32 2, i32 1)
+// ROW-CHECK-NEXT: store <2 x i32> [[TMP5]], ptr [[A]], align 4
// ROW-CHECK-NEXT: ret void
//
// COL-CHECK-LABEL: define hidden void @_Z5call3v(
@@ -258,18 +252,16 @@ struct S {
// COL-CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 1
// COL-CHECK-NEXT: [[A:%.*]] = alloca [1 x <2 x i32>], align 4
// COL-CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[STRUCT_S]], align 1
-// COL-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i32>, align 4
// COL-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[S]], ptr align 1 @__const._Z5call3v.s, i32 8, i1 false)
// COL-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[AGG_TEMP]], ptr align 1 [[S]], i32 8, i1 false)
// COL-CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[AGG_TEMP]], i32 0, i32 0
// COL-CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[AGG_TEMP]], i32 0, i32 1
-// COL-CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[FLATCAST_TMP]], align 4
-// COL-CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[GEP]], align 4
-// COL-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 0
-// COL-CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[GEP1]], align 4
-// COL-CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i32
-// COL-CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[CONV]], i64 1
-// COL-CHECK-NEXT: store <2 x i32> [[TMP5]], ptr [[A]], align 4
+// COL-CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[GEP]], align 4
+// COL-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP1]], i64 0
+// COL-CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[GEP1]], align 4
+// COL-CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP3]] to i32
+// COL-CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[CONV]], i64 1
+// COL-CHECK-NEXT: store <2 x i32> [[TMP4]], ptr [[A]], align 4
// COL-CHECK-NEXT: ret void
//
void call3() {
@@ -295,7 +287,6 @@ struct Derived : BFields {
// ROW-CHECK-NEXT: [[D_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
// ROW-CHECK-NEXT: [[A:%.*]] = alloca [2 x <2 x i32>], align 4
// ROW-CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[STRUCT_DERIVED:%.*]], align 1
-// ROW-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x i32>, align 4
// ROW-CHECK-NEXT: store ptr [[D]], ptr [[D_INDIRECT_ADDR]], align 4
// ROW-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[AGG_TEMP]], ptr align 1 [[D]], i32 19, i1 false)
// ROW-CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 0
@@ -303,22 +294,21 @@ struct Derived : BFields {
// ROW-CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 0, i32 0
// ROW-CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 0, i32 2
// ROW-CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 1
-// ROW-CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[FLATCAST_TMP]], align 4
-// ROW-CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[GEP1]], align 8
-// ROW-CHECK-NEXT: [[CONV:%.*]] = fptosi double [[TMP2]] to i32
-// ROW-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[CONV]], i64 0
+// ROW-CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[GEP1]], align 8
+// ROW-CHECK-NEXT: [[CONV:%.*]] = fptosi double [[TMP1]] to i32
+// ROW-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[CONV]], i64 0
// ROW-CHECK-NEXT: [[BF_LOAD:%.*]] = load i24, ptr [[E]], align 1
// ROW-CHECK-NEXT: [[BF_SHL:%.*]] = shl i24 [[BF_LOAD]], 9
// ROW-CHECK-NEXT: [[BF_ASHR:%.*]] = ashr i24 [[BF_SHL]], 9
// ROW-CHECK-NEXT: [[BF_CAST:%.*]] = sext i24 [[BF_ASHR]] to i32
-// ROW-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[BF_CAST]], i64 1
-// ROW-CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[GEP2]], align 4
-// ROW-CHECK-NEXT: [[CONV4:%.*]] = fptosi float [[TMP5]] to i32
-// ROW-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[CONV4]], i64 2
-// ROW-CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[GEP3]], align 4
-// ROW-CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP7]], i64 3
-// ROW-CHECK-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.matrix.transpose.v4i32(<4 x i32> [[TMP8]], i32 2, i32 2)
-// ROW-CHECK-NEXT: store <4 x i32> [[TMP9]], ptr [[A]], align 4
+// ROW-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[BF_CAST]], i64 1
+// ROW-CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[GEP2]], align 4
+// ROW-CHECK-NEXT: [[CONV4:%.*]] = fptosi float [[TMP4]] to i32
+// ROW-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[CONV4]], i64 2
+// ROW-CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[GEP3]], align 4
+// ROW-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP6]], i64 3
+// ROW-CHECK-NEXT: [[TMP8:%.*]] = call <4 x i32> @llvm.matrix.transpose.v4i32(<4 x i32> [[TMP7]], i32 2, i32 2)
+// ROW-CHECK-NEXT: store <4 x i32> [[TMP8]], ptr [[A]], align 4
// ROW-CHECK-NEXT: ret void
//
// COL-CHECK-LABEL: define hidden void @_Z5call47Derived(
@@ -328,7 +318,6 @@ struct Derived : BFields {
// COL-CHECK-NEXT: [[D_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
// COL-CHECK-NEXT: [[A:%.*]] = alloca [2 x <2 x i32>], align 4
// COL-CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[STRUCT_DERIVED:%.*]], align 1
-// COL-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x i32>, align 4
// COL-CHECK-NEXT: store ptr [[D]], ptr [[D_INDIRECT_ADDR]], align 4
// COL-CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[AGG_TEMP]], ptr align 1 [[D]], i32 19, i1 false)
// COL-CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 0
@@ -336,21 +325,20 @@ struct Derived : BFields {
// COL-CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 0, i32 0
// COL-CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 0, i32 2
// COL-CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds [[STRUCT_DERIVED]], ptr [[AGG_TEMP]], i32 0, i32 1
-// COL-CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[FLATCAST_TMP]], align 4
-// COL-CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[GEP1]], align 8
-// COL-CHECK-NEXT: [[CONV:%.*]] = fptosi double [[TMP2]] to i32
-// COL-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[CONV]], i64 0
+// COL-CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[GEP1]], align 8
+// COL-CHECK-NEXT: [[CONV:%.*]] = fptosi double [[TMP1]] to i32
+// COL-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[CONV]], i64 0
// COL-CHECK-NEXT: [[BF_LOAD:%.*]] = load i24, ptr [[E]], align 1
// COL-CHECK-NEXT: [[BF_SHL:%.*]] = shl i24 [[BF_LOAD]], 9
// COL-CHECK-NEXT: [[BF_ASHR:%.*]] = ashr i24 [[BF_SHL]], 9
// COL-CHECK-NEXT: [[BF_CAST:%.*]] = sext i24 [[BF_ASHR]] to i32
-// COL-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[BF_CAST]], i64 2
-// COL-CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[GEP2]], align 4
-// COL-CHECK-NEXT: [[CONV4:%.*]] = fptosi float [[TMP5]] to i32
-// COL-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[CONV4]], i64 1
-// COL-CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[GEP3]], align 4
-// COL-CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP7]], i64 3
-// COL-CHECK-NEXT: store <4 x i32> [[TMP8]], ptr [[A]], align 4
+// COL-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[BF_CAST]], i64 2
+// COL-CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[GEP2]], align 4
+// COL-CHECK-NEXT: [[CONV4:%.*]] = fptosi float [[TMP4]] to i32
+// COL-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[CONV4]], i64 1
+// COL-CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[GEP3]], align 4
+// COL-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP6]], i64 3
+// COL-CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[A]], align 4
// COL-CHECK-NEXT: ret void
//
void call4(Derived D) {
@@ -364,29 +352,27 @@ void call4(Derived D) {
// ROW-CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x float>, align 4
// ROW-CHECK-NEXT: [[M:%.*]] = alloca [2 x <2 x float>], align 4
// ROW-CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca <4 x float>, align 4
-// ROW-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x float>, align 4
// ROW-CHECK-NEXT: store <4 x float> [[V]], ptr [[V_ADDR]], align 4
// ROW-CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[V_ADDR]], align 4
// ROW-CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[HLSL_EWCAST_SRC]], align 4
// ROW-CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr inbounds <4 x float>, ptr [[HLSL_EWCAST_SRC]], i32 0
-// ROW-CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[FLATCAST_TMP]], align 4
-// ROW-CHECK-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// ROW-CHECK-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
-// ROW-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP2]], float [[VECEXT]], i64 0
-// ROW-CHECK-NEXT: [[TMP5:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// ROW-CHECK-NEXT: [[VECEXT1:%.*]] = extractelement <4 x float> [[TMP5]], i32 1
-// ROW-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x float> [[TMP4]], float [[VECEXT1]], i64 1
-// ROW-CHECK-NEXT: [[TMP7:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// ROW-CHECK-NEXT: [[VECEXT2:%.*]] = extractelement <4 x float> [[TMP7]], i32 2
-// ROW-CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP6]], float [[VECEXT2]], i64 2
-// ROW-CHECK-NEXT: [[TMP9:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// ROW-CHECK-NEXT: [[VECEXT3:%.*]] = extractelement <4 x float> [[TMP9]], i32 3
-// ROW-CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x float> [[TMP8]], float [[VECEXT3]], i64 3
-// ROW-CHECK-NEXT: [[TMP11:%.*]] = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.matrix.transpose.v4f32(<4 x float> [[TMP10]], i32 2, i32 2)
-// ROW-CHECK-NEXT: store <4 x float> [[TMP11]], ptr [[M]], align 4
-// ROW-CHECK-NEXT: [[TMP12:%.*]] = load <4 x float>, ptr [[M]], align 4
-// ROW-CHECK-NEXT: [[TMP13:%.*]] = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.matrix.transpose.v4f32(<4 x float> [[TMP12]], i32 2, i32 2)
-// ROW-CHECK-NEXT: ret <4 x float> [[TMP13]]
+// ROW-CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// ROW-CHECK-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
+// ROW-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[VECEXT]], i64 0
+// ROW-CHECK-NEXT: [[TMP4:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// ROW-CHECK-NEXT: [[VECEXT1:%.*]] = extractelement <4 x float> [[TMP4]], i32 1
+// ROW-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP3]], float [[VECEXT1]], i64 1
+// ROW-CHECK-NEXT: [[TMP6:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// ROW-CHECK-NEXT: [[VECEXT2:%.*]] = extractelement <4 x float> [[TMP6]], i32 2
+// ROW-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> [[TMP5]], float [[VECEXT2]], i64 2
+// ROW-CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// ROW-CHECK-NEXT: [[VECEXT3:%.*]] = extractelement <4 x float> [[TMP8]], i32 3
+// ROW-CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x float> [[TMP7]], float [[VECEXT3]], i64 3
+// ROW-CHECK-NEXT: [[TMP10:%.*]] = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.matrix.transpose.v4f32(<4 x float> [[TMP9]], i32 2, i32 2)
+// ROW-CHECK-NEXT: store <4 x float> [[TMP10]], ptr [[M]], align 4
+// ROW-CHECK-NEXT: [[TMP11:%.*]] = load <4 x float>, ptr [[M]], align 4
+// ROW-CHECK-NEXT: [[TMP12:%.*]] = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.matrix.transpose.v4f32(<4 x float> [[TMP11]], i32 2, i32 2)
+// ROW-CHECK-NEXT: ret <4 x float> [[TMP12]]
//
// COL-CHECK-LABEL: define hidden noundef nofpclass(nan inf) <4 x float> @_Z5call5Dv4_f(
// COL-CHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0]] {
@@ -395,27 +381,25 @@ void call4(Derived D) {
// COL-CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x float>, align 4
// COL-CHECK-NEXT: [[M:%.*]] = alloca [2 x <2 x float>], align 4
// COL-CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca <4 x float>, align 4
-// COL-CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x float>, align 4
// COL-CHECK-NEXT: store <4 x float> [[V]], ptr [[V_ADDR]], align 4
// COL-CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[V_ADDR]], align 4
// COL-CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[HLSL_EWCAST_SRC]], align 4
// COL-CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr inbounds <4 x float>, ptr [[HLSL_EWCAST_SRC]], i32 0
-// COL-CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[FLATCAST_TMP]], align 4
-// COL-CHECK-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// COL-CHECK-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
-// COL-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP2]], float [[VECEXT]], i64 0
-// COL-CHECK-NEXT: [[TMP5:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// COL-CHECK-NEXT: [[VECEXT1:%.*]] = extractelement <4 x float> [[TMP5]], i32 1
-// COL-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x float> [[TMP4]], float [[VECEXT1]], i64 2
-// COL-CHECK-NEXT: [[TMP7:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// COL-CHECK-NEXT: [[VECEXT2:%.*]] = extractelement <4 x float> [[TMP7]], i32 2
-// COL-CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP6]], float [[VECEXT2]], i64 1
-// COL-CHECK-NEXT: [[TMP9:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
-// COL-CHECK-NEXT: [[VECEXT3:%.*]] = extractelement <4 x float> [[TMP9]], i32 3
-// COL-CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x float> [[TMP8]], float [[VECEXT3]], i64 3
-// COL-CHECK-NEXT: store <4 x float> [[TMP10]], ptr [[M]], align 4
-// COL-CHECK-NEXT: [[TMP11:%.*]] = load <4 x float>, ptr [[M]], align 4
-// COL-CHECK-NEXT: ret <4 x float> [[TMP11]]
+// COL-CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// COL-CHECK-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
+// COL-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[VECEXT]], i64 0
+// COL-CHECK-NEXT: [[TMP4:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// COL-CHECK-NEXT: [[VECEXT1:%.*]] = extractelement <4 x float> [[TMP4]], i32 1
+// COL-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP3]], float [[VECEXT1]], i64 2
+// COL-CHECK-NEXT: [[TMP6:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// COL-CHECK-NEXT: [[VECEXT2:%.*]] = extractelement <4 x float> [[TMP6]], i32 2
+// COL-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> [[TMP5]], float [[VECEXT2]], i64 1
+// COL-CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[VECTOR_GEP]], align 4
+// COL-CHECK-NEXT: [[VECEXT3:%.*]] = extractelement <4 x float> [[TMP8]], i32 3
+// COL-CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x float> [[TMP7]], float [[VECEXT3]], i64 3
+// COL-CHECK-NEXT: store <4 x float> [[TMP9]], ptr [[M]], align 4
+// COL-CHECK-NEXT: [[TMP10:%.*]] = load <4 x float>, ptr [[M]], align 4
+// COL-CHECK-NEXT: ret <4 x float> [[TMP10]]
//
float2x2 call5(float4 v) {
float2x2 m = (float2x2)v;
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
index 5156dccb26eca..54202899cd92b 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
@@ -6,14 +6,12 @@
// CHECK: [[A:%.*]] = alloca [2 x [1 x i32]], align 4
// CHECK-NEXT: [[B:%.*]] = alloca <2 x i32>, align 4
// CHECK-NEXT: [[Tmp:%.*]] = alloca [2 x [1 x i32]], align 4
-// CHECK-NEXT: [[Tmp2:%.*]] = alloca <2 x i32>, align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[A]], ptr align 4 {{.*}}, i32 8, i1 false)
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Tmp]], ptr align 4 [[A]], i32 8, i1 false)
// CHECK-NEXT: [[G1:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr [[Tmp]], i32 0, i32 0, i32 0
// CHECK-NEXT: [[G2:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr [[Tmp]], i32 0, i32 1, i32 0
-// CHECK-NEXT: [[C:%.*]] = load <2 x i32>, ptr [[Tmp2]], align 4
// CHECK-NEXT: [[L:%.*]] = load i32, ptr [[G1]], align 4
-// CHECK-NEXT: [[D:%.*]] = insertelement <2 x i32> [[C]], i32 [[L]], i64 0
+// CHECK-NEXT: [[D:%.*]] = insertelement <2 x i32> poison, i32 [[L]], i64 0
// CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[G2]], align 4
// CHECK-NEXT: [[E:%.*]] = insertelement <2 x i32> [[D]], i32 [[L2]], i64 1
// CHECK-NEXT: store <2 x i32> [[E]], ptr [[B]], align 4
@@ -32,14 +30,12 @@ struct S {
// CHECK: [[s:%.*]] = alloca %struct.S, align 1
// CHECK-NEXT: [[A:%.*]] = alloca <2 x i32>, align 4
// CHECK-NEXT: [[Tmp:%.*]] = alloca %struct.S, align 1
-// CHECK-NEXT: [[Tmp2:%.*]] = alloca <2 x i32>, align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[s]], ptr align 1 {{.*}}, i32 8, i1 false)
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[Tmp]], ptr align 1 [[s]], i32 8, i1 false)
// CHECK-NEXT: [[G1:%.*]] = getelementptr inbounds %struct.S, ptr [[Tmp]], i32 0, i32 0
// CHECK-NEXT: [[G2:%.*]] = getelementptr inbounds %struct.S, ptr [[Tmp]], i32 0, i32 1
-// CHECK-NEXT: [[B:%.*]] = load <2 x i32>, ptr [[Tmp2]], align 4
// CHECK-NEXT: [[L:%.*]] = load i32, ptr [[G1]], align 4
-// CHECK-NEXT: [[C:%.*]] = insertelement <2 x i32> [[B]], i32 [[L]], i64 0
+// CHECK-NEXT: [[C:%.*]] = insertelement <2 x i32> poison, i32 [[L]], i64 0
// CHECK-NEXT: [[L2:%.*]] = load float, ptr [[G2]], align 4
// CHECK-NEXT: [[D:%.*]] = fptosi float [[L2]] to i32
// CHECK-NEXT: [[E:%.*]] = insertelement <2 x i32> [[C]], i32 [[D]], i64 1
@@ -99,7 +95,6 @@ struct Derived : BFields {
// CHECK-NEXT: [[D_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
// CHECK-NEXT: [[A:%.*]] = alloca <4 x i32>, align 4
// CHECK-NEXT: [[Tmp:%.*]] = alloca %struct.Derived, align 1
-// CHECK-NEXT: [[FlatTmp:%.*]] = alloca <4 x i32>, align 4
// CHECK-NEXT: store ptr %D, ptr [[D_INDIRECT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[Tmp]], ptr align 1 %D, i32 19, i1 false)
// CHECK-NEXT: [[Gep:%.*]] = getelementptr inbounds %struct.Derived, ptr [[Tmp]], i32 0, i32 0
@@ -107,10 +102,9 @@ struct Derived : BFields {
// CHECK-NEXT: [[Gep1:%.*]] = getelementptr inbounds %struct.Derived, ptr [[Tmp]], i32 0, i32 0, i32 0
// CHECK-NEXT: [[Gep2:%.*]] = getelementptr inbounds %struct.Derived, ptr [[Tmp]], i32 0, i32 0, i32 2
// CHECK-NEXT: [[Gep3:%.*]] = getelementptr inbounds %struct.Derived, ptr [[Tmp]], i32 0, i32 1
-// CHECK-NEXT: [[Z:%.*]] = load <4 x i32>, ptr [[FlatTmp]], align 4
// CHECK-NEXT: [[Y:%.*]] = load double, ptr [[Gep1]], align 8
// CHECK-NEXT: [[C:%.*]] = fptosi double [[Y]] to i32
-// CHECK-NEXT: [[X:%.*]] = insertelement <4 x i32> [[Z]], i32 [[C]], i64 0
+// CHECK-NEXT: [[X:%.*]] = insertelement <4 x i32> poison, i32 [[C]], i64 0
// CHECK-NEXT: [[BFL:%.*]] = load i24, ptr [[E]], align 1
// CHECK-NEXT: [[BFShl:%.*]] = shl i24 [[BFL]], 9
// CHECK-NEXT: [[BFAshr:%.*]] = ashr i24 [[BFShl]], 9
@@ -132,7 +126,6 @@ export void call6(Derived D) {
// CHECK: [[M_ADDR:%.*]] = alloca [2 x <2 x float>], align 4
// CHECK-NEXT: [[V:%.*]] = alloca <4 x float>, align 4
// CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca [2 x <2 x float>], align 4
-// CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x float>, align 4
// COL-CHECK-NEXT: store <4 x float> %M, ptr [[M_ADDR]], align 4
// ROW-CHECK-NEXT: [[M_ROW:%.*]] = call {{.*}} <4 x float> @llvm.matrix.transpose.v4f32(<4 x float> %M, i32 2, i32 2)
// ROW-CHECK-NEXT: store <4 x float> [[M_ROW]], ptr [[M_ADDR]], align 4
@@ -142,10 +135,9 @@ export void call6(Derived D) {
// ROW-CHECK-NEXT: [[TMP0_ROW:%.*]] = call {{.*}} <4 x float> @llvm.matrix.transpose.v4f32(<4 x float> [[TMP0_COL]], i32 2, i32 2)
// ROW-CHECK-NEXT: store <4 x float> [[TMP0_ROW]], ptr [[HLSL_EWCAST_SRC]], align 4
// CHECK-NEXT: [[MATRIX_GEP:%.*]] = getelementptr inbounds <4 x float>, ptr [[HLSL_EWCAST_SRC]], i32 0
-// CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[FLATCAST_TMP]], align 4
// CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
-// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP1]], float [[MATRIXEXT]], i64 0
+// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[MATRIXEXT]], i64 0
// CHECK-NEXT: [[TMP4:%.*]] = load <4 x float>, ptr [[MATRIX_GEP]], align 4
// COL-CHECK-NEXT: [[MATRIXEXT1:%.*]] = extractelement <4 x float> [[TMP4]], i32 2
// ROW-CHECK-NEXT: [[MATRIXEXT1:%.*]] = extractelement <4 x float> [[TMP4]], i32 1
@@ -170,7 +162,6 @@ export void call7(float2x2 M) {
// CHECK-NEXT: [[V:%.*]] = alloca <3 x i32>, align 4
// COL-CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca [1 x <3 x i32>], align 4
// ROW-CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca [3 x <1 x i32>], align 4
-// CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <3 x i32>, align 4
// COL-CHECK-NEXT: store <3 x i32> %M, ptr [[M_ADDR]], align 4
// ROW-CHECK-NEXT: [[M_ROW:%.*]] = call <3 x i32> @llvm.matrix.transpose.v3i32(<3 x i32> %M, i32 3, i32 1)
// ROW-CHECK-NEXT: store <3 x i32> [[M_ROW]], ptr [[M_ADDR]], align 4
@@ -180,10 +171,9 @@ export void call7(float2x2 M) {
// ROW-CHECK-NEXT: [[TMP0_ROW:%.*]] = call <3 x i32> @llvm.matrix.transpose.v3i32(<3 x i32> [[TMP0_COL]], i32 3, i32 1)
// ROW-CHECK-NEXT: store <3 x i32> [[TMP0_ROW]], ptr [[HLSL_EWCAST_SRC]], align 4
// CHECK-NEXT: [[MATRIX_GEP:%.*]] = getelementptr inbounds <3 x i32>, ptr [[HLSL_EWCAST_SRC]], i32 0
-// CHECK-NEXT: [[TMP1:%.*]] = load <3 x i32>, ptr [[FLATCAST_TMP]], align 4
// CHECK-NEXT: [[TMP2:%.*]] = load <3 x i32>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT:%.*]] = extractelement <3 x i32> [[TMP2]], i32 0
-// CHECK-NEXT: [[TMP3:%.*]] = insertelement <3 x i32> [[TMP1]], i32 [[MATRIXEXT]], i64 0
+// CHECK-NEXT: [[TMP3:%.*]] = insertelement <3 x i32> poison, i32 [[MATRIXEXT]], i64 0
// CHECK-NEXT: [[TMP4:%.*]] = load <3 x i32>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT1:%.*]] = extractelement <3 x i32> [[TMP4]], i32 1
// CHECK-NEXT: [[TMP5:%.*]] = insertelement <3 x i32> [[TMP3]], i32 [[MATRIXEXT1]], i64 1
@@ -203,7 +193,6 @@ export void call8(int3x1 M) {
// CHECK-NEXT: [[V:%.*]] = alloca <2 x i32>, align 4
// COL-CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca [2 x <1 x i32>], align 4
// ROW-CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca [1 x <2 x i32>], align 4
-// CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i1>, align 4
// COL-CHECK-NEXT: [[TMP0:%.*]] = zext <2 x i1> %M to <2 x i32>
// ROW-CHECK-NEXT: [[M_ROW:%.*]] = call <2 x i1> @llvm.matrix.transpose.v2i1(<2 x i1> %M, i32 1, i32 2)
// ROW-CHECK-NEXT: [[TMP0:%.*]] = zext <2 x i1> [[M_ROW]] to <2 x i32>
@@ -214,11 +203,10 @@ export void call8(int3x1 M) {
// ROW-CHECK-NEXT: [[TMP1_ROW:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TMP1_COL]], i32 1, i32 2)
// ROW-CHECK-NEXT: store <2 x i32> [[TMP1_ROW]], ptr [[HLSL_EWCAST_SRC]], align 4
// CHECK-NEXT: [[MATRIX_GEP:%.*]] = getelementptr inbounds <2 x i32>, ptr [[HLSL_EWCAST_SRC]], i32 0
-// CHECK-NEXT: [[TMP2:%.*]] = load <2 x i1>, ptr [[FLATCAST_TMP]], align 4
// CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT:%.*]] = extractelement <2 x i32> [[TMP3]], i32 0
// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[MATRIXEXT]], 0
-// CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i1> [[TMP2]], i1 [[LOADEDV]], i64 0
+// CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i1> poison, i1 [[LOADEDV]], i64 0
// CHECK-NEXT: [[TMP5:%.*]] = load <2 x i32>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT1:%.*]] = extractelement <2 x i32> [[TMP5]], i32 1
// CHECK-NEXT: [[LOADEDV2:%.*]] = icmp ne i32 [[MATRIXEXT1]], 0
@@ -241,15 +229,13 @@ struct BoolVecStruct {
// CHECK-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
// CHECK-NEXT: [[V:%.*]] = alloca <2 x i32>, align 4
// CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca %struct.BoolVecStruct, align 1
-// CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i1>, align 4
// CHECK-NEXT: store ptr %s, ptr [[S_INDIRECT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[AGG_TEMP]], ptr align 1 %s, i32 8, i1 false)
// CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr inbounds %struct.BoolVecStruct, ptr [[AGG_TEMP]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i1>, ptr [[FLATCAST_TMP]], align 4
// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[VECTOR_GEP]], align 4
// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x i32> [[TMP1]], i32 0
// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[VECEXT]], 0
-// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i1> [[TMP0]], i1 [[LOADEDV]], i64 0
+// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i1> poison, i1 [[LOADEDV]], i64 0
// CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[VECTOR_GEP]], align 4
// CHECK-NEXT: [[VECEXT1:%.*]] = extractelement <2 x i32> [[TMP3]], i32 1
// CHECK-NEXT: [[LOADEDV2:%.*]] = icmp ne i32 [[VECEXT1]], 0
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