[clang] [llvm] [mlir] [OpenMP][Attributor] Infer noalias for host callback captures (PR #218453)
Tomas Matheson via cfe-commits
cfe-commits at lists.llvm.org
Mon Sep 28 05:14:23 PDT 2026
https://github.com/tommat01 updated https://github.com/llvm/llvm-project/pull/218453
>From c443f515d891d92cf90ddaee6506af3c8d421580 Mon Sep 17 00:00:00 2001
From: Tomas Matheson <tomas.matheson at arm.com>
Date: Mon, 24 Aug 2026 11:07:25 +0100
Subject: [PATCH] [OpenMP] Preserve host capture lifetimes in frontend lowering
Mark captured alloca/global storage nofreeobj when Clang emits a synchronous
host parallel call. This preserves lifetime across outlining without claiming
that escaped capture slots are noalias or immutable, and without extending the
lifetime guarantee to pointers loaded from those slots.
Mark OpenMPIRBuilder's fresh host capture aggregate noalias and nofreeobj.
This covers the lowering path used by Flang and Clang's IRBuilder mode.
Replace callback Attributor seeding with frontend and translation tests,
including escaped captures, heap references, firstprivate pointers, debug
wrappers, serialized regions, and optimized load hoisting with OpenMPOpt
disabled. Refresh the affected parameter-attribute checks.
---
clang/lib/CodeGen/CGOpenMPRuntime.cpp | 15 +
clang/test/OpenMP/bug54082.c | 2 +-
.../test/OpenMP/callback_capture_lifetime.cpp | 1173 +++++
clang/test/OpenMP/cancel_codegen.cpp | 8 +-
.../OpenMP/cancellation_point_codegen.cpp | 64 +-
clang/test/OpenMP/debug-info-openmp-array.cpp | 104 +-
...bute_parallel_for_firstprivate_codegen.cpp | 88 +-
...ibute_parallel_for_lastprivate_codegen.cpp | 88 +-
...te_parallel_for_reduction_task_codegen.cpp | 2 +-
...parallel_for_simd_firstprivate_codegen.cpp | 88 +-
..._parallel_for_simd_lastprivate_codegen.cpp | 88 +-
.../test/OpenMP/for_firstprivate_codegen.cpp | 4 +-
clang/test/OpenMP/for_lastprivate_codegen.cpp | 16 +-
clang/test/OpenMP/for_linear_codegen.cpp | 198 +-
.../OpenMP/for_private_reduction_codegen.cpp | 40 +-
clang/test/OpenMP/for_reduction_codegen.cpp | 24 +-
.../test/OpenMP/for_reduction_codegen_UDR.cpp | 18 +-
.../OpenMP/for_reduction_task_codegen.cpp | 2 +-
.../OpenMP/irbuilder_nested_parallel_for.c | 24 +-
.../master_taskloop_in_reduction_codegen.cpp | 2 +-
...ter_taskloop_simd_in_reduction_codegen.cpp | 2 +-
clang/test/OpenMP/nested_loop_codegen.cpp | 16 +-
clang/test/OpenMP/parallel_codegen.cpp | 566 +--
clang/test/OpenMP/parallel_copyin_codegen.cpp | 66 +-
.../OpenMP/parallel_copyin_combined_codegen.c | 966 +++--
.../OpenMP/parallel_firstprivate_codegen.cpp | 24 +-
clang/test/OpenMP/parallel_for_codegen.cpp | 68 +-
.../parallel_for_lastprivate_conditional.cpp | 16 +-
.../OpenMP/parallel_for_linear_codegen.cpp | 16 +-
.../parallel_for_reduction_task_codegen.cpp | 2 +-
.../parallel_for_simd_aligned_codegen.cpp | 18 +-
.../OpenMP/parallel_generic_loop_codegen.cpp | 16 +-
clang/test/OpenMP/parallel_master_codegen.cpp | 12 +-
...parallel_master_reduction_task_codegen.cpp | 2 +-
.../parallel_master_taskloop_codegen.cpp | 334 +-
...l_master_taskloop_firstprivate_codegen.cpp | 324 +-
...el_master_taskloop_lastprivate_codegen.cpp | 416 +-
.../parallel_master_taskloop_simd_codegen.cpp | 1054 ++---
...ter_taskloop_simd_firstprivate_codegen.cpp | 470 +-
...ster_taskloop_simd_lastprivate_codegen.cpp | 572 +--
.../OpenMP/parallel_reduction_codegen.cpp | 16 +-
.../parallel_reduction_task_codegen.cpp | 2 +-
...rallel_sections_reduction_task_codegen.cpp | 2 +-
clang/test/OpenMP/reduction_compound_op.cpp | 144 +-
clang/test/OpenMP/scope_codegen.cpp | 4 +-
.../OpenMP/sections_firstprivate_codegen.cpp | 4 +-
.../OpenMP/sections_lastprivate_codegen.cpp | 48 +-
.../OpenMP/sections_reduction_codegen.cpp | 32 +-
.../sections_reduction_task_codegen.cpp | 2 +-
.../OpenMP/single_firstprivate_codegen.cpp | 4 +-
.../OpenMP/structured-bindings-codegen.cpp | 442 +-
.../OpenMP/target_codegen_global_capture.cpp | 54 +-
.../OpenMP/target_in_reduction_codegen.cpp | 608 ++-
clang/test/OpenMP/target_map_codegen_03.cpp | 12 +-
...et_parallel_num_threads_strict_codegen.cpp | 8 +-
clang/test/OpenMP/target_teams_codegen.cpp | 112 +-
...bute_parallel_for_firstprivate_codegen.cpp | 164 +-
...ibute_parallel_for_lastprivate_codegen.cpp | 88 +-
...tribute_parallel_for_reduction_codegen.cpp | 52 +-
...te_parallel_for_reduction_task_codegen.cpp | 2 +-
...parallel_for_simd_firstprivate_codegen.cpp | 164 +-
..._parallel_for_simd_lastprivate_codegen.cpp | 88 +-
...te_parallel_for_simd_reduction_codegen.cpp | 52 +-
...t_teams_generic_loop_reduction_codegen.cpp | 52 +-
clang/test/OpenMP/task_codegen.cpp | 3794 ++++++++---------
.../test/OpenMP/task_in_reduction_codegen.cpp | 2 +-
.../OpenMP/taskloop_in_reduction_codegen.cpp | 2 +-
.../taskloop_simd_in_reduction_codegen.cpp | 2 +-
...bute_parallel_for_firstprivate_codegen.cpp | 20 +-
...ibute_parallel_for_lastprivate_codegen.cpp | 88 +-
...tribute_parallel_for_reduction_codegen.cpp | 52 +-
...te_parallel_for_reduction_task_codegen.cpp | 2 +-
...s_distribute_parallel_for_simd_codegen.cpp | 64 +-
...parallel_for_simd_firstprivate_codegen.cpp | 20 +-
..._parallel_for_simd_lastprivate_codegen.cpp | 88 +-
...te_parallel_for_simd_reduction_codegen.cpp | 52 +-
clang/test/OpenMP/vla_crash.c | 16 +-
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 10 +
.../OpenMP/parallel_region_merging.ll | 22 +-
.../Frontend/OpenMPIRBuilderTest.cpp | 2 +
.../omptarget-region-parallel-llvm.mlir | 101 +-
.../LLVMIR/openmp-capture-lifetime.mlir | 113 +
.../openmp-dist_schedule_with_wsloop.mlir | 1381 +++++-
.../Target/LLVMIR/openmp-firstprivate.mlir | 287 +-
mlir/test/Target/LLVMIR/openmp-private.mlir | 481 ++-
85 files changed, 9439 insertions(+), 6324 deletions(-)
create mode 100644 clang/test/OpenMP/callback_capture_lifetime.cpp
create mode 100644 mlir/test/Target/LLVMIR/openmp-capture-lifetime.mlir
diff --git a/clang/lib/CodeGen/CGOpenMPRuntime.cpp b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
index 6de9fea26954e..09b355661bd3f 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntime.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
@@ -29,9 +29,11 @@
#include "clang/Basic/SourceManager.h"
#include "clang/CodeGen/ConstantInitBuilder.h"
#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Bitcode/BitcodeReader.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DerivedTypes.h"
@@ -1998,6 +2000,19 @@ void CGOpenMPRuntime::emitParallelCall(
OpenMPSeverityClauseKind Severity, const Expr *Message) {
if (!CGF.HaveInsertPoint())
return;
+ // A host parallel region joins before the caller continues. Preserve the
+ // lifetime of captured stack/global storage across outlining, even when its
+ // address has escaped. This says nothing about aliasing or mutation of the
+ // storage, nor about the lifetime of pointers loaded from it.
+ if (!CGM.getLangOpts().OpenMPIsTargetDevice) {
+ for (auto [I, Captured] : llvm::enumerate(CapturedVars)) {
+ if (Captured->getType()->isPointerTy() &&
+ llvm::isa<llvm::AllocaInst, llvm::GlobalVariable>(
+ llvm::getUnderlyingObject(Captured)))
+ OutlinedFn->addParamAttr(I + 2, llvm::Attribute::NoFreeObj);
+ }
+ }
+
llvm::Value *RTLoc = emitUpdateLocation(CGF, Loc);
auto &M = CGM.getModule();
auto &&ThenGen = [&M, OutlinedFn, CapturedVars, RTLoc,
diff --git a/clang/test/OpenMP/bug54082.c b/clang/test/OpenMP/bug54082.c
index 6b8c93e9ffc96..9e4660c1edc85 100644
--- a/clang/test/OpenMP/bug54082.c
+++ b/clang/test/OpenMP/bug54082.c
@@ -80,7 +80,7 @@ void foo() {
//
//
// CHECK-LABEL: define internal void @foo.omp_outlined(
-// CHECK-SAME: ptr noalias nofree noundef readonly captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofree noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[X_ALLOC:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK-SAME: ptr noalias nofree noundef readonly captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[X_ALLOC:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK-NEXT: [[ENTRY:.*:]]
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
diff --git a/clang/test/OpenMP/callback_capture_lifetime.cpp b/clang/test/OpenMP/callback_capture_lifetime.cpp
new file mode 100644
index 0000000000000..6712273c7a580
--- /dev/null
+++ b/clang/test/OpenMP/callback_capture_lifetime.cpp
@@ -0,0 +1,1173 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals none --include-generated-funcs --version 6
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fopenmp -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefix=RAW
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fopenmp -debug-info-kind=limited -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefix=RAW-DEBUG
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -O2 -fopenmp -mllvm -openmp-opt-disable -emit-llvm -o - %s | FileCheck %s --check-prefix=OPT
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -O2 -fopenmp -mllvm -openmp-opt-disable -debug-info-kind=limited -emit-llvm -o - %s | FileCheck %s --check-prefix=OPT-DEBUG
+
+// Captured automatic storage remains alive across the synchronous parallel
+// call. Preserve that fact without asserting noalias: its address may escape,
+// and its value may change. Pointer values stored in it have no such guarantee.
+extern bool enabled[64];
+extern "C" void opaque() noexcept;
+extern "C" void consume(double) noexcept;
+
+extern "C" void pointer_capture(double *values) {
+#pragma omp parallel
+ {
+ opaque();
+ double sum = 0;
+ for (int i = 0; i < 64; ++i)
+ if (enabled[i])
+ sum += values[i];
+ consume(sum);
+ }
+}
+
+extern "C" void scalar_capture(double value) {
+ value += 1;
+#pragma omp parallel
+ {
+ opaque();
+ double sum = 0;
+ for (int i = 0; i < 64; ++i)
+ if (enabled[i])
+ sum += value;
+ consume(sum);
+ }
+}
+
+double **escaped;
+extern "C" void escaped_capture(double *values) {
+ escaped = &values;
+#pragma omp parallel
+ for (int i = 0; i < 64; ++i) {
+ opaque();
+ if (enabled[i])
+ consume(values[i]);
+ }
+}
+
+// A reference may name heap storage freed by opaque().
+extern "C" void reference_capture(double *&values) {
+#pragma omp parallel
+ {
+ opaque();
+ if (enabled[0])
+ consume(values[0]);
+ }
+}
+
+// A firstprivate pointer is the pointee address, not a capture-slot address.
+extern "C" void firstprivate_capture(double *values) {
+#pragma omp parallel firstprivate(values)
+ {
+ opaque();
+ if (enabled[0])
+ consume(values[0]);
+ }
+}
+
+extern "C" void serialized_capture(double *values) {
+#pragma omp parallel if(0)
+ consume(values[0]);
+}
+// RAW-LABEL: define dso_local void @pointer_capture(
+// RAW-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0:[0-9]+]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @pointer_capture.omp_outlined, ptr [[VALUES_ADDR]])
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define internal void @pointer_capture.omp_outlined(
+// RAW-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1:[0-9]+]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[SUM:%.*]] = alloca double, align 8
+// RAW-NEXT: [[I:%.*]] = alloca i32, align 4
+// RAW-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// RAW-NEXT: call void @opaque() #[[ATTR3:[0-9]+]]
+// RAW-NEXT: store double 0.000000e+00, ptr [[SUM]], align 8
+// RAW-NEXT: store i32 0, ptr [[I]], align 4
+// RAW-NEXT: br label %[[FOR_COND:.*]]
+// RAW: [[FOR_COND]]:
+// RAW-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 64
+// RAW-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
+// RAW: [[FOR_BODY]]:
+// RAW-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64
+// RAW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i8], ptr @enabled, i64 0, i64 [[IDXPROM]]
+// RAW-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
+// RAW-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
+// RAW-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// RAW: [[IF_THEN]]:
+// RAW-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 8
+// RAW-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[IDXPROM1:%.*]] = sext i32 [[TMP5]] to i64
+// RAW-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 [[IDXPROM1]]
+// RAW-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX2]], align 8
+// RAW-NEXT: [[TMP7:%.*]] = load double, ptr [[SUM]], align 8
+// RAW-NEXT: [[ADD:%.*]] = fadd double [[TMP7]], [[TMP6]]
+// RAW-NEXT: store double [[ADD]], ptr [[SUM]], align 8
+// RAW-NEXT: br label %[[IF_END]]
+// RAW: [[IF_END]]:
+// RAW-NEXT: br label %[[FOR_INC:.*]]
+// RAW: [[FOR_INC]]:
+// RAW-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
+// RAW-NEXT: store i32 [[INC]], ptr [[I]], align 4
+// RAW-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
+// RAW: [[FOR_END]]:
+// RAW-NEXT: [[TMP9:%.*]] = load double, ptr [[SUM]], align 8
+// RAW-NEXT: call void @consume(double noundef [[TMP9]]) #[[ATTR3]]
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define dso_local void @scalar_capture(
+// RAW-SAME: double noundef [[VALUE:%.*]]) #[[ATTR0]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[VALUE_ADDR:%.*]] = alloca double, align 8
+// RAW-NEXT: store double [[VALUE]], ptr [[VALUE_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load double, ptr [[VALUE_ADDR]], align 8
+// RAW-NEXT: [[ADD:%.*]] = fadd double [[TMP0]], 1.000000e+00
+// RAW-NEXT: store double [[ADD]], ptr [[VALUE_ADDR]], align 8
+// RAW-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @scalar_capture.omp_outlined, ptr [[VALUE_ADDR]])
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define internal void @scalar_capture.omp_outlined(
+// RAW-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUE:%.*]]) #[[ATTR1]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[VALUE_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[SUM:%.*]] = alloca double, align 8
+// RAW-NEXT: [[I:%.*]] = alloca i32, align 4
+// RAW-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUE]], ptr [[VALUE_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUE_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// RAW-NEXT: call void @opaque() #[[ATTR3]]
+// RAW-NEXT: store double 0.000000e+00, ptr [[SUM]], align 8
+// RAW-NEXT: store i32 0, ptr [[I]], align 4
+// RAW-NEXT: br label %[[FOR_COND:.*]]
+// RAW: [[FOR_COND]]:
+// RAW-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 64
+// RAW-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
+// RAW: [[FOR_BODY]]:
+// RAW-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64
+// RAW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i8], ptr @enabled, i64 0, i64 [[IDXPROM]]
+// RAW-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
+// RAW-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
+// RAW-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// RAW: [[IF_THEN]]:
+// RAW-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP0]], align 8
+// RAW-NEXT: [[TMP5:%.*]] = load double, ptr [[SUM]], align 8
+// RAW-NEXT: [[ADD:%.*]] = fadd double [[TMP5]], [[TMP4]]
+// RAW-NEXT: store double [[ADD]], ptr [[SUM]], align 8
+// RAW-NEXT: br label %[[IF_END]]
+// RAW: [[IF_END]]:
+// RAW-NEXT: br label %[[FOR_INC:.*]]
+// RAW: [[FOR_INC]]:
+// RAW-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
+// RAW-NEXT: store i32 [[INC]], ptr [[I]], align 4
+// RAW-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
+// RAW: [[FOR_END]]:
+// RAW-NEXT: [[TMP7:%.*]] = load double, ptr [[SUM]], align 8
+// RAW-NEXT: call void @consume(double noundef [[TMP7]]) #[[ATTR3]]
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define dso_local void @escaped_capture(
+// RAW-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUES_ADDR]], ptr @escaped, align 8
+// RAW-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @escaped_capture.omp_outlined, ptr [[VALUES_ADDR]])
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define internal void @escaped_capture.omp_outlined(
+// RAW-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[I:%.*]] = alloca i32, align 4
+// RAW-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// RAW-NEXT: store i32 0, ptr [[I]], align 4
+// RAW-NEXT: br label %[[FOR_COND:.*]]
+// RAW: [[FOR_COND]]:
+// RAW-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 64
+// RAW-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
+// RAW: [[FOR_BODY]]:
+// RAW-NEXT: call void @opaque() #[[ATTR3]]
+// RAW-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64
+// RAW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i8], ptr @enabled, i64 0, i64 [[IDXPROM]]
+// RAW-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
+// RAW-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
+// RAW-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// RAW: [[IF_THEN]]:
+// RAW-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 8
+// RAW-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[IDXPROM1:%.*]] = sext i32 [[TMP5]] to i64
+// RAW-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 [[IDXPROM1]]
+// RAW-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX2]], align 8
+// RAW-NEXT: call void @consume(double noundef [[TMP6]]) #[[ATTR3]]
+// RAW-NEXT: br label %[[IF_END]]
+// RAW: [[IF_END]]:
+// RAW-NEXT: br label %[[FOR_INC:.*]]
+// RAW: [[FOR_INC]]:
+// RAW-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4
+// RAW-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
+// RAW-NEXT: store i32 [[INC]], ptr [[I]], align 4
+// RAW-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
+// RAW: [[FOR_END]]:
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define dso_local void @reference_capture(
+// RAW-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR0]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// RAW-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @reference_capture.omp_outlined, ptr [[TMP0]])
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define internal void @reference_capture.omp_outlined(
+// RAW-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[TMP:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// RAW-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
+// RAW-NEXT: call void @opaque() #[[ATTR3]]
+// RAW-NEXT: [[TMP1:%.*]] = load i8, ptr @enabled, align 16
+// RAW-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
+// RAW-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// RAW: [[IF_THEN]]:
+// RAW-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
+// RAW-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8
+// RAW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 0
+// RAW-NEXT: [[TMP4:%.*]] = load double, ptr [[ARRAYIDX]], align 8
+// RAW-NEXT: call void @consume(double noundef [[TMP4]]) #[[ATTR3]]
+// RAW-NEXT: br label %[[IF_END]]
+// RAW: [[IF_END]]:
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define dso_local void @firstprivate_capture(
+// RAW-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @firstprivate_capture.omp_outlined, ptr [[TMP0]])
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define internal void @firstprivate_capture.omp_outlined(
+// RAW-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[VALUES:%.*]]) #[[ATTR1]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: call void @opaque() #[[ATTR3]]
+// RAW-NEXT: [[TMP0:%.*]] = load i8, ptr @enabled, align 16
+// RAW-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
+// RAW-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// RAW: [[IF_THEN]]:
+// RAW-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP1]], i64 0
+// RAW-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8
+// RAW-NEXT: call void @consume(double noundef [[TMP2]]) #[[ATTR3]]
+// RAW-NEXT: br label %[[IF_END]]
+// RAW: [[IF_END]]:
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define dso_local void @serialized_capture(
+// RAW-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
+// RAW-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
+// RAW-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])
+// RAW-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4
+// RAW-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
+// RAW-NEXT: call void @serialized_capture.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[VALUES_ADDR]]) #[[ATTR3]]
+// RAW-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])
+// RAW-NEXT: ret void
+//
+//
+// RAW-LABEL: define internal void @serialized_capture.omp_outlined(
+// RAW-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] {
+// RAW-NEXT: [[ENTRY:.*:]]
+// RAW-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// RAW-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
+// RAW-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP1]], i64 0
+// RAW-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8
+// RAW-NEXT: call void @consume(double noundef [[TMP2]]) #[[ATTR3]]
+// RAW-NEXT: ret void
+//
+//
+// RAW-DEBUG-LABEL: define dso_local void @pointer_capture(
+// RAW-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG12:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META16:![0-9]+]], !DIExpression(), [[META17:![0-9]+]])
+// RAW-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @pointer_capture.omp_outlined, ptr [[VALUES_ADDR]]), !dbg [[DBG18:![0-9]+]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG19:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @pointer_capture.omp_outlined_debug__(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG20:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[SUM:%.*]] = alloca double, align 8
+// RAW-DEBUG-NEXT: [[I:%.*]] = alloca i32, align 4
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META29:![0-9]+]], !DIExpression(), [[META30:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META31:![0-9]+]], !DIExpression(), [[META30]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META32:![0-9]+]], !DIExpression(), [[META33:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !nonnull [[META15:![0-9]+]], !align [[META35:![0-9]+]]
+// RAW-DEBUG-NEXT: call void @opaque() #[[ATTR3:[0-9]+]], !dbg [[DBG36:![0-9]+]]
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[SUM]], [[META38:![0-9]+]], !DIExpression(), [[META39:![0-9]+]])
+// RAW-DEBUG-NEXT: store double 0.000000e+00, ptr [[SUM]], align 8, !dbg [[META39]]
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[I]], [[META40:![0-9]+]], !DIExpression(), [[META42:![0-9]+]])
+// RAW-DEBUG-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[META42]]
+// RAW-DEBUG-NEXT: br label %[[FOR_COND:.*]], !dbg [[DBG43:![0-9]+]]
+// RAW-DEBUG: [[FOR_COND]]:
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG44:![0-9]+]]
+// RAW-DEBUG-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 64, !dbg [[DBG46:![0-9]+]]
+// RAW-DEBUG-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]], !dbg [[DBG47:![0-9]+]]
+// RAW-DEBUG: [[FOR_BODY]]:
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG48:![0-9]+]]
+// RAW-DEBUG-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64, !dbg [[DBG50:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i8], ptr @enabled, i64 0, i64 [[IDXPROM]], !dbg [[DBG50]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !dbg [[DBG50]]
+// RAW-DEBUG-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0, !dbg [[DBG50]]
+// RAW-DEBUG-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]], !dbg [[DBG50]]
+// RAW-DEBUG: [[IF_THEN]]:
+// RAW-DEBUG-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 8, !dbg [[DBG51:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG52:![0-9]+]]
+// RAW-DEBUG-NEXT: [[IDXPROM1:%.*]] = sext i32 [[TMP5]] to i64, !dbg [[DBG51]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 [[IDXPROM1]], !dbg [[DBG51]]
+// RAW-DEBUG-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX2]], align 8, !dbg [[DBG51]]
+// RAW-DEBUG-NEXT: [[TMP7:%.*]] = load double, ptr [[SUM]], align 8, !dbg [[DBG53:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ADD:%.*]] = fadd double [[TMP7]], [[TMP6]], !dbg [[DBG53]]
+// RAW-DEBUG-NEXT: store double [[ADD]], ptr [[SUM]], align 8, !dbg [[DBG53]]
+// RAW-DEBUG-NEXT: br label %[[IF_END]], !dbg [[DBG54:![0-9]+]]
+// RAW-DEBUG: [[IF_END]]:
+// RAW-DEBUG-NEXT: br label %[[FOR_INC:.*]], !dbg [[DBG55:![0-9]+]]
+// RAW-DEBUG: [[FOR_INC]]:
+// RAW-DEBUG-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG56:![0-9]+]]
+// RAW-DEBUG-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1, !dbg [[DBG56]]
+// RAW-DEBUG-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG56]]
+// RAW-DEBUG-NEXT: br label %[[FOR_COND]], !dbg [[DBG57:![0-9]+]], !llvm.loop [[LOOP58:![0-9]+]]
+// RAW-DEBUG: [[FOR_END]]:
+// RAW-DEBUG-NEXT: [[TMP9:%.*]] = load double, ptr [[SUM]], align 8, !dbg [[DBG61:![0-9]+]]
+// RAW-DEBUG-NEXT: call void @consume(double noundef [[TMP9]]) #[[ATTR3]], !dbg [[DBG62:![0-9]+]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG63:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @pointer_capture.omp_outlined(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG64:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META65:![0-9]+]], !DIExpression(), [[META66:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META67:![0-9]+]], !DIExpression(), [[META66]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META68:![0-9]+]], !DIExpression(), [[META66]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG69:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG69]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG69]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG69]]
+// RAW-DEBUG-NEXT: call void @pointer_capture.omp_outlined_debug__(ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]], !dbg [[DBG69]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG69]]
+//
+//
+// RAW-DEBUG-LABEL: define dso_local void @scalar_capture(
+// RAW-DEBUG-SAME: double noundef [[VALUE:%.*]]) #[[ATTR0]] !dbg [[DBG72:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[VALUE_ADDR:%.*]] = alloca double, align 8
+// RAW-DEBUG-NEXT: store double [[VALUE]], ptr [[VALUE_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUE_ADDR]], [[META75:![0-9]+]], !DIExpression(), [[META76:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load double, ptr [[VALUE_ADDR]], align 8, !dbg [[DBG77:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ADD:%.*]] = fadd double [[TMP0]], 1.000000e+00, !dbg [[DBG77]]
+// RAW-DEBUG-NEXT: store double [[ADD]], ptr [[VALUE_ADDR]], align 8, !dbg [[DBG77]]
+// RAW-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @scalar_capture.omp_outlined, ptr [[VALUE_ADDR]]), !dbg [[DBG78:![0-9]+]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG79:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @scalar_capture.omp_outlined_debug__(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUE:%.*]]) #[[ATTR1]] !dbg [[DBG80:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUE_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[SUM:%.*]] = alloca double, align 8
+// RAW-DEBUG-NEXT: [[I:%.*]] = alloca i32, align 4
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META84:![0-9]+]], !DIExpression(), [[META85:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META86:![0-9]+]], !DIExpression(), [[META85]])
+// RAW-DEBUG-NEXT: store ptr [[VALUE]], ptr [[VALUE_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUE_ADDR]], [[META87:![0-9]+]], !DIExpression(), [[META88:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUE_ADDR]], align 8, !dbg [[DBG89:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: call void @opaque() #[[ATTR3]], !dbg [[DBG90:![0-9]+]]
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[SUM]], [[META92:![0-9]+]], !DIExpression(), [[META93:![0-9]+]])
+// RAW-DEBUG-NEXT: store double 0.000000e+00, ptr [[SUM]], align 8, !dbg [[META93]]
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[I]], [[META94:![0-9]+]], !DIExpression(), [[META96:![0-9]+]])
+// RAW-DEBUG-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[META96]]
+// RAW-DEBUG-NEXT: br label %[[FOR_COND:.*]], !dbg [[DBG97:![0-9]+]]
+// RAW-DEBUG: [[FOR_COND]]:
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG98:![0-9]+]]
+// RAW-DEBUG-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 64, !dbg [[DBG100:![0-9]+]]
+// RAW-DEBUG-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]], !dbg [[DBG101:![0-9]+]]
+// RAW-DEBUG: [[FOR_BODY]]:
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG102:![0-9]+]]
+// RAW-DEBUG-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64, !dbg [[DBG104:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i8], ptr @enabled, i64 0, i64 [[IDXPROM]], !dbg [[DBG104]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !dbg [[DBG104]]
+// RAW-DEBUG-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0, !dbg [[DBG104]]
+// RAW-DEBUG-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]], !dbg [[DBG104]]
+// RAW-DEBUG: [[IF_THEN]]:
+// RAW-DEBUG-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP0]], align 8, !dbg [[DBG105:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP5:%.*]] = load double, ptr [[SUM]], align 8, !dbg [[DBG106:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ADD:%.*]] = fadd double [[TMP5]], [[TMP4]], !dbg [[DBG106]]
+// RAW-DEBUG-NEXT: store double [[ADD]], ptr [[SUM]], align 8, !dbg [[DBG106]]
+// RAW-DEBUG-NEXT: br label %[[IF_END]], !dbg [[DBG107:![0-9]+]]
+// RAW-DEBUG: [[IF_END]]:
+// RAW-DEBUG-NEXT: br label %[[FOR_INC:.*]], !dbg [[DBG108:![0-9]+]]
+// RAW-DEBUG: [[FOR_INC]]:
+// RAW-DEBUG-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG109:![0-9]+]]
+// RAW-DEBUG-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1, !dbg [[DBG109]]
+// RAW-DEBUG-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG109]]
+// RAW-DEBUG-NEXT: br label %[[FOR_COND]], !dbg [[DBG110:![0-9]+]], !llvm.loop [[LOOP111:![0-9]+]]
+// RAW-DEBUG: [[FOR_END]]:
+// RAW-DEBUG-NEXT: [[TMP7:%.*]] = load double, ptr [[SUM]], align 8, !dbg [[DBG113:![0-9]+]]
+// RAW-DEBUG-NEXT: call void @consume(double noundef [[TMP7]]) #[[ATTR3]], !dbg [[DBG114:![0-9]+]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG115:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @scalar_capture.omp_outlined(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUE:%.*]]) #[[ATTR1]] !dbg [[DBG116:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUE_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META117:![0-9]+]], !DIExpression(), [[META118:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META119:![0-9]+]], !DIExpression(), [[META118]])
+// RAW-DEBUG-NEXT: store ptr [[VALUE]], ptr [[VALUE_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUE_ADDR]], [[META120:![0-9]+]], !DIExpression(), [[META118]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUE_ADDR]], align 8, !dbg [[DBG121:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG121]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG121]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VALUE_ADDR]], align 8, !dbg [[DBG121]]
+// RAW-DEBUG-NEXT: call void @scalar_capture.omp_outlined_debug__(ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]], !dbg [[DBG121]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG121]]
+//
+//
+// RAW-DEBUG-LABEL: define dso_local void @escaped_capture(
+// RAW-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0]] !dbg [[DBG122:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META123:![0-9]+]], !DIExpression(), [[META124:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES_ADDR]], ptr @escaped, align 8, !dbg [[DBG125:![0-9]+]]
+// RAW-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB5:[0-9]+]], i32 1, ptr @escaped_capture.omp_outlined, ptr [[VALUES_ADDR]]), !dbg [[DBG126:![0-9]+]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG127:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @escaped_capture.omp_outlined_debug__(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG128:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[I:%.*]] = alloca i32, align 4
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META129:![0-9]+]], !DIExpression(), [[META130:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META131:![0-9]+]], !DIExpression(), [[META130]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META132:![0-9]+]], !DIExpression(), [[META133:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG134:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[I]], [[META135:![0-9]+]], !DIExpression(), [[META137:![0-9]+]])
+// RAW-DEBUG-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[META137]]
+// RAW-DEBUG-NEXT: br label %[[FOR_COND:.*]], !dbg [[DBG138:![0-9]+]]
+// RAW-DEBUG: [[FOR_COND]]:
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG139:![0-9]+]]
+// RAW-DEBUG-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 64, !dbg [[DBG141:![0-9]+]]
+// RAW-DEBUG-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]], !dbg [[DBG142:![0-9]+]]
+// RAW-DEBUG: [[FOR_BODY]]:
+// RAW-DEBUG-NEXT: call void @opaque() #[[ATTR3]], !dbg [[DBG143:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG145:![0-9]+]]
+// RAW-DEBUG-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64, !dbg [[DBG147:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i8], ptr @enabled, i64 0, i64 [[IDXPROM]], !dbg [[DBG147]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !dbg [[DBG147]]
+// RAW-DEBUG-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0, !dbg [[DBG147]]
+// RAW-DEBUG-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]], !dbg [[DBG147]]
+// RAW-DEBUG: [[IF_THEN]]:
+// RAW-DEBUG-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 8, !dbg [[DBG148:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG149:![0-9]+]]
+// RAW-DEBUG-NEXT: [[IDXPROM1:%.*]] = sext i32 [[TMP5]] to i64, !dbg [[DBG148]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 [[IDXPROM1]], !dbg [[DBG148]]
+// RAW-DEBUG-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX2]], align 8, !dbg [[DBG148]]
+// RAW-DEBUG-NEXT: call void @consume(double noundef [[TMP6]]) #[[ATTR3]], !dbg [[DBG150:![0-9]+]]
+// RAW-DEBUG-NEXT: br label %[[IF_END]], !dbg [[DBG150]]
+// RAW-DEBUG: [[IF_END]]:
+// RAW-DEBUG-NEXT: br label %[[FOR_INC:.*]], !dbg [[DBG151:![0-9]+]]
+// RAW-DEBUG: [[FOR_INC]]:
+// RAW-DEBUG-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG152:![0-9]+]]
+// RAW-DEBUG-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG152]]
+// RAW-DEBUG-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG152]]
+// RAW-DEBUG-NEXT: br label %[[FOR_COND]], !dbg [[DBG153:![0-9]+]], !llvm.loop [[LOOP154:![0-9]+]]
+// RAW-DEBUG: [[FOR_END]]:
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG156:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @escaped_capture.omp_outlined(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG157:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META158:![0-9]+]], !DIExpression(), [[META159:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META160:![0-9]+]], !DIExpression(), [[META159]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META161:![0-9]+]], !DIExpression(), [[META159]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG162:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG162]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG162]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG162]]
+// RAW-DEBUG-NEXT: call void @escaped_capture.omp_outlined_debug__(ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]], !dbg [[DBG162]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG162]]
+//
+//
+// RAW-DEBUG-LABEL: define dso_local void @reference_capture(
+// RAW-DEBUG-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR0]] !dbg [[DBG163:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META166:![0-9]+]], !DIExpression(), [[META167:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG168:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB7:[0-9]+]], i32 1, ptr @reference_capture.omp_outlined, ptr [[TMP0]]), !dbg [[DBG170:![0-9]+]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG171:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @reference_capture.omp_outlined_debug__(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG172:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[TMP:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META173:![0-9]+]], !DIExpression(), [[META174:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META175:![0-9]+]], !DIExpression(), [[META174]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META176:![0-9]+]], !DIExpression(), [[META177:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG178:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8, !dbg [[DBG178]]
+// RAW-DEBUG-NEXT: call void @opaque() #[[ATTR3]], !dbg [[DBG179:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load i8, ptr @enabled, align 16, !dbg [[DBG181:![0-9]+]]
+// RAW-DEBUG-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0, !dbg [[DBG181]]
+// RAW-DEBUG-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]], !dbg [[DBG181]]
+// RAW-DEBUG: [[IF_THEN]]:
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !dbg [[DBG183:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8, !dbg [[DBG183]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 0, !dbg [[DBG183]]
+// RAW-DEBUG-NEXT: [[TMP4:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !dbg [[DBG183]]
+// RAW-DEBUG-NEXT: call void @consume(double noundef [[TMP4]]) #[[ATTR3]], !dbg [[DBG184:![0-9]+]]
+// RAW-DEBUG-NEXT: br label %[[IF_END]], !dbg [[DBG184]]
+// RAW-DEBUG: [[IF_END]]:
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG185:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @reference_capture.omp_outlined(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG186:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META187:![0-9]+]], !DIExpression(), [[META188:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META189:![0-9]+]], !DIExpression(), [[META188]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META190:![0-9]+]], !DIExpression(), [[META188]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG191:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG191]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG191]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG191]]
+// RAW-DEBUG-NEXT: call void @reference_capture.omp_outlined_debug__(ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]], !dbg [[DBG191]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG191]]
+//
+//
+// RAW-DEBUG-LABEL: define dso_local void @firstprivate_capture(
+// RAW-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0]] !dbg [[DBG192:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META193:![0-9]+]], !DIExpression(), [[META194:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG195:![0-9]+]]
+// RAW-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB9:[0-9]+]], i32 1, ptr @firstprivate_capture.omp_outlined, ptr [[TMP0]]), !dbg [[DBG195]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG196:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @firstprivate_capture.omp_outlined_debug__(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG197:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META200:![0-9]+]], !DIExpression(), [[META201:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META202:![0-9]+]], !DIExpression(), [[META201]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META203:![0-9]+]], !DIExpression(), [[META204:![0-9]+]])
+// RAW-DEBUG-NEXT: call void @opaque() #[[ATTR3]], !dbg [[DBG205:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load i8, ptr @enabled, align 16, !dbg [[DBG207:![0-9]+]]
+// RAW-DEBUG-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0, !dbg [[DBG207]]
+// RAW-DEBUG-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]], !dbg [[DBG207]]
+// RAW-DEBUG: [[IF_THEN]]:
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG209:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP1]], i64 0, !dbg [[DBG209]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !dbg [[DBG209]]
+// RAW-DEBUG-NEXT: call void @consume(double noundef [[TMP2]]) #[[ATTR3]], !dbg [[DBG210:![0-9]+]]
+// RAW-DEBUG-NEXT: br label %[[IF_END]], !dbg [[DBG210]]
+// RAW-DEBUG: [[IF_END]]:
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG211:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @firstprivate_capture.omp_outlined(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG212:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META213:![0-9]+]], !DIExpression(), [[META214:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META215:![0-9]+]], !DIExpression(), [[META214]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META216:![0-9]+]], !DIExpression(), [[META214]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG217:![0-9]+]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG217]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG217]]
+// RAW-DEBUG-NEXT: call void @firstprivate_capture.omp_outlined_debug__(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]]) #[[ATTR3]], !dbg [[DBG217]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG217]]
+//
+//
+// RAW-DEBUG-LABEL: define dso_local void @serialized_capture(
+// RAW-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) #[[ATTR0]] !dbg [[DBG218:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
+// RAW-DEBUG-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB11:[0-9]+]]), !dbg [[DBG219:![0-9]+]]
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META222:![0-9]+]], !DIExpression(), [[META223:![0-9]+]])
+// RAW-DEBUG-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB11]], i32 [[TMP0]]), !dbg [[DBG224:![0-9]+]]
+// RAW-DEBUG-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4, !dbg [[DBG224]]
+// RAW-DEBUG-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !dbg [[DBG224]]
+// RAW-DEBUG-NEXT: call void @serialized_capture.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[VALUES_ADDR]]) #[[ATTR3]], !dbg [[DBG219]]
+// RAW-DEBUG-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB11]], i32 [[TMP0]]), !dbg [[DBG224]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG225:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @serialized_capture.omp_outlined_debug__(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG226:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META227:![0-9]+]], !DIExpression(), [[META228:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META229:![0-9]+]], !DIExpression(), [[META228]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META230:![0-9]+]], !DIExpression(), [[META231:![0-9]+]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG232:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8, !dbg [[DBG233:![0-9]+]]
+// RAW-DEBUG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP1]], i64 0, !dbg [[DBG233]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !dbg [[DBG233]]
+// RAW-DEBUG-NEXT: call void @consume(double noundef [[TMP2]]) #[[ATTR3]], !dbg [[DBG232]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG234:![0-9]+]]
+//
+//
+// RAW-DEBUG-LABEL: define internal void @serialized_capture.omp_outlined(
+// RAW-DEBUG-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG235:![0-9]+]] {
+// RAW-DEBUG-NEXT: [[ENTRY:.*:]]
+// RAW-DEBUG-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// RAW-DEBUG-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META236:![0-9]+]], !DIExpression(), [[META237:![0-9]+]])
+// RAW-DEBUG-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META238:![0-9]+]], !DIExpression(), [[META237]])
+// RAW-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8
+// RAW-DEBUG-NEXT: #dbg_declare(ptr [[VALUES_ADDR]], [[META239:![0-9]+]], !DIExpression(), [[META237]])
+// RAW-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG240:![0-9]+]], !nonnull [[META15]], !align [[META35]]
+// RAW-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG240]]
+// RAW-DEBUG-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG240]]
+// RAW-DEBUG-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VALUES_ADDR]], align 8, !dbg [[DBG240]]
+// RAW-DEBUG-NEXT: call void @serialized_capture.omp_outlined_debug__(ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]], !dbg [[DBG240]]
+// RAW-DEBUG-NEXT: ret void, !dbg [[DBG240]]
+//
+//
+// OPT-LABEL: define dso_local void @pointer_capture(
+// OPT-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// OPT-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8, !tbaa [[DOUBLEPTR_TBAA7:![0-9]+]]
+// OPT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB1:[0-9]+]], i32 1, ptr nonnull @pointer_capture.omp_outlined, ptr nonnull [[VALUES_ADDR]])
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define internal void @pointer_capture.omp_outlined(
+// OPT-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1:[0-9]+]] {
+// OPT-NEXT: [[ENTRY:.*]]:
+// OPT-NEXT: tail call void @opaque() #[[ATTR3:[0-9]+]]
+// OPT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES]], align 8
+// OPT-NEXT: br label %[[FOR_BODY:.*]]
+// OPT: [[FOR_COND_CLEANUP:.*]]:
+// OPT-NEXT: tail call void @consume(double noundef [[SUM_1:%.*]]) #[[ATTR3]]
+// OPT-NEXT: ret void
+// OPT: [[FOR_BODY]]:
+// OPT-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_INC:.*]] ]
+// OPT-NEXT: [[SUM_07:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[SUM_1]], %[[FOR_INC]] ]
+// OPT-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr @enabled, i64 [[INDVARS_IV]]
+// OPT-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[BOOL_TBAA10:![0-9]+]], !range [[RNG12:![0-9]+]], !noundef [[META13:![0-9]+]]
+// OPT-NEXT: [[LOADEDV:%.*]] = trunc nuw i8 [[TMP1]] to i1
+// OPT-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[FOR_INC]]
+// OPT: [[IF_THEN]]:
+// OPT-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[TMP0]], i64 [[INDVARS_IV]]
+// OPT-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX2]], align 8, !tbaa [[DOUBLE_TBAA14:![0-9]+]]
+// OPT-NEXT: [[ADD:%.*]] = fadd double [[SUM_07]], [[TMP2]]
+// OPT-NEXT: br label %[[FOR_INC]]
+// OPT: [[FOR_INC]]:
+// OPT-NEXT: [[SUM_1]] = phi double [ [[ADD]], %[[IF_THEN]] ], [ [[SUM_07]], %[[FOR_BODY]] ]
+// OPT-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+// OPT-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
+// OPT-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+//
+//
+// OPT-LABEL: define dso_local void @scalar_capture(
+// OPT-SAME: double noundef [[VALUE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: [[VALUE_ADDR:%.*]] = alloca double, align 8
+// OPT-NEXT: [[ADD:%.*]] = fadd double [[VALUE]], 1.000000e+00
+// OPT-NEXT: store double [[ADD]], ptr [[VALUE_ADDR]], align 8, !tbaa [[DOUBLE_TBAA14]]
+// OPT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB1]], i32 1, ptr nonnull @scalar_capture.omp_outlined, ptr nonnull [[VALUE_ADDR]])
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define internal void @scalar_capture.omp_outlined(
+// OPT-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUE:%.*]]) #[[ATTR1]] {
+// OPT-NEXT: [[ENTRY:.*]]:
+// OPT-NEXT: tail call void @opaque() #[[ATTR3]]
+// OPT-NEXT: [[TMP0:%.*]] = load double, ptr [[VALUE]], align 8
+// OPT-NEXT: br label %[[FOR_BODY:.*]]
+// OPT: [[FOR_COND_CLEANUP:.*]]:
+// OPT-NEXT: tail call void @consume(double noundef [[SUM_1:%.*]]) #[[ATTR3]]
+// OPT-NEXT: ret void
+// OPT: [[FOR_BODY]]:
+// OPT-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+// OPT-NEXT: [[SUM_04:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[SUM_1]], %[[FOR_BODY]] ]
+// OPT-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr @enabled, i64 [[INDVARS_IV]]
+// OPT-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[BOOL_TBAA10]], !range [[RNG12]], !noundef [[META13]]
+// OPT-NEXT: [[LOADEDV:%.*]] = trunc nuw i8 [[TMP1]] to i1
+// OPT-NEXT: [[ADD:%.*]] = fadd double [[SUM_04]], [[TMP0]]
+// OPT-NEXT: [[SUM_1]] = select i1 [[LOADEDV]], double [[ADD]], double [[SUM_04]]
+// OPT-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+// OPT-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
+// OPT-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
+//
+//
+// OPT-LABEL: define dso_local void @escaped_capture(
+// OPT-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// OPT-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8, !tbaa [[DOUBLEPTR_TBAA7]]
+// OPT-NEXT: store ptr [[VALUES_ADDR]], ptr @escaped, align 8, !tbaa [[DOUBLEPTR_TBAA21:![0-9]+]]
+// OPT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB1]], i32 1, ptr nonnull @escaped_capture.omp_outlined, ptr nonnull [[VALUES_ADDR]])
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define internal void @escaped_capture.omp_outlined(
+// OPT-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] {
+// OPT-NEXT: [[ENTRY:.*]]:
+// OPT-NEXT: br label %[[FOR_BODY:.*]]
+// OPT: [[FOR_COND_CLEANUP:.*]]:
+// OPT-NEXT: ret void
+// OPT: [[FOR_BODY]]:
+// OPT-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_INC:.*]] ]
+// OPT-NEXT: tail call void @opaque() #[[ATTR3]]
+// OPT-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr @enabled, i64 [[INDVARS_IV]]
+// OPT-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[BOOL_TBAA10]], !range [[RNG12]], !noundef [[META13]]
+// OPT-NEXT: [[LOADEDV:%.*]] = trunc nuw i8 [[TMP0]] to i1
+// OPT-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[FOR_INC]]
+// OPT: [[IF_THEN]]:
+// OPT-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VALUES]], align 8, !tbaa [[DOUBLEPTR_TBAA7]]
+// OPT-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[TMP1]], i64 [[INDVARS_IV]]
+// OPT-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX2]], align 8, !tbaa [[DOUBLE_TBAA14]]
+// OPT-NEXT: tail call void @consume(double noundef [[TMP2]]) #[[ATTR3]]
+// OPT-NEXT: br label %[[FOR_INC]]
+// OPT: [[FOR_INC]]:
+// OPT-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+// OPT-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
+// OPT-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
+//
+//
+// OPT-LABEL: define dso_local void @reference_capture(
+// OPT-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: tail call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB1]], i32 1, ptr nonnull @reference_capture.omp_outlined, ptr nonnull [[VALUES]])
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define internal void @reference_capture.omp_outlined(
+// OPT-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofree noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: tail call void @opaque() #[[ATTR3]]
+// OPT-NEXT: [[TMP0:%.*]] = load i8, ptr @enabled, align 16, !tbaa [[BOOL_TBAA10]], !range [[RNG12]], !noundef [[META13]]
+// OPT-NEXT: [[LOADEDV:%.*]] = trunc nuw i8 [[TMP0]] to i1
+// OPT-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// OPT: [[IF_THEN]]:
+// OPT-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VALUES]], align 8, !tbaa [[DOUBLEPTR_TBAA7]]
+// OPT-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP1]], align 8, !tbaa [[DOUBLE_TBAA14]]
+// OPT-NEXT: tail call void @consume(double noundef [[TMP2]]) #[[ATTR3]]
+// OPT-NEXT: br label %[[IF_END]]
+// OPT: [[IF_END]]:
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define dso_local void @firstprivate_capture(
+// OPT-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: tail call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB1]], i32 1, ptr nonnull @firstprivate_capture.omp_outlined, ptr [[VALUES]])
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define internal void @firstprivate_capture.omp_outlined(
+// OPT-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofree noundef readonly captures(none) [[VALUES:%.*]]) #[[ATTR1]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: tail call void @opaque() #[[ATTR3]]
+// OPT-NEXT: [[TMP0:%.*]] = load i8, ptr @enabled, align 16, !tbaa [[BOOL_TBAA10]], !range [[RNG12]], !noundef [[META13]]
+// OPT-NEXT: [[LOADEDV:%.*]] = trunc nuw i8 [[TMP0]] to i1
+// OPT-NEXT: br i1 [[LOADEDV]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+// OPT: [[IF_THEN]]:
+// OPT-NEXT: [[TMP1:%.*]] = load double, ptr [[VALUES]], align 8, !tbaa [[DOUBLE_TBAA14]]
+// OPT-NEXT: tail call void @consume(double noundef [[TMP1]]) #[[ATTR3]]
+// OPT-NEXT: br label %[[IF_END]]
+// OPT: [[IF_END]]:
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define dso_local void @serialized_capture(
+// OPT-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8
+// OPT-NEXT: [[TMP0:%.*]] = tail call i32 @__kmpc_global_thread_num(ptr nonnull @[[GLOB1]])
+// OPT-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8, !tbaa [[DOUBLEPTR_TBAA7]]
+// OPT-NEXT: tail call void @__kmpc_serialized_parallel(ptr nonnull @[[GLOB1]], i32 [[TMP0]])
+// OPT-NEXT: call fastcc void @serialized_capture.omp_outlined(ptr [[VALUES_ADDR]]) #[[ATTR3]]
+// OPT-NEXT: tail call void @__kmpc_end_serialized_parallel(ptr nonnull @[[GLOB1]], i32 [[TMP0]])
+// OPT-NEXT: ret void
+//
+//
+// OPT-LABEL: define internal fastcc void @serialized_capture.omp_outlined(
+// OPT-SAME: ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] {
+// OPT-NEXT: [[ENTRY:.*:]]
+// OPT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES]], align 8, !tbaa [[DOUBLEPTR_TBAA7]]
+// OPT-NEXT: [[TMP1:%.*]] = load double, ptr [[TMP0]], align 8, !tbaa [[DOUBLE_TBAA14]]
+// OPT-NEXT: tail call void @consume(double noundef [[TMP1]]) #[[ATTR3]]
+// OPT-NEXT: ret void
+//
+//
+// OPT-DEBUG-LABEL: define dso_local void @pointer_capture(
+// OPT-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] !dbg [[DBG18:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8, !DIAssignID [[DIASSIGNID23:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(i1 poison, [[META22:![0-9]+]], !DIExpression(), [[DIASSIGNID23]], ptr [[VALUES_ADDR]], !DIExpression(), [[META24:![0-9]+]])
+// OPT-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8, !tbaa [[DOUBLEPTR_TBAA25:![0-9]+]], !DIAssignID [[DIASSIGNID28:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(ptr [[VALUES]], [[META22]], !DIExpression(), [[DIASSIGNID28]], ptr [[VALUES_ADDR]], !DIExpression(), [[META24]])
+// OPT-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB1:[0-9]+]], i32 1, ptr nonnull @pointer_capture.omp_outlined, ptr nonnull [[VALUES_ADDR]]), !dbg [[DBG29:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG30:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define internal void @pointer_capture.omp_outlined(
+// OPT-DEBUG-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG31:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*]]:
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META41:![0-9]+]], !DIExpression(), [[META44:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META42:![0-9]+]], !DIExpression(), [[META44]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META43:![0-9]+]], !DIExpression(), [[META44]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META45:![0-9]+]], !DIExpression(), [[META54:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META48:![0-9]+]], !DIExpression(), [[META54]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META49:![0-9]+]], !DIExpression(), [[META54]])
+// OPT-DEBUG-NEXT: tail call void @opaque() #[[ATTR3:[0-9]+]], !dbg [[DBG56:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_value(double 0.000000e+00, [[META50:![0-9]+]], !DIExpression(), [[META57:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(i32 0, [[META52:![0-9]+]], !DIExpression(), [[META58:![0-9]+]])
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES]], align 8
+// OPT-DEBUG-NEXT: br label %[[FOR_BODY_I:.*]], !dbg [[DBG59:![0-9]+]]
+// OPT-DEBUG: [[FOR_BODY_I]]:
+// OPT-DEBUG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_INC_I:.*]] ]
+// OPT-DEBUG-NEXT: [[SUM_0_I2:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[SUM_1_I:%.*]], %[[FOR_INC_I]] ]
+// OPT-DEBUG-NEXT: #dbg_value(i64 [[INDVARS_IV]], [[META52]], !DIExpression(), [[META58]])
+// OPT-DEBUG-NEXT: #dbg_value(double [[SUM_0_I2]], [[META50]], !DIExpression(), [[META57]])
+// OPT-DEBUG-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds nuw i8, ptr @enabled, i64 [[INDVARS_IV]], !dbg [[DBG60:![0-9]+]]
+// OPT-DEBUG-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX_I]], align 1, !dbg [[DBG60]], !tbaa [[BOOL_TBAA63:![0-9]+]], !range [[RNG65:![0-9]+]], !noundef [[META66:![0-9]+]]
+// OPT-DEBUG-NEXT: [[LOADEDV_I:%.*]] = trunc nuw i8 [[TMP1]] to i1, !dbg [[DBG60]]
+// OPT-DEBUG-NEXT: br i1 [[LOADEDV_I]], label %[[IF_THEN_I:.*]], label %[[FOR_INC_I]], !dbg [[DBG60]]
+// OPT-DEBUG: [[IF_THEN_I]]:
+// OPT-DEBUG-NEXT: [[ARRAYIDX2_I:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[TMP0]], i64 [[INDVARS_IV]], !dbg [[DBG67:![0-9]+]]
+// OPT-DEBUG-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX2_I]], align 8, !dbg [[DBG67]], !tbaa [[DOUBLE_TBAA68:![0-9]+]]
+// OPT-DEBUG-NEXT: [[ADD_I:%.*]] = fadd double [[SUM_0_I2]], [[TMP2]], !dbg [[DBG70:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_value(double [[ADD_I]], [[META50]], !DIExpression(), [[META57]])
+// OPT-DEBUG-NEXT: br label %[[FOR_INC_I]], !dbg [[DBG71:![0-9]+]]
+// OPT-DEBUG: [[FOR_INC_I]]:
+// OPT-DEBUG-NEXT: [[SUM_1_I]] = phi double [ [[ADD_I]], %[[IF_THEN_I]] ], [ [[SUM_0_I2]], %[[FOR_BODY_I]] ], !dbg [[META57]]
+// OPT-DEBUG-NEXT: #dbg_value(double [[SUM_1_I]], [[META50]], !DIExpression(), [[META57]])
+// OPT-DEBUG-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1, !dbg [[DBG72:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_value(i64 [[INDVARS_IV_NEXT]], [[META52]], !DIExpression(), [[META58]])
+// OPT-DEBUG-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64, !dbg [[DBG73:![0-9]+]]
+// OPT-DEBUG-NEXT: br i1 [[EXITCOND_NOT]], label %[[POINTER_CAPTURE_OMP_OUTLINED_DEBUG___EXIT:.*]], label %[[FOR_BODY_I]], !dbg [[DBG59]], !llvm.loop [[LOOP74:![0-9]+]]
+// OPT-DEBUG: [[POINTER_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]]:
+// OPT-DEBUG-NEXT: tail call void @consume(double noundef [[SUM_1_I]]) #[[ATTR3]], !dbg [[DBG77:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG78:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define dso_local void @scalar_capture(
+// OPT-DEBUG-SAME: double noundef [[VALUE:%.*]]) local_unnamed_addr #[[ATTR0]] !dbg [[DBG81:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: [[VALUE_ADDR:%.*]] = alloca double, align 8, !DIAssignID [[DIASSIGNID86:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(i1 poison, [[META85:![0-9]+]], !DIExpression(), [[DIASSIGNID86]], ptr [[VALUE_ADDR]], !DIExpression(), [[META87:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_assign(double [[VALUE]], [[META85]], !DIExpression(), [[META88:![0-9]+]], ptr [[VALUE_ADDR]], !DIExpression(), [[META87]])
+// OPT-DEBUG-NEXT: [[ADD:%.*]] = fadd double [[VALUE]], 1.000000e+00, !dbg [[DBG89:![0-9]+]]
+// OPT-DEBUG-NEXT: store double [[ADD]], ptr [[VALUE_ADDR]], align 8, !dbg [[DBG89]], !tbaa [[DOUBLE_TBAA68]], !DIAssignID [[DIASSIGNID90:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(double [[ADD]], [[META85]], !DIExpression(), [[DIASSIGNID90]], ptr [[VALUE_ADDR]], !DIExpression(), [[META87]])
+// OPT-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB3:[0-9]+]], i32 1, ptr nonnull @scalar_capture.omp_outlined, ptr nonnull [[VALUE_ADDR]]), !dbg [[DBG91:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG92:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define internal void @scalar_capture.omp_outlined(
+// OPT-DEBUG-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUE:%.*]]) #[[ATTR1]] !dbg [[DBG93:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*]]:
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META98:![0-9]+]], !DIExpression(), [[META101:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META99:![0-9]+]], !DIExpression(), [[META101]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUE]], [[META100:![0-9]+]], !DIExpression(), [[META101]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META102:![0-9]+]], !DIExpression(), [[META111:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META105:![0-9]+]], !DIExpression(), [[META111]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUE]], [[META106:![0-9]+]], !DIExpression(), [[META111]])
+// OPT-DEBUG-NEXT: tail call void @opaque() #[[ATTR3]], !dbg [[DBG113:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_value(double 0.000000e+00, [[META107:![0-9]+]], !DIExpression(), [[META114:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(i32 0, [[META109:![0-9]+]], !DIExpression(), [[META115:![0-9]+]])
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = load double, ptr [[VALUE]], align 8
+// OPT-DEBUG-NEXT: #dbg_value(i32 0, [[META109]], !DIExpression(), [[META115]])
+// OPT-DEBUG-NEXT: #dbg_value(double 0.000000e+00, [[META107]], !DIExpression(), [[META114]])
+// OPT-DEBUG-NEXT: br label %[[FOR_BODY_I:.*]], !dbg [[DBG116:![0-9]+]]
+// OPT-DEBUG: [[FOR_BODY_I]]:
+// OPT-DEBUG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY_I]] ]
+// OPT-DEBUG-NEXT: [[SUM_0_I2:%.*]] = phi double [ 0.000000e+00, %[[ENTRY]] ], [ [[SUM_1_I:%.*]], %[[FOR_BODY_I]] ]
+// OPT-DEBUG-NEXT: #dbg_value(i64 [[INDVARS_IV]], [[META109]], !DIExpression(), [[META115]])
+// OPT-DEBUG-NEXT: #dbg_value(double [[SUM_0_I2]], [[META107]], !DIExpression(), [[META114]])
+// OPT-DEBUG-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds nuw i8, ptr @enabled, i64 [[INDVARS_IV]], !dbg [[DBG117:![0-9]+]]
+// OPT-DEBUG-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX_I]], align 1, !dbg [[DBG117]], !tbaa [[BOOL_TBAA63]], !range [[RNG65]], !noundef [[META66]]
+// OPT-DEBUG-NEXT: [[LOADEDV_I:%.*]] = trunc nuw i8 [[TMP1]] to i1, !dbg [[DBG117]]
+// OPT-DEBUG-NEXT: [[ADD_I:%.*]] = fadd double [[SUM_0_I2]], [[TMP0]], !dbg [[DBG117]]
+// OPT-DEBUG-NEXT: [[SUM_1_I]] = select i1 [[LOADEDV_I]], double [[ADD_I]], double [[SUM_0_I2]], !dbg [[DBG117]]
+// OPT-DEBUG-NEXT: #dbg_value(double [[SUM_1_I]], [[META107]], !DIExpression(), [[META114]])
+// OPT-DEBUG-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1, !dbg [[DBG120:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_value(i64 [[INDVARS_IV_NEXT]], [[META109]], !DIExpression(), [[META115]])
+// OPT-DEBUG-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64, !dbg [[DBG121:![0-9]+]]
+// OPT-DEBUG-NEXT: br i1 [[EXITCOND_NOT]], label %[[SCALAR_CAPTURE_OMP_OUTLINED_DEBUG___EXIT:.*]], label %[[FOR_BODY_I]], !dbg [[DBG116]], !llvm.loop [[LOOP122:![0-9]+]]
+// OPT-DEBUG: [[SCALAR_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]]:
+// OPT-DEBUG-NEXT: tail call void @consume(double noundef [[SUM_1_I]]) #[[ATTR3]], !dbg [[DBG124:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG125:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define dso_local void @escaped_capture(
+// OPT-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] !dbg [[DBG126:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8, !DIAssignID [[DIASSIGNID129:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(i1 poison, [[META128:![0-9]+]], !DIExpression(), [[DIASSIGNID129]], ptr [[VALUES_ADDR]], !DIExpression(), [[META130:![0-9]+]])
+// OPT-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8, !tbaa [[DOUBLEPTR_TBAA25]], !DIAssignID [[DIASSIGNID131:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(ptr [[VALUES]], [[META128]], !DIExpression(), [[DIASSIGNID131]], ptr [[VALUES_ADDR]], !DIExpression(), [[META130]])
+// OPT-DEBUG-NEXT: store ptr [[VALUES_ADDR]], ptr @escaped, align 8, !dbg [[DBG132:![0-9]+]], !tbaa [[DOUBLEPTR_TBAA133:![0-9]+]]
+// OPT-DEBUG-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB5:[0-9]+]], i32 1, ptr nonnull @escaped_capture.omp_outlined, ptr nonnull [[VALUES_ADDR]]), !dbg [[DBG136:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG137:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define internal void @escaped_capture.omp_outlined(
+// OPT-DEBUG-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG138:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*]]:
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META140:![0-9]+]], !DIExpression(), [[META143:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META141:![0-9]+]], !DIExpression(), [[META143]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META142:![0-9]+]], !DIExpression(), [[META143]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META144:![0-9]+]], !DIExpression(), [[META151:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META147:![0-9]+]], !DIExpression(), [[META151]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META148:![0-9]+]], !DIExpression(), [[META151]])
+// OPT-DEBUG-NEXT: #dbg_value(i32 0, [[META149:![0-9]+]], !DIExpression(), [[META153:![0-9]+]])
+// OPT-DEBUG-NEXT: br label %[[FOR_BODY_I:.*]], !dbg [[DBG154:![0-9]+]]
+// OPT-DEBUG: [[FOR_BODY_I]]:
+// OPT-DEBUG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_INC_I:.*]] ]
+// OPT-DEBUG-NEXT: #dbg_value(i64 [[INDVARS_IV]], [[META149]], !DIExpression(), [[META153]])
+// OPT-DEBUG-NEXT: tail call void @opaque() #[[ATTR3]], !dbg [[DBG155:![0-9]+]]
+// OPT-DEBUG-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds nuw i8, ptr @enabled, i64 [[INDVARS_IV]], !dbg [[DBG158:![0-9]+]]
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX_I]], align 1, !dbg [[DBG158]], !tbaa [[BOOL_TBAA63]], !range [[RNG65]], !noundef [[META66]]
+// OPT-DEBUG-NEXT: [[LOADEDV_I:%.*]] = trunc nuw i8 [[TMP0]] to i1, !dbg [[DBG158]]
+// OPT-DEBUG-NEXT: br i1 [[LOADEDV_I]], label %[[IF_THEN_I:.*]], label %[[FOR_INC_I]], !dbg [[DBG158]]
+// OPT-DEBUG: [[IF_THEN_I]]:
+// OPT-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VALUES]], align 8, !dbg [[DBG160:![0-9]+]], !tbaa [[DOUBLEPTR_TBAA25]]
+// OPT-DEBUG-NEXT: [[ARRAYIDX2_I:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[TMP1]], i64 [[INDVARS_IV]], !dbg [[DBG160]]
+// OPT-DEBUG-NEXT: [[TMP2:%.*]] = load double, ptr [[ARRAYIDX2_I]], align 8, !dbg [[DBG160]], !tbaa [[DOUBLE_TBAA68]]
+// OPT-DEBUG-NEXT: tail call void @consume(double noundef [[TMP2]]) #[[ATTR3]], !dbg [[DBG161:![0-9]+]]
+// OPT-DEBUG-NEXT: br label %[[FOR_INC_I]], !dbg [[DBG161]]
+// OPT-DEBUG: [[FOR_INC_I]]:
+// OPT-DEBUG-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1, !dbg [[DBG162:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_value(i64 [[INDVARS_IV_NEXT]], [[META149]], !DIExpression(), [[META153]])
+// OPT-DEBUG-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64, !dbg [[DBG163:![0-9]+]]
+// OPT-DEBUG-NEXT: br i1 [[EXITCOND_NOT]], label %[[ESCAPED_CAPTURE_OMP_OUTLINED_DEBUG___EXIT:.*]], label %[[FOR_BODY_I]], !dbg [[DBG154]], !llvm.loop [[LOOP164:![0-9]+]]
+// OPT-DEBUG: [[ESCAPED_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]]:
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG166:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define dso_local void @reference_capture(
+// OPT-DEBUG-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] !dbg [[DBG167:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META171:![0-9]+]], !DIExpression(), [[META172:![0-9]+]])
+// OPT-DEBUG-NEXT: tail call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB7:[0-9]+]], i32 1, ptr nonnull @reference_capture.omp_outlined, ptr nonnull [[VALUES]]), !dbg [[DBG173:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG174:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define internal void @reference_capture.omp_outlined(
+// OPT-DEBUG-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofree noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG175:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META177:![0-9]+]], !DIExpression(), [[META180:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META178:![0-9]+]], !DIExpression(), [[META180]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META179:![0-9]+]], !DIExpression(), [[META180]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META181:![0-9]+]], !DIExpression(), [[META186:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META184:![0-9]+]], !DIExpression(), [[META186]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META185:![0-9]+]], !DIExpression(), [[META186]])
+// OPT-DEBUG-NEXT: tail call void @opaque() #[[ATTR3]], !dbg [[DBG188:![0-9]+]]
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = load i8, ptr @enabled, align 16, !dbg [[DBG190:![0-9]+]], !tbaa [[BOOL_TBAA63]], !range [[RNG65]], !noundef [[META66]]
+// OPT-DEBUG-NEXT: [[LOADEDV_I:%.*]] = trunc nuw i8 [[TMP0]] to i1, !dbg [[DBG190]]
+// OPT-DEBUG-NEXT: br i1 [[LOADEDV_I]], label %[[IF_THEN_I:.*]], label %[[REFERENCE_CAPTURE_OMP_OUTLINED_DEBUG___EXIT:.*]], !dbg [[DBG190]]
+// OPT-DEBUG: [[IF_THEN_I]]:
+// OPT-DEBUG-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VALUES]], align 8, !dbg [[DBG192:![0-9]+]], !tbaa [[DOUBLEPTR_TBAA25]]
+// OPT-DEBUG-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP1]], align 8, !dbg [[DBG192]], !tbaa [[DOUBLE_TBAA68]]
+// OPT-DEBUG-NEXT: tail call void @consume(double noundef [[TMP2]]) #[[ATTR3]], !dbg [[DBG193:![0-9]+]]
+// OPT-DEBUG-NEXT: br label %[[REFERENCE_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]], !dbg [[DBG193]]
+// OPT-DEBUG: [[REFERENCE_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]]:
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG194:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define dso_local void @firstprivate_capture(
+// OPT-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] !dbg [[DBG195:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META197:![0-9]+]], !DIExpression(), [[META198:![0-9]+]])
+// OPT-DEBUG-NEXT: tail call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr nonnull @[[GLOB9:[0-9]+]], i32 1, ptr nonnull @firstprivate_capture.omp_outlined, ptr [[VALUES]]), !dbg [[DBG199:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG200:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define internal void @firstprivate_capture.omp_outlined(
+// OPT-DEBUG-SAME: ptr noalias nofree readnone captures(none) [[DOTGLOBAL_TID_:%.*]], ptr noalias nofree readnone captures(none) [[DOTBOUND_TID_:%.*]], ptr nofree noundef readonly captures(none) [[VALUES:%.*]]) #[[ATTR1]] !dbg [[DBG201:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META205:![0-9]+]], !DIExpression(), [[META208:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META206:![0-9]+]], !DIExpression(), [[META208]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META207:![0-9]+]], !DIExpression(), [[META208]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META209:![0-9]+]], !DIExpression(), [[META214:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META212:![0-9]+]], !DIExpression(), [[META214]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META213:![0-9]+]], !DIExpression(), [[META214]])
+// OPT-DEBUG-NEXT: tail call void @opaque() #[[ATTR3]], !dbg [[DBG216:![0-9]+]]
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = load i8, ptr @enabled, align 16, !dbg [[DBG218:![0-9]+]], !tbaa [[BOOL_TBAA63]], !range [[RNG65]], !noundef [[META66]]
+// OPT-DEBUG-NEXT: [[LOADEDV_I:%.*]] = trunc nuw i8 [[TMP0]] to i1, !dbg [[DBG218]]
+// OPT-DEBUG-NEXT: br i1 [[LOADEDV_I]], label %[[IF_THEN_I:.*]], label %[[FIRSTPRIVATE_CAPTURE_OMP_OUTLINED_DEBUG___EXIT:.*]], !dbg [[DBG218]]
+// OPT-DEBUG: [[IF_THEN_I]]:
+// OPT-DEBUG-NEXT: [[TMP1:%.*]] = load double, ptr [[VALUES]], align 8, !dbg [[DBG220:![0-9]+]], !tbaa [[DOUBLE_TBAA68]]
+// OPT-DEBUG-NEXT: tail call void @consume(double noundef [[TMP1]]) #[[ATTR3]], !dbg [[DBG221:![0-9]+]]
+// OPT-DEBUG-NEXT: br label %[[FIRSTPRIVATE_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]], !dbg [[DBG221]]
+// OPT-DEBUG: [[FIRSTPRIVATE_CAPTURE_OMP_OUTLINED_DEBUG___EXIT]]:
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG222:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define dso_local void @serialized_capture(
+// OPT-DEBUG-SAME: ptr noundef [[VALUES:%.*]]) local_unnamed_addr #[[ATTR0]] !dbg [[DBG223:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: [[VALUES_ADDR:%.*]] = alloca ptr, align 8, !DIAssignID [[DIASSIGNID226:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(i1 poison, [[META225:![0-9]+]], !DIExpression(), [[DIASSIGNID226]], ptr [[VALUES_ADDR]], !DIExpression(), [[META227:![0-9]+]])
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = tail call i32 @__kmpc_global_thread_num(ptr nonnull @[[GLOB11:[0-9]+]]), !dbg [[DBG228:![0-9]+]]
+// OPT-DEBUG-NEXT: store ptr [[VALUES]], ptr [[VALUES_ADDR]], align 8, !tbaa [[DOUBLEPTR_TBAA25]], !DIAssignID [[DIASSIGNID231:![0-9]+]]
+// OPT-DEBUG-NEXT: #dbg_assign(ptr [[VALUES]], [[META225]], !DIExpression(), [[DIASSIGNID231]], ptr [[VALUES_ADDR]], !DIExpression(), [[META227]])
+// OPT-DEBUG-NEXT: tail call void @__kmpc_serialized_parallel(ptr nonnull @[[GLOB11]], i32 [[TMP0]]), !dbg [[DBG232:![0-9]+]]
+// OPT-DEBUG-NEXT: call fastcc void @serialized_capture.omp_outlined(ptr [[VALUES_ADDR]]) #[[ATTR3]], !dbg [[DBG228]]
+// OPT-DEBUG-NEXT: tail call void @__kmpc_end_serialized_parallel(ptr nonnull @[[GLOB11]], i32 [[TMP0]]), !dbg [[DBG232]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG233:![0-9]+]]
+//
+//
+// OPT-DEBUG-LABEL: define internal fastcc void @serialized_capture.omp_outlined(
+// OPT-DEBUG-SAME: ptr nofreeobj noundef nonnull readonly align 8 captures(none) dereferenceable(8) [[VALUES:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] !dbg [[DBG234:![0-9]+]] {
+// OPT-DEBUG-NEXT: [[ENTRY:.*:]]
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META237:![0-9]+]], !DIExpression(), [[META240:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META238:![0-9]+]], !DIExpression(), [[META240]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META239:![0-9]+]], !DIExpression(), [[META240]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META241:![0-9]+]], !DIExpression(), [[META246:![0-9]+]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr poison, [[META244:![0-9]+]], !DIExpression(), [[META246]])
+// OPT-DEBUG-NEXT: #dbg_value(ptr [[VALUES]], [[META245:![0-9]+]], !DIExpression(), [[META246]])
+// OPT-DEBUG-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VALUES]], align 8, !dbg [[DBG248:![0-9]+]], !tbaa [[DOUBLEPTR_TBAA25]]
+// OPT-DEBUG-NEXT: [[TMP1:%.*]] = load double, ptr [[TMP0]], align 8, !dbg [[DBG248]], !tbaa [[DOUBLE_TBAA68]]
+// OPT-DEBUG-NEXT: tail call void @consume(double noundef [[TMP1]]) #[[ATTR3]], !dbg [[DBG249:![0-9]+]]
+// OPT-DEBUG-NEXT: ret void, !dbg [[DBG250:![0-9]+]]
+//
diff --git a/clang/test/OpenMP/cancel_codegen.cpp b/clang/test/OpenMP/cancel_codegen.cpp
index 6e57098483017..200f65068a132 100644
--- a/clang/test/OpenMP/cancel_codegen.cpp
+++ b/clang/test/OpenMP/cancel_codegen.cpp
@@ -300,7 +300,7 @@ for (int i = 0; i < argc; ++i) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -539,7 +539,7 @@ for (int i = 0; i < argc; ++i) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.3
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -935,7 +935,7 @@ for (int i = 0; i < argc; ++i) {
//
//
// CHECK3-LABEL: define {{[^@]+}}@main..omp_par
-// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK3-NEXT: omp.par.entry:
// CHECK3-NEXT: [[GEP_ARGC_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK3-NEXT: [[LOADGEP_ARGC_ADDR:%.*]] = load ptr, ptr [[GEP_ARGC_ADDR]], align 8, !align [[META2:![0-9]+]]
@@ -1195,7 +1195,7 @@ for (int i = 0; i < argc; ++i) {
//
//
// CHECK3-LABEL: define {{[^@]+}}@main.omp_outlined.2
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR5]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/cancellation_point_codegen.cpp b/clang/test/OpenMP/cancellation_point_codegen.cpp
index 152d5f7560f3a..df16524ded52a 100644
--- a/clang/test/OpenMP/cancellation_point_codegen.cpp
+++ b/clang/test/OpenMP/cancellation_point_codegen.cpp
@@ -314,7 +314,7 @@ for (int i = 0; i < argc; ++i) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -324,8 +324,8 @@ for (int i = 0; i < argc; ++i) {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
// CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_cancellationpoint(ptr @[[GLOB1]], i32 [[TMP3]], i32 1)
@@ -374,36 +374,36 @@ for (int i = 0; i < argc; ++i) {
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_cancellationpoint(ptr @[[GLOB1]], i32 [[TMP9]], i32 4)
// CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
// CHECK1-NEXT: br i1 [[TMP11]], label [[DOTCANCEL_EXIT_I:%.*]], label [[DOTCANCEL_CONTINUE_I:%.*]]
// CHECK1: .cancel.exit.i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK1: .cancel.continue.i:
// CHECK1-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB1]], i32 [[TMP9]], i32 4)
// CHECK1-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
// CHECK1-NEXT: br i1 [[TMP13]], label [[DOTCANCEL_EXIT1_I:%.*]], label [[DOTCANCEL_CONTINUE2_I:%.*]]
// CHECK1: .cancel.exit1.i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__EXIT]]
// CHECK1: .cancel.continue2.i:
-// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__EXIT]]
// CHECK1: .omp_outlined..exit:
-// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -427,29 +427,29 @@ for (int i = 0; i < argc; ++i) {
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META26:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META26]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META26]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META26]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META26]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META26]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META26]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META26]]
// CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_cancellationpoint(ptr @[[GLOB1]], i32 [[TMP9]], i32 4)
// CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
// CHECK1-NEXT: br i1 [[TMP11]], label [[DOTCANCEL_EXIT_I:%.*]], label [[DOTCANCEL_CONTINUE_I:%.*]]
// CHECK1: .cancel.exit.i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META24]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META26]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
// CHECK1: .cancel.continue.i:
-// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META24]]
+// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META26]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
// CHECK1: .omp_outlined..1.exit:
-// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META24]]
+// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META26]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -597,7 +597,7 @@ for (int i = 0; i < argc; ++i) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.5
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -615,7 +615,7 @@ for (int i = 0; i < argc; ++i) {
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
diff --git a/clang/test/OpenMP/debug-info-openmp-array.cpp b/clang/test/OpenMP/debug-info-openmp-array.cpp
index 3fc1bbc668c3b..b6a8d6f859a95 100644
--- a/clang/test/OpenMP/debug-info-openmp-array.cpp
+++ b/clang/test/OpenMP/debug-info-openmp-array.cpp
@@ -14,31 +14,31 @@ void f(int m) {
}
// CHECK1-LABEL: define {{[^@]+}}@_Z1fi
-// CHECK1-SAME: (i32 noundef [[M:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG6:![0-9]+]] {
+// CHECK1-SAME: (i32 noundef [[M:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG5:![0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
// CHECK1-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4
-// CHECK1-NEXT: #dbg_declare(ptr [[M_ADDR]], [[META12:![0-9]+]], !DIExpression(), [[META13:![0-9]+]])
-// CHECK1-NEXT: #dbg_declare(ptr [[I]], [[META14:![0-9]+]], !DIExpression(), [[META15:![0-9]+]])
-// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[M_ADDR]], align 4, !dbg [[DBG16:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg [[DBG17:![0-9]+]]
-// CHECK1-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG17]]
-// CHECK1-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG17]]
-// CHECK1-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 16, !dbg [[DBG17]]
-// CHECK1-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG17]]
-// CHECK1-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META18:![0-9]+]], !DIExpression(), [[META20:![0-9]+]])
-// CHECK1-NEXT: #dbg_declare(ptr [[VLA]], [[META21:![0-9]+]], !DIExpression(), [[META25:![0-9]+]])
-// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4:[0-9]+]], i32 3, ptr @_Z1fi.omp_outlined, ptr [[M_ADDR]], i64 [[TMP1]], ptr [[VLA]]), !dbg [[DBG26:![0-9]+]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG27:![0-9]+]]
-// CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP3]]), !dbg [[DBG27]]
-// CHECK1-NEXT: ret void, !dbg [[DBG27]]
+// CHECK1-NEXT: #dbg_declare(ptr [[M_ADDR]], [[META11:![0-9]+]], !DIExpression(), [[META12:![0-9]+]])
+// CHECK1-NEXT: #dbg_declare(ptr [[I]], [[META13:![0-9]+]], !DIExpression(), [[META14:![0-9]+]])
+// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[M_ADDR]], align 4, !dbg [[DBG15:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg [[DBG16:![0-9]+]]
+// CHECK1-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG16]]
+// CHECK1-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG16]]
+// CHECK1-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 16, !dbg [[DBG16]]
+// CHECK1-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG16]]
+// CHECK1-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META17:![0-9]+]], !DIExpression(), [[META19:![0-9]+]])
+// CHECK1-NEXT: #dbg_declare(ptr [[VLA]], [[META20:![0-9]+]], !DIExpression(), [[META24:![0-9]+]])
+// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4:[0-9]+]], i32 3, ptr @_Z1fi.omp_outlined, ptr [[M_ADDR]], i64 [[TMP1]], ptr [[VLA]]), !dbg [[DBG25:![0-9]+]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG26:![0-9]+]]
+// CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP3]]), !dbg [[DBG26]]
+// CHECK1-NEXT: ret void, !dbg [[DBG26]]
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z1fi.omp_outlined_debug__
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CEN:%.*]]) #[[ATTR2:[0-9]+]] !dbg [[DBG28:![0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CEN:%.*]]) #[[ATTR2:[0-9]+]] !dbg [[DBG27:![0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -56,53 +56,53 @@ void f(int m) {
// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META36:![0-9]+]], !DIExpression(), [[META37:![0-9]+]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META35:![0-9]+]], !DIExpression(), [[META36:![0-9]+]])
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META38:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META37:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 8
-// CHECK1-NEXT: #dbg_declare(ptr [[M_ADDR]], [[META39:![0-9]+]], !DIExpression(), [[META40:![0-9]+]])
+// CHECK1-NEXT: #dbg_declare(ptr [[M_ADDR]], [[META38:![0-9]+]], !DIExpression(), [[META39:![0-9]+]])
// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META41:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META40:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: store ptr [[CEN]], ptr [[CEN_ADDR]], align 8
-// CHECK1-NEXT: #dbg_declare(ptr [[CEN_ADDR]], [[META42:![0-9]+]], !DIExpression(), [[META43:![0-9]+]])
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[M_ADDR]], align 8, !dbg [[DBG44:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG44]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[CEN_ADDR]], align 8, !dbg [[DBG44]]
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_IV]], [[META45:![0-9]+]], !DIExpression(), [[META37]])
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTCAPTURE_EXPR_]], [[META46:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[CEN_ADDR]], [[META41:![0-9]+]], !DIExpression(), [[META42:![0-9]+]])
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[M_ADDR]], align 8, !dbg [[DBG43:![0-9]+]], !nonnull [[META10:![0-9]+]], !align [[META44:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG43]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[CEN_ADDR]], align 8, !dbg [[DBG43]], !nonnull [[META10]], !align [[META44]]
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_IV]], [[META45:![0-9]+]], !DIExpression(), [[META36]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTCAPTURE_EXPR_]], [[META46:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4, !dbg [[DBG47:![0-9]+]]
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4, !dbg [[DBG47]]
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTCAPTURE_EXPR_1]], [[META46]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTCAPTURE_EXPR_1]], [[META46]], !DIExpression(), [[META36]])
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !dbg [[DBG47]]
-// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0, !dbg [[DBG44]]
-// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1, !dbg [[DBG44]]
-// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1, !dbg [[DBG44]]
-// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG44]]
-// CHECK1-NEXT: #dbg_declare(ptr [[I]], [[META48:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0, !dbg [[DBG43]]
+// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1, !dbg [[DBG43]]
+// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1, !dbg [[DBG43]]
+// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG43]]
+// CHECK1-NEXT: #dbg_declare(ptr [[I]], [[META48:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG49:![0-9]+]]
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !dbg [[DBG47]]
-// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]], !dbg [[DBG44]]
-// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]], !dbg [[DBG44]]
+// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]], !dbg [[DBG43]]
+// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]], !dbg [[DBG43]]
// CHECK1: omp.precond.then:
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_LB]], [[META50:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_LB]], [[META50:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4, !dbg [[DBG51:![0-9]+]]
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_UB]], [[META52:![0-9]+]], !DIExpression(), [[META37]])
-// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG44]]
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_UB]], [[META52:![0-9]+]], !DIExpression(), [[META36]])
+// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG43]]
// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_STRIDE]], [[META53:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_STRIDE]], [[META53:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_IS_LAST]], [[META54:![0-9]+]], !DIExpression(), [[META37]])
+// CHECK1-NEXT: #dbg_declare(ptr [[DOTOMP_IS_LAST]], [[META54:![0-9]+]], !DIExpression(), [[META36]])
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: #dbg_declare(ptr [[I3]], [[META48]], !DIExpression(), [[META37]])
-// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG44]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4, !dbg [[DBG44]]
+// CHECK1-NEXT: #dbg_declare(ptr [[I3]], [[META48]], !DIExpression(), [[META36]])
+// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG43]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4, !dbg [[DBG43]]
// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1), !dbg [[DBG55:![0-9]+]]
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG44]]
+// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG43]]
// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]], !dbg [[DBG51]]
// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]], !dbg [[DBG51]]
// CHECK1: cond.true:
-// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG44]]
+// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !dbg [[DBG43]]
// CHECK1-NEXT: br label [[COND_END:%.*]], !dbg [[DBG51]]
// CHECK1: cond.false:
// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !dbg [[DBG51]]
@@ -112,12 +112,12 @@ void f(int m) {
// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4, !dbg [[DBG51]]
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4, !dbg [[DBG51]]
// CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]], !dbg [[DBG44]]
+// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]], !dbg [[DBG43]]
// CHECK1: omp.inner.for.cond:
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !dbg [[DBG51]]
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]], !dbg [[DBG44]]
-// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]], !dbg [[DBG44]]
+// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]], !dbg [[DBG43]]
+// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]], !dbg [[DBG43]]
// CHECK1: omp.inner.for.body:
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !dbg [[DBG51]]
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1, !dbg [[DBG49]]
@@ -133,8 +133,8 @@ void f(int m) {
// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]], !dbg [[DBG55]]
// CHECK1: omp.inner.for.inc:
// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !dbg [[DBG51]]
-// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1, !dbg [[DBG44]]
-// CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !dbg [[DBG44]]
+// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1, !dbg [[DBG43]]
+// CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !dbg [[DBG43]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP62:![0-9]+]]
// CHECK1: omp.inner.for.end:
// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]], !dbg [[DBG55]]
@@ -148,7 +148,7 @@ void f(int m) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z1fi.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CEN:%.*]]) #[[ATTR2]] !dbg [[DBG65:![0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[CEN:%.*]]) #[[ATTR2]] !dbg [[DBG65:![0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -165,9 +165,9 @@ void f(int m) {
// CHECK1-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META70:![0-9]+]], !DIExpression(), [[META67]])
// CHECK1-NEXT: store ptr [[CEN]], ptr [[CEN_ADDR]], align 8
// CHECK1-NEXT: #dbg_declare(ptr [[CEN_ADDR]], [[META71:![0-9]+]], !DIExpression(), [[META67]])
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[M_ADDR]], align 8, !dbg [[DBG72:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[M_ADDR]], align 8, !dbg [[DBG72:![0-9]+]], !nonnull [[META10]], !align [[META44]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG72]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[CEN_ADDR]], align 8, !dbg [[DBG72]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[CEN_ADDR]], align 8, !dbg [[DBG72]], !nonnull [[META10]], !align [[META44]]
// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG72]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG72]]
// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[M_ADDR]], align 8, !dbg [[DBG72]]
diff --git a/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
index 59b6a33d74d9a..f686a8fb13457 100644
--- a/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
@@ -302,7 +302,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -411,7 +411,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -556,7 +556,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -659,7 +659,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -863,7 +863,7 @@ int main() {
// CHECK8-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK8-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK8: omp_offload.failed:
-// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK8: omp_offload.cont:
// CHECK8-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -874,11 +874,11 @@ int main() {
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done2:
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK8-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK8-NEXT: ret i32 [[TMP44]]
//
@@ -932,7 +932,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1048,14 +1048,14 @@ int main() {
// CHECK8-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK8-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
// CHECK8-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP29]])
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK8-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done12:
@@ -1063,7 +1063,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1179,14 +1179,14 @@ int main() {
// CHECK8-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK8-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK8-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done13:
@@ -1199,7 +1199,7 @@ int main() {
// CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK8-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK8-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK8-NEXT: ret void
//
//
@@ -1296,7 +1296,7 @@ int main() {
// CHECK8-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK8-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK8: omp_offload.failed:
-// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK8: omp_offload.cont:
// CHECK8-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1306,11 +1306,11 @@ int main() {
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done2:
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK8-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK8-NEXT: ret i32 [[TMP39]]
//
@@ -1396,7 +1396,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1502,14 +1502,14 @@ int main() {
// CHECK8-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK8-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
// CHECK8-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP25]])
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done11:
@@ -1517,7 +1517,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1631,14 +1631,14 @@ int main() {
// CHECK8-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK8-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK8-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done13:
@@ -1651,7 +1651,7 @@ int main() {
// CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK8-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK8-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK8-NEXT: ret void
//
//
@@ -1796,7 +1796,7 @@ int main() {
// CHECK10-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK10-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK10: omp_offload.failed:
-// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK10: omp_offload.cont:
// CHECK10-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1807,11 +1807,11 @@ int main() {
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done2:
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK10-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK10-NEXT: ret i32 [[TMP44]]
//
@@ -1865,7 +1865,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1979,14 +1979,14 @@ int main() {
// CHECK10-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK10-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
// CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP27]])
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done12:
@@ -1994,7 +1994,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2106,14 +2106,14 @@ int main() {
// CHECK10-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK10-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done11:
@@ -2126,7 +2126,7 @@ int main() {
// CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK10-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK10-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK10-NEXT: ret void
//
//
@@ -2223,7 +2223,7 @@ int main() {
// CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK10: omp_offload.failed:
-// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK10: omp_offload.cont:
// CHECK10-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2233,11 +2233,11 @@ int main() {
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done2:
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK10-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK10-NEXT: ret i32 [[TMP39]]
//
@@ -2323,7 +2323,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2427,14 +2427,14 @@ int main() {
// CHECK10-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
// CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP23]])
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done11:
@@ -2442,7 +2442,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2552,14 +2552,14 @@ int main() {
// CHECK10-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK10-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done11:
@@ -2572,7 +2572,7 @@ int main() {
// CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK10-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK10-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK10-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
index dfd6f481e0cd7..1671006b9586f 100644
--- a/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
@@ -243,7 +243,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -343,7 +343,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -514,7 +514,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -612,7 +612,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -839,7 +839,7 @@ int main() {
// CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -850,11 +850,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP44]]
//
@@ -908,7 +908,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1034,14 +1034,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done13:
@@ -1049,7 +1049,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1191,14 +1191,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done16:
@@ -1211,7 +1211,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1308,7 +1308,7 @@ int main() {
// CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1318,11 +1318,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP39]]
//
@@ -1408,7 +1408,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1528,14 +1528,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP26]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done12:
@@ -1543,7 +1543,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1679,14 +1679,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP26]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done15:
@@ -1699,7 +1699,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1845,7 +1845,7 @@ int main() {
// CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1856,11 +1856,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP44]]
//
@@ -1914,7 +1914,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2038,14 +2038,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP26]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done13:
@@ -2053,7 +2053,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2191,14 +2191,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done14:
@@ -2211,7 +2211,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
@@ -2308,7 +2308,7 @@ int main() {
// CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2318,11 +2318,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP39]]
//
@@ -2408,7 +2408,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2526,14 +2526,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP24]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done12:
@@ -2541,7 +2541,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2673,14 +2673,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP26]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done13:
@@ -2693,7 +2693,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
index 8d0893970cf48..8a2e7f47ce2f6 100644
--- a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
@@ -134,7 +134,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
index 9b19179d29386..a242dba2f7b01 100644
--- a/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
@@ -301,7 +301,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -417,7 +417,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -569,7 +569,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -679,7 +679,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -926,7 +926,7 @@ int main() {
// CHECK8-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK8-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK8: omp_offload.failed:
-// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK8: omp_offload.cont:
// CHECK8-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -937,11 +937,11 @@ int main() {
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done2:
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK8-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK8-NEXT: ret i32 [[TMP44]]
//
@@ -995,7 +995,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1118,14 +1118,14 @@ int main() {
// CHECK8-NEXT: store i32 2, ptr [[I]], align 4
// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK8: .omp.final.done:
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP32]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done12:
@@ -1133,7 +1133,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.omp_outlined.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1256,14 +1256,14 @@ int main() {
// CHECK8-NEXT: store i32 2, ptr [[I]], align 4
// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK8: .omp.final.done:
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done13:
@@ -1276,7 +1276,7 @@ int main() {
// CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK8-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK8-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK8-NEXT: ret void
//
//
@@ -1373,7 +1373,7 @@ int main() {
// CHECK8-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK8-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK8: omp_offload.failed:
-// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK8: omp_offload.cont:
// CHECK8-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1383,11 +1383,11 @@ int main() {
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done2:
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK8-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK8-NEXT: ret i32 [[TMP39]]
//
@@ -1473,7 +1473,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1586,14 +1586,14 @@ int main() {
// CHECK8-NEXT: store i32 2, ptr [[I]], align 4
// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK8: .omp.final.done:
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done11:
@@ -1601,7 +1601,7 @@ int main() {
//
//
// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined
-// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK8-NEXT: entry:
// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1722,14 +1722,14 @@ int main() {
// CHECK8-NEXT: store i32 2, ptr [[I]], align 4
// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK8: .omp.final.done:
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK8: arraydestroy.body:
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK8: arraydestroy.done13:
@@ -1742,7 +1742,7 @@ int main() {
// CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK8-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK8-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK8-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK8-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK8-NEXT: ret void
//
//
@@ -1887,7 +1887,7 @@ int main() {
// CHECK10-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK10-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK10: omp_offload.failed:
-// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK10: omp_offload.cont:
// CHECK10-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1898,11 +1898,11 @@ int main() {
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done2:
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK10-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK10-NEXT: ret i32 [[TMP44]]
//
@@ -1956,7 +1956,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2077,14 +2077,14 @@ int main() {
// CHECK10-NEXT: store i32 2, ptr [[I]], align 4
// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK10: .omp.final.done:
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done12:
@@ -2092,7 +2092,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.omp_outlined.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2211,14 +2211,14 @@ int main() {
// CHECK10-NEXT: store i32 2, ptr [[I]], align 4
// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK10: .omp.final.done:
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done11:
@@ -2231,7 +2231,7 @@ int main() {
// CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK10-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK10-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK10-NEXT: ret void
//
//
@@ -2328,7 +2328,7 @@ int main() {
// CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK10: omp_offload.failed:
-// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK10: omp_offload.cont:
// CHECK10-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2338,11 +2338,11 @@ int main() {
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done2:
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK10-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK10-NEXT: ret i32 [[TMP39]]
//
@@ -2428,7 +2428,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2539,14 +2539,14 @@ int main() {
// CHECK10-NEXT: store i32 2, ptr [[I]], align 4
// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK10: .omp.final.done:
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR7]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done11:
@@ -2554,7 +2554,7 @@ int main() {
//
//
// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined
-// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK10-NEXT: entry:
// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2671,14 +2671,14 @@ int main() {
// CHECK10-NEXT: store i32 2, ptr [[I]], align 4
// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK10: .omp.final.done:
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK10: arraydestroy.body:
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK10: arraydestroy.done11:
@@ -2691,7 +2691,7 @@ int main() {
// CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK10-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK10-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK10-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK10-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK10-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
index de7955ad9500a..1adddc77ea9b0 100644
--- a/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
@@ -246,7 +246,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -353,7 +353,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -531,7 +531,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -636,7 +636,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -906,7 +906,7 @@ int main() {
// CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -917,11 +917,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP44]]
//
@@ -975,7 +975,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1108,14 +1108,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP30]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done13:
@@ -1123,7 +1123,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1272,14 +1272,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP30]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done16:
@@ -1292,7 +1292,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1389,7 +1389,7 @@ int main() {
// CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1399,11 +1399,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP39]]
//
@@ -1489,7 +1489,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1616,14 +1616,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP28]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done12:
@@ -1631,7 +1631,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1774,14 +1774,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done15:
@@ -1794,7 +1794,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1940,7 +1940,7 @@ int main() {
// CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1951,11 +1951,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP44]]
//
@@ -2009,7 +2009,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2140,14 +2140,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done13:
@@ -2155,7 +2155,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2300,14 +2300,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP30]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done14:
@@ -2320,7 +2320,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
@@ -2417,7 +2417,7 @@ int main() {
// CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2427,11 +2427,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP39]]
//
@@ -2517,7 +2517,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2642,14 +2642,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP26]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done12:
@@ -2657,7 +2657,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2796,14 +2796,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done13:
@@ -2816,7 +2816,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/for_firstprivate_codegen.cpp b/clang/test/OpenMP/for_firstprivate_codegen.cpp
index 8e4c48edd3640..ac40765b07a2c 100644
--- a/clang/test/OpenMP/for_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/for_firstprivate_codegen.cpp
@@ -513,7 +513,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1023,7 +1023,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/for_lastprivate_codegen.cpp b/clang/test/OpenMP/for_lastprivate_codegen.cpp
index b6324f9faecaf..9e154e4d707f6 100644
--- a/clang/test/OpenMP/for_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/for_lastprivate_codegen.cpp
@@ -445,7 +445,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1176,7 +1176,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2116,7 +2116,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2345,7 +2345,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2527,7 +2527,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2684,7 +2684,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2861,7 +2861,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3616,7 +3616,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/for_linear_codegen.cpp b/clang/test/OpenMP/for_linear_codegen.cpp
index ce3dddfebafc9..88c218ac8af80 100644
--- a/clang/test/OpenMP/for_linear_codegen.cpp
+++ b/clang/test/OpenMP/for_linear_codegen.cpp
@@ -230,7 +230,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -250,8 +250,8 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTLINEAR_START]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP1]], align 8
@@ -349,7 +349,7 @@ int main() {
// CHECK1-NEXT: store ptr [[F]], ptr [[PVAR]], align 8
// CHECK1-NEXT: [[F1:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TEST]], i32 0, i32 0
// CHECK1-NEXT: store ptr [[F1]], ptr [[LVAR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LVAR]], align 8, !nonnull [[META3]], !align [[META7:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LVAR]], align 8, !nonnull [[META2]], !align [[META6:![0-9]+]]
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[PVAR]], ptr [[TMP0]])
// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK1-NEXT: ret i32 0
@@ -381,7 +381,7 @@ int main() {
// CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
// CHECK1-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4
// CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[C]], align 8
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
// CHECK1-NEXT: ret void
@@ -422,18 +422,18 @@ int main() {
// CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
// CHECK1-NEXT: store ptr [[A1]], ptr [[A]], align 8
// CHECK1-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[C]], align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8
-// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4
// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4
-// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -485,14 +485,14 @@ int main() {
// CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1
// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]
// CHECK1-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
-// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP24]], 1
// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP23]], align 4
// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[B9]], align 4
// CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP25]], -1
// CHECK1-NEXT: store i32 [[DEC]], ptr [[B9]], align 4
-// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP27]], 1
// CHECK1-NEXT: store i32 [[DIV]], ptr [[TMP26]], align 4
@@ -512,17 +512,17 @@ int main() {
// CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
// CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
// CHECK1: .omp.linear.pu:
-// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP31]], ptr [[_TMP20]], align 8
// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[A7]], align 4
-// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store i32 [[TMP32]], ptr [[TMP33]], align 4
// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[B9]], align 4
// CHECK1-NEXT: store i32 [[TMP34]], ptr [[B]], align 4
-// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP35]], ptr [[_TMP21]], align 8
// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[C10]], align 4
-// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP21]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP21]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store i32 [[TMP36]], ptr [[TMP37]], align 4
// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[B]], align 4
// CHECK1-NEXT: [[B22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1
@@ -570,7 +570,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -595,14 +595,14 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTLINEAR_START]], align 8
-// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START3]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -652,7 +652,7 @@ int main() {
// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[PVAR4]], align 8
// CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i32, ptr [[TMP18]], i32 1
// CHECK1-NEXT: store ptr [[INCDEC_PTR]], ptr [[PVAR4]], align 8
-// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1
// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP19]], align 4
@@ -674,10 +674,10 @@ int main() {
// CHECK1: .omp.linear.pu:
// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[PVAR4]], align 8
// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP0]], align 8
-// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP25]], ptr [[_TMP12]], align 8
// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[LVAR5]], align 4
-// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP12]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP12]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store i32 [[TMP26]], ptr [[TMP27]], align 4
// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
// CHECK1: .omp.linear.pu.done:
@@ -743,9 +743,9 @@ int main() {
// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 0
// CHECK1-NEXT: store ptr [[A1]], ptr [[A]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTLINEAR_START]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -786,7 +786,7 @@ int main() {
// CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP13]], 1
// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[MUL6]]
// CHECK1-NEXT: store i32 [[ADD7]], ptr [[A3]], align 4
-// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1
// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP14]], align 4
@@ -806,10 +806,10 @@ int main() {
// CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
// CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
// CHECK1: .omp.linear.pu:
-// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store ptr [[TMP19]], ptr [[_TMP9]], align 8
// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[A3]], align 4
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META3]], !align [[META7]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META2]], !align [[META6]]
// CHECK1-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4
// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
// CHECK1: .omp.linear.pu.done:
@@ -876,7 +876,7 @@ int main() {
// CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
// CHECK3-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4
// CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
-// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK3-NEXT: store ptr [[TMP0]], ptr [[C]], align 8
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
// CHECK3-NEXT: ret void
@@ -918,18 +918,18 @@ int main() {
// CHECK3-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
// CHECK3-NEXT: store ptr [[A1]], ptr [[A]], align 8
// CHECK3-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
-// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP1]], ptr [[C]], align 8
-// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
-// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8
-// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4
// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4
// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4
-// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -984,12 +984,12 @@ int main() {
// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP23]], align 8
// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8
// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
// CHECK3-NEXT: store ptr [[B9]], ptr [[TMP26]], align 8
// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
-// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 8
// CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
@@ -1008,17 +1008,17 @@ int main() {
// CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
// CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
// CHECK3: .omp.linear.pu:
-// CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP32]], ptr [[_TMP20]], align 8
// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[A7]], align 4
-// CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store i32 [[TMP33]], ptr [[TMP34]], align 4
// CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[B9]], align 4
// CHECK3-NEXT: store i32 [[TMP35]], ptr [[B]], align 4
-// CHECK3-NEXT: [[TMP36:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP36:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP36]], ptr [[_TMP21]], align 8
// CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[C10]], align 4
-// CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[_TMP21]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[_TMP21]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store i32 [[TMP37]], ptr [[TMP38]], align 4
// CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[B]], align 4
// CHECK3-NEXT: [[B22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1
@@ -1043,26 +1043,26 @@ int main() {
// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
// CHECK3-NEXT: store i32 [[INC]], ptr [[TMP3]], align 4
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
-// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
// CHECK3-NEXT: store i32 [[DEC]], ptr [[TMP6]], align 4
// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
// CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP9]], align 4
// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
-// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
-// CHECK3-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])
// CHECK3-NEXT: ret void
//
@@ -1104,21 +1104,21 @@ int main() {
// CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
// CHECK3-NEXT: store ptr [[TMP3]], ptr [[_TMP1]], align 8
-// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP2]], align 8
-// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP5]], ptr [[_TMP3]], align 8
-// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4
// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START5]], align 4
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-NEXT: store i32 [[TMP10]], ptr [[DOTLINEAR_START6]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -1170,14 +1170,14 @@ int main() {
// CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1
// CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]]
// CHECK3-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
-// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1
// CHECK3-NEXT: store i32 [[INC]], ptr [[TMP25]], align 4
// CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[B9]], align 4
// CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1
// CHECK3-NEXT: store i32 [[DEC]], ptr [[B9]], align 4
-// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1
// CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP28]], align 4
@@ -1197,17 +1197,17 @@ int main() {
// CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
// CHECK3-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
// CHECK3: .omp.linear.pu:
-// CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP33]], ptr [[_TMP20]], align 8
// CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[A7]], align 4
-// CHECK3-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store i32 [[TMP34]], ptr [[TMP35]], align 4
// CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[B9]], align 4
// CHECK3-NEXT: store i32 [[TMP36]], ptr [[TMP2]], align 4
-// CHECK3-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store ptr [[TMP37]], ptr [[_TMP21]], align 8
// CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[C10]], align 4
-// CHECK3-NEXT: [[TMP39:%.*]] = load ptr, ptr [[_TMP21]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK3-NEXT: [[TMP39:%.*]] = load ptr, ptr [[_TMP21]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK3-NEXT: store i32 [[TMP38]], ptr [[TMP39]], align 4
// CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
// CHECK3: .omp.linear.pu.done:
@@ -1252,7 +1252,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1273,7 +1273,7 @@ int main() {
// CHECK4-NEXT: [[_TMP13:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr @g1, align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr @g1, align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK4-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr @g, align 4
// CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 4
@@ -1325,12 +1325,12 @@ int main() {
// CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[G]], align 4
// CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 5
// CHECK4-NEXT: store i32 [[ADD9]], ptr [[G]], align 4
-// CHECK4-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP17:%.*]] = load volatile i32, ptr [[TMP16]], align 4
// CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 5
// CHECK4-NEXT: store volatile i32 [[ADD10]], ptr [[TMP16]], align 4
// CHECK4-NEXT: store i32 1, ptr [[G]], align 4
-// CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store volatile i32 5, ptr [[TMP18]], align 4
// CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 0
// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
@@ -1346,7 +1346,7 @@ int main() {
// CHECK4-NEXT: [[TMP19:%.*]] = load volatile i32, ptr [[G]], align 4
// CHECK4-NEXT: store volatile i32 [[TMP19]], ptr [[BLOCK_CAPTURED]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURED11:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
-// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP20]], ptr [[BLOCK_CAPTURED11]], align 8
// CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
// CHECK4-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8
@@ -1369,10 +1369,10 @@ int main() {
// CHECK4: .omp.linear.pu:
// CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[G]], align 4
// CHECK4-NEXT: store i32 [[TMP26]], ptr @g, align 4
-// CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr @g1, align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr @g1, align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP27]], ptr [[_TMP13]], align 8
// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[G1]], align 4
-// CHECK4-NEXT: [[TMP29:%.*]] = load ptr, ptr [[_TMP13]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP29:%.*]] = load ptr, ptr [[_TMP13]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store volatile i32 [[TMP28]], ptr [[TMP29]], align 4
// CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
// CHECK4: .omp.linear.pu.done:
@@ -1390,7 +1390,7 @@ int main() {
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
// CHECK4-NEXT: store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR1]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR1]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store i32 2, ptr [[TMP0]], align 4
// CHECK4-NEXT: ret void
//
@@ -1411,14 +1411,14 @@ int main() {
// CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
// CHECK4-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4
// CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP0]], ptr [[C]], align 8
// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR4]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1453,18 +1453,18 @@ int main() {
// CHECK4-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
// CHECK4-NEXT: store ptr [[A1]], ptr [[A]], align 8
// CHECK4-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP1]], ptr [[C]], align 8
-// CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
-// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8
-// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK4-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4
// CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4
// CHECK4-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4
-// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
// CHECK4-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4
// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -1529,13 +1529,13 @@ int main() {
// CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
// CHECK4-NEXT: store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 6
-// CHECK4-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP23]], ptr [[BLOCK_CAPTURED]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURED19:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 8
// CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[B9]], align 4
// CHECK4-NEXT: store i32 [[TMP24]], ptr [[BLOCK_CAPTURED19]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURED20:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 7
-// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP25]], ptr [[BLOCK_CAPTURED20]], align 8
// CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
// CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8
@@ -1556,17 +1556,17 @@ int main() {
// CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
// CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
// CHECK4: .omp.linear.pu:
-// CHECK4-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP31]], ptr [[_TMP22]], align 8
// CHECK4-NEXT: [[TMP32:%.*]] = load i32, ptr [[A7]], align 4
-// CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP22]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP22]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store i32 [[TMP32]], ptr [[TMP33]], align 4
// CHECK4-NEXT: [[TMP34:%.*]] = load i32, ptr [[B9]], align 4
// CHECK4-NEXT: store i32 [[TMP34]], ptr [[B]], align 4
-// CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP35]], ptr [[_TMP23]], align 8
// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[C10]], align 4
-// CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP23]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP23]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store i32 [[TMP36]], ptr [[TMP37]], align 4
// CHECK4-NEXT: [[TMP38:%.*]] = load i32, ptr [[B]], align 4
// CHECK4-NEXT: [[B24:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1
@@ -1592,7 +1592,7 @@ int main() {
// CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
// CHECK4-NEXT: [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK4-NEXT: store i32 [[INC]], ptr [[TMP0]], align 4
@@ -1601,21 +1601,21 @@ int main() {
// CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
// CHECK4-NEXT: store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 8
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
-// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
// CHECK4-NEXT: store i32 [[DIV]], ptr [[TMP3]], align 4
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
-// CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
-// CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @g1_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR4]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1651,21 +1651,21 @@ int main() {
// CHECK4-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
// CHECK4-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
// CHECK4-NEXT: store ptr [[TMP3]], ptr [[_TMP1]], align 8
-// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP4]], ptr [[_TMP2]], align 8
-// CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP5]], ptr [[_TMP3]], align 8
-// CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK4-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4
// CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK4-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START5]], align 4
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-NEXT: store i32 [[TMP10]], ptr [[DOTLINEAR_START6]], align 4
// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -1717,14 +1717,14 @@ int main() {
// CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1
// CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]]
// CHECK4-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
-// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
// CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1
// CHECK4-NEXT: store i32 [[INC]], ptr [[TMP25]], align 4
// CHECK4-NEXT: [[TMP27:%.*]] = load i32, ptr [[B9]], align 4
// CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1
// CHECK4-NEXT: store i32 [[DEC]], ptr [[B9]], align 4
-// CHECK4-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1
// CHECK4-NEXT: store i32 [[DIV]], ptr [[TMP28]], align 4
@@ -1744,18 +1744,18 @@ int main() {
// CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
// CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
// CHECK4: .omp.linear.pu:
-// CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP33]], ptr [[_TMP20]], align 8
// CHECK4-NEXT: [[TMP34:%.*]] = load i32, ptr [[A7]], align 4
-// CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store i32 [[TMP34]], ptr [[TMP35]], align 4
// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[B9]], align 4
// CHECK4-NEXT: store i32 [[TMP36]], ptr [[TMP2]], align 4
-// CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store ptr [[TMP37]], ptr [[_TMP21]], align 8
// CHECK4-NEXT: [[TMP38:%.*]] = load i32, ptr [[C10]], align 4
// CHECK4-NEXT: [[C22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP39:%.*]] = load ptr, ptr [[C22]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK4-NEXT: [[TMP39:%.*]] = load ptr, ptr [[C22]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK4-NEXT: store i32 [[TMP38]], ptr [[TMP39]], align 4
// CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
// CHECK4: .omp.linear.pu.done:
diff --git a/clang/test/OpenMP/for_private_reduction_codegen.cpp b/clang/test/OpenMP/for_private_reduction_codegen.cpp
index fdaf6f3068c1b..ddfc94e28b1fc 100644
--- a/clang/test/OpenMP/for_private_reduction_codegen.cpp
+++ b/clang/test/OpenMP/for_private_reduction_codegen.cpp
@@ -133,7 +133,7 @@ int main(void) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z8func_redv.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[ARRAY:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(40) [[ARRAY:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -707,3 +707,41 @@ int main(void) {
// CHECK-NEXT: call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP0]], i32 4)
// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @main.omp_outlined.1, ptr [[V]], ptr [[SUM_V_EXT]], ptr [[PROD_V_EXT]])
// CHECK-NEXT: ret i32 0
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@main.omp_outlined
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(40) [[V:%.*]]) #[[ATTR2]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[S_V:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 0
+// CHECK-NEXT: call void @_Z6do_rediPiRi(i32 noundef 10, ptr noundef [[ARRAYDECAY]], ptr noundef nonnull align 4 dereferenceable(4) [[S_V]])
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@main.omp_outlined.1
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(40) [[V:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SUM_V_EXT:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[PROD_V_EXT:%.*]]) #[[ATTR2]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[SUM_V_EXT_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[PROD_V_EXT_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// CHECK-NEXT: store ptr [[SUM_V_EXT]], ptr [[SUM_V_EXT_ADDR]], align 8
+// CHECK-NEXT: store ptr [[PROD_V_EXT]], ptr [[PROD_V_EXT_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[SUM_V_EXT_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PROD_V_EXT_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 0
+// CHECK-NEXT: call void @_Z15do_red_extendediPiRiS0_(i32 noundef 10, ptr noundef [[ARRAYDECAY]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]])
+// CHECK-NEXT: ret void
+//
diff --git a/clang/test/OpenMP/for_reduction_codegen.cpp b/clang/test/OpenMP/for_reduction_codegen.cpp
index 38289b4271fbb..e0a176b98f5e8 100644
--- a/clang/test/OpenMP/for_reduction_codegen.cpp
+++ b/clang/test/OpenMP/for_reduction_codegen.cpp
@@ -807,7 +807,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[S_ARR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(16) [[S_ARR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1112,7 +1112,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(160) [[ARRS:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(160) [[ARRS:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1416,7 +1416,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(160) [[ARRS:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(160) [[ARRS:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1677,7 +1677,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.3
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1858,7 +1858,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.4
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2062,7 +2062,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.5
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2249,7 +2249,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.6
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2436,7 +2436,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.7
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2563,7 +2563,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.8
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(20) [[VVAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(20) [[VVAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3613,7 +3613,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiLi42EET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3889,7 +3889,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiLi42EET_v.omp_outlined.13
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4058,7 +4058,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiLi42EET_v.omp_outlined.14
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(168) [[ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(168) [[ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/for_reduction_codegen_UDR.cpp b/clang/test/OpenMP/for_reduction_codegen_UDR.cpp
index a94a8bb039640..5ec73b21698c6 100644
--- a/clang/test/OpenMP/for_reduction_codegen_UDR.cpp
+++ b/clang/test/OpenMP/for_reduction_codegen_UDR.cpp
@@ -496,7 +496,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z4bazzv.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -736,7 +736,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(48) [[S_ARR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(12) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(48) [[S_ARR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1037,7 +1037,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.8
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(480) [[ARRS:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(480) [[ARRS:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1375,7 +1375,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.11
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(480) [[ARRS:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(480) [[ARRS:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1642,7 +1642,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.12
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1853,7 +1853,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.13
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(60) [[VVAR2:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(60) [[VVAR2:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2522,7 +2522,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiLi42EET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(24) [[S_ARR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(12) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(24) [[S_ARR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2797,7 +2797,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiLi42EET_v.omp_outlined.22
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(24) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(24) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2939,7 +2939,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiLi42EET_v.omp_outlined.25
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(504) [[ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(24) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(504) [[ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(24) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/for_reduction_task_codegen.cpp b/clang/test/OpenMP/for_reduction_task_codegen.cpp
index 9710f051ae5e1..d64c537bc7c84 100644
--- a/clang/test/OpenMP/for_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/for_reduction_task_codegen.cpp
@@ -32,7 +32,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/irbuilder_nested_parallel_for.c b/clang/test/OpenMP/irbuilder_nested_parallel_for.c
index 0fe4d6e45a858..b75e24d25241b 100644
--- a/clang/test/OpenMP/irbuilder_nested_parallel_for.c
+++ b/clang/test/OpenMP/irbuilder_nested_parallel_for.c
@@ -235,7 +235,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z14parallel_for_1Pfid..omp_par.4
-// CHECK-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK-NEXT: omp.par.entry:
// CHECK-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META3]]
@@ -273,7 +273,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z14parallel_for_1Pfid..omp_par
-// CHECK-SAME: (ptr noalias [[TID_ADDR1:%.*]], ptr noalias [[ZERO_ADDR2:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK-SAME: (ptr noalias [[TID_ADDR1:%.*]], ptr noalias [[ZERO_ADDR2:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK-NEXT: omp.par.entry3:
// CHECK-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META3]]
@@ -493,7 +493,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par.23
-// CHECK-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK-NEXT: omp.par.entry:
// CHECK-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META3]]
@@ -641,7 +641,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par.22
-// CHECK-SAME: (ptr noalias [[TID_ADDR4:%.*]], ptr noalias [[ZERO_ADDR5:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK-SAME: (ptr noalias [[TID_ADDR4:%.*]], ptr noalias [[ZERO_ADDR5:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK-NEXT: omp.par.entry6:
// CHECK-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META3]]
@@ -856,7 +856,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par.21
-// CHECK-SAME: (ptr noalias [[TID_ADDR96:%.*]], ptr noalias [[ZERO_ADDR97:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK-SAME: (ptr noalias [[TID_ADDR96:%.*]], ptr noalias [[ZERO_ADDR97:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK-NEXT: omp.par.entry98:
// CHECK-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META3]]
@@ -937,7 +937,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par
-// CHECK-SAME: (ptr noalias [[TID_ADDR38:%.*]], ptr noalias [[ZERO_ADDR39:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK-SAME: (ptr noalias [[TID_ADDR38:%.*]], ptr noalias [[ZERO_ADDR39:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK-NEXT: omp.par.entry40:
// CHECK-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META3]]
@@ -1673,7 +1673,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-DEBUG-LABEL: define {{[^@]+}}@_Z14parallel_for_1Pfid..omp_par.4
-// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG86:![0-9]+]] {
+// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG86:![0-9]+]] {
// CHECK-DEBUG-NEXT: omp.par.entry:
// CHECK-DEBUG-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-DEBUG-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META45]]
@@ -1714,7 +1714,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-DEBUG-LABEL: define {{[^@]+}}@_Z14parallel_for_1Pfid..omp_par
-// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR1:%.*]], ptr noalias [[ZERO_ADDR2:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG100:![0-9]+]] {
+// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR1:%.*]], ptr noalias [[ZERO_ADDR2:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG100:![0-9]+]] {
// CHECK-DEBUG-NEXT: omp.par.entry3:
// CHECK-DEBUG-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-DEBUG-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META45]]
@@ -1950,7 +1950,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-DEBUG-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par.23
-// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG168:![0-9]+]] {
+// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG168:![0-9]+]] {
// CHECK-DEBUG-NEXT: omp.par.entry:
// CHECK-DEBUG-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-DEBUG-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META45]]
@@ -2103,7 +2103,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-DEBUG-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par.22
-// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR4:%.*]], ptr noalias [[ZERO_ADDR5:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG203:![0-9]+]] {
+// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR4:%.*]], ptr noalias [[ZERO_ADDR5:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG203:![0-9]+]] {
// CHECK-DEBUG-NEXT: omp.par.entry6:
// CHECK-DEBUG-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-DEBUG-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META45]]
@@ -2324,7 +2324,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-DEBUG-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par.21
-// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR96:%.*]], ptr noalias [[ZERO_ADDR97:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG254:![0-9]+]] {
+// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR96:%.*]], ptr noalias [[ZERO_ADDR97:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG254:![0-9]+]] {
// CHECK-DEBUG-NEXT: omp.par.entry98:
// CHECK-DEBUG-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-DEBUG-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META45]]
@@ -2409,7 +2409,7 @@ void parallel_for_2(float *r, int a, double b) {
//
//
// CHECK-DEBUG-LABEL: define {{[^@]+}}@_Z14parallel_for_2Pfid..omp_par
-// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR38:%.*]], ptr noalias [[ZERO_ADDR39:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG276:![0-9]+]] {
+// CHECK-DEBUG-SAME: (ptr noalias [[TID_ADDR38:%.*]], ptr noalias [[ZERO_ADDR39:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG276:![0-9]+]] {
// CHECK-DEBUG-NEXT: omp.par.entry40:
// CHECK-DEBUG-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK-DEBUG-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META45]]
diff --git a/clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp b/clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
index 3c9a5ba278866..26eab443d0d54 100644
--- a/clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
+++ b/clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
@@ -433,7 +433,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nofreeobj nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
index 0bbed3bbeb7cf..686f46c6aa318 100644
--- a/clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
+++ b/clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
@@ -433,7 +433,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nofreeobj nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/nested_loop_codegen.cpp b/clang/test/OpenMP/nested_loop_codegen.cpp
index 54dd05ca66983..6fcbae5bcd6e3 100644
--- a/clang/test/OpenMP/nested_loop_codegen.cpp
+++ b/clang/test/OpenMP/nested_loop_codegen.cpp
@@ -73,7 +73,7 @@ int inline_decl() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z12outline_declv.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -168,7 +168,7 @@ int inline_decl() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z11inline_declv.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[RES:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[RES:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -362,7 +362,7 @@ int inline_decl() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z12outline_declv.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] !dbg [[DBG66:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] !dbg [[DBG66:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -492,7 +492,7 @@ int inline_decl() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z11inline_declv.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[RES:%.*]]) #[[ATTR1]] !dbg [[DBG125:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[RES:%.*]]) #[[ATTR1]] !dbg [[DBG125:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -536,7 +536,7 @@ int inline_decl() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z12outline_declv..omp_par
-// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK3-NEXT: omp.par.entry:
// CHECK3-NEXT: [[GEP_I:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK3-NEXT: [[LOADGEP_I:%.*]] = load ptr, ptr [[GEP_I]], align 8, !align [[META2:![0-9]+]]
@@ -703,7 +703,7 @@ int inline_decl() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z11inline_declv..omp_par
-// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] {
+// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: omp.par.entry:
// CHECK3-NEXT: [[GEP_I:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK3-NEXT: [[LOADGEP_I:%.*]] = load ptr, ptr [[GEP_I]], align 8, !align [[META2]]
@@ -873,7 +873,7 @@ int inline_decl() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z12outline_declv..omp_par
-// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG19:![0-9]+]] {
+// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG19:![0-9]+]] {
// CHECK4-NEXT: omp.par.entry:
// CHECK4-NEXT: [[GEP_I:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK4-NEXT: [[LOADGEP_I:%.*]] = load ptr, ptr [[GEP_I]], align 8, !align [[META21:![0-9]+]]
@@ -1052,7 +1052,7 @@ int inline_decl() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z11inline_declv..omp_par
-// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG86:![0-9]+]] {
+// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1]] !dbg [[DBG86:![0-9]+]] {
// CHECK4-NEXT: omp.par.entry:
// CHECK4-NEXT: [[GEP_I:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
// CHECK4-NEXT: [[LOADGEP_I:%.*]] = load ptr, ptr [[GEP_I]], align 8, !align [[META21]]
diff --git a/clang/test/OpenMP/parallel_codegen.cpp b/clang/test/OpenMP/parallel_codegen.cpp
index 224b94ee86d23..cb823813690e3 100644
--- a/clang/test/OpenMP/parallel_codegen.cpp
+++ b/clang/test/OpenMP/parallel_codegen.cpp
@@ -100,7 +100,7 @@ int main (int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] personality ptr @__gxx_personality_v0 {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] personality ptr @__gxx_personality_v0 {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -111,7 +111,7 @@ int main (int argc, char **argv) {
// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
// CHECK1-NEXT: invoke void @_Z3fooIiEvT_(i32 noundef [[TMP2]])
@@ -168,7 +168,7 @@ int main (int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[GLOBAL:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[GLOBAL:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -181,8 +181,8 @@ int main (int argc, char **argv) {
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: store ptr [[GLOBAL]], ptr [[GLOBAL_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
// CHECK1-NEXT: invoke void @_Z3fooIiEvT_(i32 noundef [[TMP3]])
@@ -201,7 +201,7 @@ int main (int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -212,7 +212,7 @@ int main (int argc, char **argv) {
// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @main.omp_outlined.2.omp_outlined, i64 [[TMP0]], ptr [[TMP1]])
// CHECK1-NEXT: ret void
//
@@ -229,7 +229,7 @@ int main (int argc, char **argv) {
// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
// CHECK1-NEXT: invoke void @_Z3fooIiEvT_(i32 noundef [[TMP2]])
@@ -263,7 +263,7 @@ int main (int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -274,7 +274,7 @@ int main (int argc, char **argv) {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META3]], !align [[META7:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META2]], !align [[META6:![0-9]+]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK1-NEXT: invoke void @_Z3fooIPPcEvT_(ptr noundef [[TMP2]])
@@ -302,7 +302,7 @@ int main (int argc, char **argv) {
//
//
// CHECK2-LABEL: define {{[^@]+}}@main
-// CHECK2-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG11:![0-9]+]] {
+// CHECK2-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG10:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
// CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
@@ -311,94 +311,94 @@ int main (int argc, char **argv) {
// CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
// CHECK2-NEXT: store i32 0, ptr [[RETVAL]], align 4
// CHECK2-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META18:![0-9]+]], !DIExpression(), [[META19:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META17:![0-9]+]], !DIExpression(), [[META18:![0-9]+]])
// CHECK2-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGV_ADDR]], [[META20:![0-9]+]], !DIExpression(), [[META21:![0-9]+]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG22:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg [[DBG23:![0-9]+]]
-// CHECK2-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG23]]
-// CHECK2-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG23]]
-// CHECK2-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 16, !dbg [[DBG23]]
-// CHECK2-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG23]]
-// CHECK2-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META24:![0-9]+]], !DIExpression(), [[META26:![0-9]+]])
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA]], [[META27:![0-9]+]], !DIExpression(), [[META31:![0-9]+]])
-// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 2, ptr @main.omp_outlined, i64 [[TMP1]], ptr [[VLA]]), !dbg [[DBG32:![0-9]+]]
-// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB5:[0-9]+]], i32 1, ptr @main.omp_outlined.1, i64 [[TMP1]]), !dbg [[DBG33:![0-9]+]]
-// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB9:[0-9]+]], i32 2, ptr @main.omp_outlined.3, i64 [[TMP1]], ptr [[VLA]]), !dbg [[DBG34:![0-9]+]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !dbg [[DBG35:![0-9]+]]
-// CHECK2-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIPPcEiT_(ptr noundef [[TMP3]]), !dbg [[DBG36:![0-9]+]]
-// CHECK2-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4, !dbg [[DBG37:![0-9]+]]
-// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG38:![0-9]+]]
-// CHECK2-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP4]]), !dbg [[DBG38]]
-// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[RETVAL]], align 4, !dbg [[DBG38]]
-// CHECK2-NEXT: ret i32 [[TMP5]], !dbg [[DBG38]]
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGV_ADDR]], [[META19:![0-9]+]], !DIExpression(), [[META20:![0-9]+]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG21:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg [[DBG22:![0-9]+]]
+// CHECK2-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG22]]
+// CHECK2-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG22]]
+// CHECK2-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 16, !dbg [[DBG22]]
+// CHECK2-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG22]]
+// CHECK2-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META23:![0-9]+]], !DIExpression(), [[META25:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA]], [[META26:![0-9]+]], !DIExpression(), [[META30:![0-9]+]])
+// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 2, ptr @main.omp_outlined, i64 [[TMP1]], ptr [[VLA]]), !dbg [[DBG31:![0-9]+]]
+// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB5:[0-9]+]], i32 1, ptr @main.omp_outlined.1, i64 [[TMP1]]), !dbg [[DBG32:![0-9]+]]
+// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB9:[0-9]+]], i32 2, ptr @main.omp_outlined.3, i64 [[TMP1]], ptr [[VLA]]), !dbg [[DBG33:![0-9]+]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !dbg [[DBG34:![0-9]+]]
+// CHECK2-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIPPcEiT_(ptr noundef [[TMP3]]), !dbg [[DBG35:![0-9]+]]
+// CHECK2-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4, !dbg [[DBG36:![0-9]+]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG37:![0-9]+]]
+// CHECK2-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP4]]), !dbg [[DBG37]]
+// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[RETVAL]], align 4, !dbg [[DBG37]]
+// CHECK2-NEXT: ret i32 [[TMP5]], !dbg [[DBG37]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] personality ptr @__gxx_personality_v0 !dbg [[DBG39:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] personality ptr @__gxx_personality_v0 !dbg [[DBG38:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META47:![0-9]+]], !DIExpression(), [[META48:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META46:![0-9]+]], !DIExpression(), [[META47:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META49:![0-9]+]], !DIExpression(), [[META48]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META48:![0-9]+]], !DIExpression(), [[META47]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META50:![0-9]+]], !DIExpression(), [[META48]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META49:![0-9]+]], !DIExpression(), [[META47]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META51:![0-9]+]], !DIExpression(), [[META52:![0-9]+]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG53:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG53]], !nonnull [[META17:![0-9]+]], !align [[META54:![0-9]+]]
-// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG55:![0-9]+]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG55]]
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META50:![0-9]+]], !DIExpression(), [[META51:![0-9]+]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG52:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG52]], !nonnull [[META16:![0-9]+]], !align [[META53:![0-9]+]]
+// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG54:![0-9]+]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG54]]
// CHECK2-NEXT: invoke void @_Z3fooIiEvT_(i32 noundef [[TMP2]])
-// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG53]]
+// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG52]]
// CHECK2: invoke.cont:
-// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr @global, align 4, !dbg [[DBG56:![0-9]+]]
-// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG57:![0-9]+]]
-// CHECK2-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG58:![0-9]+]]
-// CHECK2-NEXT: ret void, !dbg [[DBG56]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr @global, align 4, !dbg [[DBG55:![0-9]+]]
+// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG56:![0-9]+]]
+// CHECK2-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG57:![0-9]+]]
+// CHECK2-NEXT: ret void, !dbg [[DBG55]]
// CHECK2: terminate.lpad:
// CHECK2-NEXT: [[TMP4:%.*]] = landingpad { ptr, i32 }
-// CHECK2-NEXT: catch ptr null, !dbg [[DBG53]]
-// CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { ptr, i32 } [[TMP4]], 0, !dbg [[DBG53]]
-// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP5]]) #[[ATTR6:[0-9]+]], !dbg [[DBG53]]
-// CHECK2-NEXT: unreachable, !dbg [[DBG53]]
+// CHECK2-NEXT: catch ptr null, !dbg [[DBG52]]
+// CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { ptr, i32 } [[TMP4]], 0, !dbg [[DBG52]]
+// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP5]]) #[[ATTR6:[0-9]+]], !dbg [[DBG52]]
+// CHECK2-NEXT: unreachable, !dbg [[DBG52]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG59:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG58:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META60:![0-9]+]], !DIExpression(), [[META61:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META59:![0-9]+]], !DIExpression(), [[META60:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META62:![0-9]+]], !DIExpression(), [[META61]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META61:![0-9]+]], !DIExpression(), [[META60]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META63:![0-9]+]], !DIExpression(), [[META61]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META62:![0-9]+]], !DIExpression(), [[META60]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META64:![0-9]+]], !DIExpression(), [[META61]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG65:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG65]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG65]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG65]]
-// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG65]]
-// CHECK2-NEXT: call void @main.omp_outlined_debug__(ptr [[TMP2]], ptr [[TMP3]], i64 [[TMP0]], ptr [[TMP4]]) #[[ATTR5:[0-9]+]], !dbg [[DBG65]]
-// CHECK2-NEXT: ret void, !dbg [[DBG65]]
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META63:![0-9]+]], !DIExpression(), [[META60]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG64:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG64]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG64]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG64]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG64]]
+// CHECK2-NEXT: call void @main.omp_outlined_debug__(ptr [[TMP2]], ptr [[TMP3]], i64 [[TMP0]], ptr [[TMP4]]) #[[ATTR5:[0-9]+]], !dbg [[DBG64]]
+// CHECK2-NEXT: ret void, !dbg [[DBG64]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z3fooIiEvT_
-// CHECK2-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat !dbg [[DBG66:![0-9]+]] {
+// CHECK2-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat !dbg [[DBG65:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK2-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META71:![0-9]+]], !DIExpression(), [[META72:![0-9]+]])
-// CHECK2-NEXT: ret void, !dbg [[DBG73:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META70:![0-9]+]], !DIExpression(), [[META71:![0-9]+]])
+// CHECK2-NEXT: ret void, !dbg [[DBG72:![0-9]+]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate
@@ -409,7 +409,7 @@ int main (int argc, char **argv) {
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__.2
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] !dbg [[DBG76:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] !dbg [[DBG75:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -418,46 +418,46 @@ int main (int argc, char **argv) {
// CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META79:![0-9]+]], !DIExpression(), [[META80:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META78:![0-9]+]], !DIExpression(), [[META79:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META81:![0-9]+]], !DIExpression(), [[META80]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META80:![0-9]+]], !DIExpression(), [[META79]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META82:![0-9]+]], !DIExpression(), [[META80]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG83:![0-9]+]]
-// CHECK2-NEXT: #dbg_declare(ptr [[GLOBAL]], [[META84:![0-9]+]], !DIExpression(), [[META80]])
-// CHECK2-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG83]]
-// CHECK2-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG83]]
-// CHECK2-NEXT: [[VLA1:%.*]] = alloca i32, i64 [[TMP0]], align 16, !dbg [[DBG83]]
-// CHECK2-NEXT: store i64 [[TMP0]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG83]]
-// CHECK2-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META85:![0-9]+]], !DIExpression(), [[META80]])
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA1]], [[META86:![0-9]+]], !DIExpression(), [[META80]])
-// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 3, ptr @main.omp_outlined_debug__.2.omp_outlined, i64 [[TMP0]], ptr [[VLA1]], ptr [[GLOBAL]]), !dbg [[DBG83]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG87:![0-9]+]]
-// CHECK2-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP2]]), !dbg [[DBG87]]
-// CHECK2-NEXT: ret void, !dbg [[DBG89:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META81:![0-9]+]], !DIExpression(), [[META79]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG82:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[GLOBAL]], [[META83:![0-9]+]], !DIExpression(), [[META79]])
+// CHECK2-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG82]]
+// CHECK2-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG82]]
+// CHECK2-NEXT: [[VLA1:%.*]] = alloca i32, i64 [[TMP0]], align 16, !dbg [[DBG82]]
+// CHECK2-NEXT: store i64 [[TMP0]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG82]]
+// CHECK2-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META84:![0-9]+]], !DIExpression(), [[META79]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA1]], [[META85:![0-9]+]], !DIExpression(), [[META79]])
+// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 3, ptr @main.omp_outlined_debug__.2.omp_outlined, i64 [[TMP0]], ptr [[VLA1]], ptr [[GLOBAL]]), !dbg [[DBG82]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG86:![0-9]+]]
+// CHECK2-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP2]]), !dbg [[DBG86]]
+// CHECK2-NEXT: ret void, !dbg [[DBG88:![0-9]+]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined.1
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] !dbg [[DBG90:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] !dbg [[DBG89:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META91:![0-9]+]], !DIExpression(), [[META92:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META90:![0-9]+]], !DIExpression(), [[META91:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META93:![0-9]+]], !DIExpression(), [[META92]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META92:![0-9]+]], !DIExpression(), [[META91]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META94:![0-9]+]], !DIExpression(), [[META92]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG95:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG95]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG95]]
-// CHECK2-NEXT: call void @main.omp_outlined_debug__.2(ptr [[TMP1]], ptr [[TMP2]], i64 [[TMP0]]) #[[ATTR5]], !dbg [[DBG95]]
-// CHECK2-NEXT: ret void, !dbg [[DBG95]]
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META93:![0-9]+]], !DIExpression(), [[META91]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG94:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG94]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG94]]
+// CHECK2-NEXT: call void @main.omp_outlined_debug__.2(ptr [[TMP1]], ptr [[TMP2]], i64 [[TMP0]]) #[[ATTR5]], !dbg [[DBG94]]
+// CHECK2-NEXT: ret void, !dbg [[DBG94]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__.2.omp_outlined_debug__
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[GLOBAL:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 !dbg [[DBG96:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[GLOBAL:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 !dbg [[DBG95:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -465,37 +465,37 @@ int main (int argc, char **argv) {
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[GLOBAL_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META99:![0-9]+]], !DIExpression(), [[META100:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META98:![0-9]+]], !DIExpression(), [[META99:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META101:![0-9]+]], !DIExpression(), [[META100]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META100:![0-9]+]], !DIExpression(), [[META99]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META102:![0-9]+]], !DIExpression(), [[META100]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META101:![0-9]+]], !DIExpression(), [[META99]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META103:![0-9]+]], !DIExpression(), [[META104:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META102:![0-9]+]], !DIExpression(), [[META103:![0-9]+]])
// CHECK2-NEXT: store ptr [[GLOBAL]], ptr [[GLOBAL_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[GLOBAL_ADDR]], [[META105:![0-9]+]], !DIExpression(), [[META106:![0-9]+]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG107:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG107]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !dbg [[DBG107]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG108:![0-9]+]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG108]]
+// CHECK2-NEXT: #dbg_declare(ptr [[GLOBAL_ADDR]], [[META104:![0-9]+]], !DIExpression(), [[META105:![0-9]+]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG106:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG106]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !dbg [[DBG106]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG107:![0-9]+]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG107]]
// CHECK2-NEXT: invoke void @_Z3fooIiEvT_(i32 noundef [[TMP3]])
-// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG107]]
+// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG106]]
// CHECK2: invoke.cont:
-// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4, !dbg [[DBG109:![0-9]+]]
-// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG110:![0-9]+]]
-// CHECK2-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG111:![0-9]+]]
-// CHECK2-NEXT: ret void, !dbg [[DBG109]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4, !dbg [[DBG108:![0-9]+]]
+// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG109:![0-9]+]]
+// CHECK2-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG110:![0-9]+]]
+// CHECK2-NEXT: ret void, !dbg [[DBG108]]
// CHECK2: terminate.lpad:
// CHECK2-NEXT: [[TMP5:%.*]] = landingpad { ptr, i32 }
-// CHECK2-NEXT: catch ptr null, !dbg [[DBG107]]
-// CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { ptr, i32 } [[TMP5]], 0, !dbg [[DBG107]]
-// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP6]]) #[[ATTR6]], !dbg [[DBG107]]
-// CHECK2-NEXT: unreachable, !dbg [[DBG107]]
+// CHECK2-NEXT: catch ptr null, !dbg [[DBG106]]
+// CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { ptr, i32 } [[TMP5]], 0, !dbg [[DBG106]]
+// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP6]]) #[[ATTR6]], !dbg [[DBG106]]
+// CHECK2-NEXT: unreachable, !dbg [[DBG106]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__.2.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[GLOBAL:%.*]]) #[[ATTR2]] !dbg [[DBG112:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[GLOBAL:%.*]]) #[[ATTR2]] !dbg [[DBG111:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -503,147 +503,147 @@ int main (int argc, char **argv) {
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[GLOBAL_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META113:![0-9]+]], !DIExpression(), [[META114:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META112:![0-9]+]], !DIExpression(), [[META113:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META115:![0-9]+]], !DIExpression(), [[META114]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META114:![0-9]+]], !DIExpression(), [[META113]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META116:![0-9]+]], !DIExpression(), [[META114]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META115:![0-9]+]], !DIExpression(), [[META113]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META117:![0-9]+]], !DIExpression(), [[META114]])
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META116:![0-9]+]], !DIExpression(), [[META113]])
// CHECK2-NEXT: store ptr [[GLOBAL]], ptr [[GLOBAL_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[GLOBAL_ADDR]], [[META118:![0-9]+]], !DIExpression(), [[META114]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG119:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG119]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !dbg [[DBG119]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG119]]
-// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG119]]
-// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG119]]
-// CHECK2-NEXT: [[TMP6:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !dbg [[DBG119]]
-// CHECK2-NEXT: call void @main.omp_outlined_debug__.2.omp_outlined_debug__(ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP0]], ptr [[TMP5]], ptr [[TMP6]]) #[[ATTR5]], !dbg [[DBG119]]
-// CHECK2-NEXT: ret void, !dbg [[DBG119]]
+// CHECK2-NEXT: #dbg_declare(ptr [[GLOBAL_ADDR]], [[META117:![0-9]+]], !DIExpression(), [[META113]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG118:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG118]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !dbg [[DBG118]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG118]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG118]]
+// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG118]]
+// CHECK2-NEXT: [[TMP6:%.*]] = load ptr, ptr [[GLOBAL_ADDR]], align 8, !dbg [[DBG118]]
+// CHECK2-NEXT: call void @main.omp_outlined_debug__.2.omp_outlined_debug__(ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP0]], ptr [[TMP5]], ptr [[TMP6]]) #[[ATTR5]], !dbg [[DBG118]]
+// CHECK2-NEXT: ret void, !dbg [[DBG118]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__.4
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG120:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG119:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META121:![0-9]+]], !DIExpression(), [[META122:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META120:![0-9]+]], !DIExpression(), [[META121:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META123:![0-9]+]], !DIExpression(), [[META122]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META122:![0-9]+]], !DIExpression(), [[META121]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META124:![0-9]+]], !DIExpression(), [[META122]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META123:![0-9]+]], !DIExpression(), [[META121]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META125:![0-9]+]], !DIExpression(), [[META126:![0-9]+]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG127:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG127]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB7:[0-9]+]], i32 2, ptr @main.omp_outlined_debug__.4.omp_outlined, i64 [[TMP0]], ptr [[TMP1]]), !dbg [[DBG127]]
-// CHECK2-NEXT: ret void, !dbg [[DBG128:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META124:![0-9]+]], !DIExpression(), [[META125:![0-9]+]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG126:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG126]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB7:[0-9]+]], i32 2, ptr @main.omp_outlined_debug__.4.omp_outlined, i64 [[TMP0]], ptr [[TMP1]]), !dbg [[DBG126]]
+// CHECK2-NEXT: ret void, !dbg [[DBG127:![0-9]+]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined.3
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG129:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG128:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META130:![0-9]+]], !DIExpression(), [[META131:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META129:![0-9]+]], !DIExpression(), [[META130:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META132:![0-9]+]], !DIExpression(), [[META131]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META131:![0-9]+]], !DIExpression(), [[META130]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META133:![0-9]+]], !DIExpression(), [[META131]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META132:![0-9]+]], !DIExpression(), [[META130]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META134:![0-9]+]], !DIExpression(), [[META131]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG135:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG135]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG135]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG135]]
-// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG135]]
-// CHECK2-NEXT: call void @main.omp_outlined_debug__.4(ptr [[TMP2]], ptr [[TMP3]], i64 [[TMP0]], ptr [[TMP4]]) #[[ATTR5]], !dbg [[DBG135]]
-// CHECK2-NEXT: ret void, !dbg [[DBG135]]
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META133:![0-9]+]], !DIExpression(), [[META130]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG134:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG134]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG134]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG134]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG134]]
+// CHECK2-NEXT: call void @main.omp_outlined_debug__.4(ptr [[TMP2]], ptr [[TMP3]], i64 [[TMP0]], ptr [[TMP4]]) #[[ATTR5]], !dbg [[DBG134]]
+// CHECK2-NEXT: ret void, !dbg [[DBG134]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__.4.omp_outlined_debug__
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 !dbg [[DBG136:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 !dbg [[DBG135:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META137:![0-9]+]], !DIExpression(), [[META138:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META136:![0-9]+]], !DIExpression(), [[META137:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META139:![0-9]+]], !DIExpression(), [[META138]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META138:![0-9]+]], !DIExpression(), [[META137]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META140:![0-9]+]], !DIExpression(), [[META138]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META139:![0-9]+]], !DIExpression(), [[META137]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META141:![0-9]+]], !DIExpression(), [[META142:![0-9]+]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG143:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG143]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG144:![0-9]+]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG144]]
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META140:![0-9]+]], !DIExpression(), [[META141:![0-9]+]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG142:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG142]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG143:![0-9]+]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG143]]
// CHECK2-NEXT: invoke void @_Z3fooIiEvT_(i32 noundef [[TMP2]])
-// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG143]]
+// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG142]]
// CHECK2: invoke.cont:
-// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr @global, align 4, !dbg [[DBG145:![0-9]+]]
-// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG146:![0-9]+]]
-// CHECK2-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG147:![0-9]+]]
-// CHECK2-NEXT: ret void, !dbg [[DBG145]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr @global, align 4, !dbg [[DBG144:![0-9]+]]
+// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 1, !dbg [[DBG145:![0-9]+]]
+// CHECK2-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG146:![0-9]+]]
+// CHECK2-NEXT: ret void, !dbg [[DBG144]]
// CHECK2: terminate.lpad:
// CHECK2-NEXT: [[TMP4:%.*]] = landingpad { ptr, i32 }
-// CHECK2-NEXT: catch ptr null, !dbg [[DBG143]]
-// CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { ptr, i32 } [[TMP4]], 0, !dbg [[DBG143]]
-// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP5]]) #[[ATTR6]], !dbg [[DBG143]]
-// CHECK2-NEXT: unreachable, !dbg [[DBG143]]
+// CHECK2-NEXT: catch ptr null, !dbg [[DBG142]]
+// CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { ptr, i32 } [[TMP4]], 0, !dbg [[DBG142]]
+// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP5]]) #[[ATTR6]], !dbg [[DBG142]]
+// CHECK2-NEXT: unreachable, !dbg [[DBG142]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined_debug__.4.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG148:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] !dbg [[DBG147:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META149:![0-9]+]], !DIExpression(), [[META150:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META148:![0-9]+]], !DIExpression(), [[META149:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META151:![0-9]+]], !DIExpression(), [[META150]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META150:![0-9]+]], !DIExpression(), [[META149]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META152:![0-9]+]], !DIExpression(), [[META150]])
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META151:![0-9]+]], !DIExpression(), [[META149]])
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META153:![0-9]+]], !DIExpression(), [[META150]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG154:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG154]], !nonnull [[META17]], !align [[META54]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG154]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG154]]
-// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG154]]
-// CHECK2-NEXT: call void @main.omp_outlined_debug__.4.omp_outlined_debug__(ptr [[TMP2]], ptr [[TMP3]], i64 [[TMP0]], ptr [[TMP4]]) #[[ATTR5]], !dbg [[DBG154]]
-// CHECK2-NEXT: ret void, !dbg [[DBG154]]
+// CHECK2-NEXT: #dbg_declare(ptr [[A_ADDR]], [[META152:![0-9]+]], !DIExpression(), [[META149]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG153:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG153]], !nonnull [[META16]], !align [[META53]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG153]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG153]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG153]]
+// CHECK2-NEXT: call void @main.omp_outlined_debug__.4.omp_outlined_debug__(ptr [[TMP2]], ptr [[TMP3]], i64 [[TMP0]], ptr [[TMP4]]) #[[ATTR5]], !dbg [[DBG153]]
+// CHECK2-NEXT: ret void, !dbg [[DBG153]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_
-// CHECK2-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR3]] comdat !dbg [[DBG155:![0-9]+]] {
+// CHECK2-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR3]] comdat !dbg [[DBG154:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META167:![0-9]+]], !DIExpression(), [[META168:![0-9]+]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG169:![0-9]+]]
-// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP0]], i64 0, !dbg [[DBG169]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8, !dbg [[DBG169]]
-// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 0, !dbg [[DBG169]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1, !dbg [[DBG169]]
-// CHECK2-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64, !dbg [[DBG170:![0-9]+]]
-// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB11:[0-9]+]], i32 2, ptr @_Z5tmainIPPcEiT_.omp_outlined, ptr [[ARGC_ADDR]], i64 [[TMP3]]), !dbg [[DBG171:![0-9]+]]
-// CHECK2-NEXT: ret i32 0, !dbg [[DBG172:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META166:![0-9]+]], !DIExpression(), [[META167:![0-9]+]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG168:![0-9]+]]
+// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP0]], i64 0, !dbg [[DBG168]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8, !dbg [[DBG168]]
+// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 0, !dbg [[DBG168]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1, !dbg [[DBG168]]
+// CHECK2-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64, !dbg [[DBG169:![0-9]+]]
+// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB11:[0-9]+]], i32 2, ptr @_Z5tmainIPPcEiT_.omp_outlined, ptr [[ARGC_ADDR]], i64 [[TMP3]]), !dbg [[DBG170:![0-9]+]]
+// CHECK2-NEXT: ret i32 0, !dbg [[DBG171:![0-9]+]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_.omp_outlined_debug__
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 !dbg [[DBG173:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 !dbg [[DBG172:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -651,64 +651,64 @@ int main (int argc, char **argv) {
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[VAR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META177:![0-9]+]], !DIExpression(), [[META178:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META176:![0-9]+]], !DIExpression(), [[META177:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META179:![0-9]+]], !DIExpression(), [[META178]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META178:![0-9]+]], !DIExpression(), [[META177]])
// CHECK2-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META180:![0-9]+]], !DIExpression(), [[META181:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META179:![0-9]+]], !DIExpression(), [[META180:![0-9]+]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META182:![0-9]+]], !DIExpression(), [[META178]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG183:![0-9]+]], !nonnull [[META17]], !align [[META184:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG183]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8, !dbg [[DBG185:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META181:![0-9]+]], !DIExpression(), [[META177]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG182:![0-9]+]], !nonnull [[META16]], !align [[META183:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG182]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8, !dbg [[DBG184:![0-9]+]]
// CHECK2-NEXT: invoke void @_Z3fooIPPcEvT_(ptr noundef [[TMP2]])
-// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG187:![0-9]+]]
+// CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG186:![0-9]+]]
// CHECK2: invoke.cont:
-// CHECK2-NEXT: #dbg_declare(ptr [[VAR]], [[META188:![0-9]+]], !DIExpression(), [[META189:![0-9]+]])
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR]], align 8, !dbg [[DBG190:![0-9]+]]
-// CHECK2-NEXT: [[TMP4:%.*]] = mul nsw i64 0, [[TMP1]], !dbg [[DBG190]]
-// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 [[TMP4]], !dbg [[DBG190]]
-// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, ptr [[ARRAYIDX]], i64 0, !dbg [[DBG190]]
-// CHECK2-NEXT: ret void, !dbg [[DBG191:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[VAR]], [[META187:![0-9]+]], !DIExpression(), [[META188:![0-9]+]])
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR]], align 8, !dbg [[DBG189:![0-9]+]]
+// CHECK2-NEXT: [[TMP4:%.*]] = mul nsw i64 0, [[TMP1]], !dbg [[DBG189]]
+// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 [[TMP4]], !dbg [[DBG189]]
+// CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, ptr [[ARRAYIDX]], i64 0, !dbg [[DBG189]]
+// CHECK2-NEXT: ret void, !dbg [[DBG190:![0-9]+]]
// CHECK2: terminate.lpad:
// CHECK2-NEXT: [[TMP5:%.*]] = landingpad { ptr, i32 }
-// CHECK2-NEXT: catch ptr null, !dbg [[DBG187]]
-// CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { ptr, i32 } [[TMP5]], 0, !dbg [[DBG187]]
-// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP6]]) #[[ATTR6]], !dbg [[DBG187]]
-// CHECK2-NEXT: unreachable, !dbg [[DBG187]]
+// CHECK2-NEXT: catch ptr null, !dbg [[DBG186]]
+// CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { ptr, i32 } [[TMP5]], 0, !dbg [[DBG186]]
+// CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP6]]) #[[ATTR6]], !dbg [[DBG186]]
+// CHECK2-NEXT: unreachable, !dbg [[DBG186]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] !dbg [[DBG192:![0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]], i64 noundef [[VLA:%.*]]) #[[ATTR2]] !dbg [[DBG191:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META193:![0-9]+]], !DIExpression(), [[META194:![0-9]+]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META192:![0-9]+]], !DIExpression(), [[META193:![0-9]+]])
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META195:![0-9]+]], !DIExpression(), [[META194]])
+// CHECK2-NEXT: #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META194:![0-9]+]], !DIExpression(), [[META193]])
// CHECK2-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META196:![0-9]+]], !DIExpression(), [[META194]])
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META195:![0-9]+]], !DIExpression(), [[META193]])
// CHECK2-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META197:![0-9]+]], !DIExpression(), [[META194]])
-// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG198:![0-9]+]], !nonnull [[META17]], !align [[META184]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG198]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG198]]
-// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG198]]
-// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG198]]
-// CHECK2-NEXT: call void @_Z5tmainIPPcEiT_.omp_outlined_debug__(ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP1]]) #[[ATTR5]], !dbg [[DBG198]]
-// CHECK2-NEXT: ret void, !dbg [[DBG198]]
+// CHECK2-NEXT: #dbg_declare(ptr [[VLA_ADDR]], [[META196:![0-9]+]], !DIExpression(), [[META193]])
+// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG197:![0-9]+]], !nonnull [[META16]], !align [[META183]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8, !dbg [[DBG197]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG197]]
+// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG197]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG197]]
+// CHECK2-NEXT: call void @_Z5tmainIPPcEiT_.omp_outlined_debug__(ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP1]]) #[[ATTR5]], !dbg [[DBG197]]
+// CHECK2-NEXT: ret void, !dbg [[DBG197]]
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z3fooIPPcEvT_
-// CHECK2-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR3]] comdat !dbg [[DBG199:![0-9]+]] {
+// CHECK2-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR3]] comdat !dbg [[DBG198:![0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META202:![0-9]+]], !DIExpression(), [[META203:![0-9]+]])
-// CHECK2-NEXT: ret void, !dbg [[DBG204:![0-9]+]]
+// CHECK2-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META201:![0-9]+]], !DIExpression(), [[META202:![0-9]+]])
+// CHECK2-NEXT: ret void, !dbg [[DBG203:![0-9]+]]
//
//
// CHECK3-LABEL: define {{[^@]+}}@main
@@ -746,10 +746,10 @@ int main (int argc, char **argv) {
//
//
// CHECK3-LABEL: define {{[^@]+}}@main..omp_par
-// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK3-NEXT: omp.par.entry:
// CHECK3-NEXT: [[GEP_VLA:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
-// CHECK3-NEXT: [[LOADGEP_VLA:%.*]] = load ptr, ptr [[GEP_VLA]], align 8, !align [[META3:![0-9]+]]
+// CHECK3-NEXT: [[LOADGEP_VLA:%.*]] = load ptr, ptr [[GEP_VLA]], align 8, !align [[META2:![0-9]+]]
// CHECK3-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
@@ -808,12 +808,12 @@ int main (int argc, char **argv) {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_..omp_par
-// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: omp.par.entry:
// CHECK3-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
-// CHECK3-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META4:![0-9]+]]
+// CHECK3-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META3:![0-9]+]]
// CHECK3-NEXT: [[GEP_ARGC_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 1
-// CHECK3-NEXT: [[LOADGEP_ARGC_ADDR:%.*]] = load ptr, ptr [[GEP_ARGC_ADDR]], align 8, !align [[META4]]
+// CHECK3-NEXT: [[LOADGEP_ARGC_ADDR:%.*]] = load ptr, ptr [[GEP_ARGC_ADDR]], align 8, !align [[META3]]
// CHECK3-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
@@ -848,7 +848,7 @@ int main (int argc, char **argv) {
//
//
// CHECK4-LABEL: define {{[^@]+}}@main
-// CHECK4-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG11:![0-9]+]] {
+// CHECK4-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG10:![0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
// CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
@@ -858,85 +858,85 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
// CHECK4-NEXT: store i32 0, ptr [[RETVAL]], align 4
// CHECK4-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
-// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META18:![0-9]+]], !DIExpression(), [[META19:![0-9]+]])
+// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META17:![0-9]+]], !DIExpression(), [[META18:![0-9]+]])
// CHECK4-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
-// CHECK4-NEXT: #dbg_declare(ptr [[ARGV_ADDR]], [[META20:![0-9]+]], !DIExpression(), [[META19]])
-// CHECK4-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG21:![0-9]+]]
-// CHECK4-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg [[DBG21]]
-// CHECK4-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG21]]
-// CHECK4-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG21]]
-// CHECK4-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 16, !dbg [[DBG21]]
-// CHECK4-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG21]]
-// CHECK4-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META22:![0-9]+]], !DIExpression(), [[META24:![0-9]+]])
-// CHECK4-NEXT: #dbg_declare(ptr [[VLA]], [[META25:![0-9]+]], !DIExpression(), [[DBG21]])
+// CHECK4-NEXT: #dbg_declare(ptr [[ARGV_ADDR]], [[META19:![0-9]+]], !DIExpression(), [[META18]])
+// CHECK4-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG20:![0-9]+]]
+// CHECK4-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg [[DBG20]]
+// CHECK4-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0(), !dbg [[DBG20]]
+// CHECK4-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8, !dbg [[DBG20]]
+// CHECK4-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 16, !dbg [[DBG20]]
+// CHECK4-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8, !dbg [[DBG20]]
+// CHECK4-NEXT: #dbg_declare(ptr [[__VLA_EXPR0]], [[META21:![0-9]+]], !DIExpression(), [[META23:![0-9]+]])
+// CHECK4-NEXT: #dbg_declare(ptr [[VLA]], [[META24:![0-9]+]], !DIExpression(), [[DBG20]])
// CHECK4-NEXT: br label [[OMP_PARALLEL:%.*]]
// CHECK4: omp_parallel:
// CHECK4-NEXT: [[GEP_VLA:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
// CHECK4-NEXT: store ptr [[VLA]], ptr [[GEP_VLA]], align 8
-// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @main..omp_par, ptr [[STRUCTARG]]), !dbg [[DBG29:![0-9]+]]
+// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @main..omp_par, ptr [[STRUCTARG]]), !dbg [[DBG28:![0-9]+]]
// CHECK4-NEXT: br label [[OMP_PAR_EXIT:%.*]]
// CHECK4: omp.par.exit:
-// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !dbg [[DBG30:![0-9]+]]
-// CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIPPcEiT_(ptr noundef [[TMP3]]), !dbg [[DBG30]]
-// CHECK4-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4, !dbg [[DBG30]]
-// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG31:![0-9]+]]
-// CHECK4-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP4]]), !dbg [[DBG31]]
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[RETVAL]], align 4, !dbg [[DBG31]]
-// CHECK4-NEXT: ret i32 [[TMP5]], !dbg [[DBG31]]
+// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !dbg [[DBG29:![0-9]+]]
+// CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIPPcEiT_(ptr noundef [[TMP3]]), !dbg [[DBG29]]
+// CHECK4-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4, !dbg [[DBG29]]
+// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG30:![0-9]+]]
+// CHECK4-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP4]]), !dbg [[DBG30]]
+// CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[RETVAL]], align 4, !dbg [[DBG30]]
+// CHECK4-NEXT: ret i32 [[TMP5]], !dbg [[DBG30]]
//
//
// CHECK4-LABEL: define {{[^@]+}}@main..omp_par
-// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG32:![0-9]+]] {
+// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG31:![0-9]+]] {
// CHECK4-NEXT: omp.par.entry:
// CHECK4-NEXT: [[GEP_VLA:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
-// CHECK4-NEXT: [[LOADGEP_VLA:%.*]] = load ptr, ptr [[GEP_VLA]], align 8, !align [[META34:![0-9]+]]
+// CHECK4-NEXT: [[LOADGEP_VLA:%.*]] = load ptr, ptr [[GEP_VLA]], align 8, !align [[META33:![0-9]+]]
// CHECK4-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
// CHECK4-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
-// CHECK4-NEXT: #dbg_declare(ptr [[LOADGEP_VLA]], [[META35:![0-9]+]], !DIExpression(), [[META36:![0-9]+]])
+// CHECK4-NEXT: #dbg_declare(ptr [[LOADGEP_VLA]], [[META34:![0-9]+]], !DIExpression(), [[META35:![0-9]+]])
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK4: omp.par.region:
-// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[LOADGEP_VLA]], i64 1, !dbg [[DBG37:![0-9]+]]
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG37]]
-// CHECK4-NEXT: call void @_Z3fooIiEvT_(i32 noundef [[TMP2]]), !dbg [[DBG37]]
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr @global, align 4, !dbg [[DBG37]]
-// CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[LOADGEP_VLA]], i64 1, !dbg [[DBG37]]
-// CHECK4-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG37]]
-// CHECK4-NEXT: br label [[OMP_PAR_REGION_PARALLEL_AFTER:%.*]], !dbg [[DBG37]]
+// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[LOADGEP_VLA]], i64 1, !dbg [[DBG36:![0-9]+]]
+// CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !dbg [[DBG36]]
+// CHECK4-NEXT: call void @_Z3fooIiEvT_(i32 noundef [[TMP2]]), !dbg [[DBG36]]
+// CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr @global, align 4, !dbg [[DBG36]]
+// CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[LOADGEP_VLA]], i64 1, !dbg [[DBG36]]
+// CHECK4-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX1]], align 4, !dbg [[DBG36]]
+// CHECK4-NEXT: br label [[OMP_PAR_REGION_PARALLEL_AFTER:%.*]], !dbg [[DBG36]]
// CHECK4: omp.par.region.parallel.after:
// CHECK4-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
// CHECK4: omp.par.pre_finalize:
// CHECK4-NEXT: br label [[DOTFINI:%.*]]
// CHECK4: .fini:
-// CHECK4-NEXT: br label [[OMP_PAR_EXIT_EXITSTUB:%.*]], !dbg [[DBG37]]
+// CHECK4-NEXT: br label [[OMP_PAR_EXIT_EXITSTUB:%.*]], !dbg [[DBG36]]
// CHECK4: omp.par.exit.exitStub:
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z3fooIiEvT_
-// CHECK4-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat !dbg [[DBG38:![0-9]+]] {
+// CHECK4-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat !dbg [[DBG37:![0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK4-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
-// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META43:![0-9]+]], !DIExpression(), [[META44:![0-9]+]])
-// CHECK4-NEXT: ret void, !dbg [[META44]]
+// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META42:![0-9]+]], !DIExpression(), [[META43:![0-9]+]])
+// CHECK4-NEXT: ret void, !dbg [[META43]]
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_
-// CHECK4-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat !dbg [[DBG45:![0-9]+]] {
+// CHECK4-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat !dbg [[DBG44:![0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[STRUCTARG:%.*]] = alloca { ptr, ptr }, align 8
// CHECK4-NEXT: [[DOTRELOADED:%.*]] = alloca i64, align 8
// CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META57:![0-9]+]], !DIExpression(), [[META58:![0-9]+]])
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG59:![0-9]+]]
-// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP0]], i64 0, !dbg [[DBG59]]
-// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8, !dbg [[DBG59]]
-// CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 0, !dbg [[DBG59]]
-// CHECK4-NEXT: [[TMP2:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1, !dbg [[DBG59]]
-// CHECK4-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64, !dbg [[DBG59]]
+// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META56:![0-9]+]], !DIExpression(), [[META57:![0-9]+]])
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !dbg [[DBG58:![0-9]+]]
+// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP0]], i64 0, !dbg [[DBG58]]
+// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8, !dbg [[DBG58]]
+// CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 0, !dbg [[DBG58]]
+// CHECK4-NEXT: [[TMP2:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1, !dbg [[DBG58]]
+// CHECK4-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64, !dbg [[DBG58]]
// CHECK4-NEXT: store i64 [[TMP3]], ptr [[DOTRELOADED]], align 8
// CHECK4-NEXT: br label [[OMP_PARALLEL:%.*]]
// CHECK4: omp_parallel:
@@ -944,51 +944,51 @@ int main (int argc, char **argv) {
// CHECK4-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
// CHECK4-NEXT: [[GEP_ARGC_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 1
// CHECK4-NEXT: store ptr [[ARGC_ADDR]], ptr [[GEP_ARGC_ADDR]], align 8
-// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @_Z5tmainIPPcEiT_..omp_par, ptr [[STRUCTARG]]), !dbg [[DBG60:![0-9]+]]
+// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @_Z5tmainIPPcEiT_..omp_par, ptr [[STRUCTARG]]), !dbg [[DBG59:![0-9]+]]
// CHECK4-NEXT: br label [[OMP_PAR_EXIT:%.*]]
// CHECK4: omp.par.exit:
-// CHECK4-NEXT: ret i32 0, !dbg [[DBG62:![0-9]+]]
+// CHECK4-NEXT: ret i32 0, !dbg [[DBG61:![0-9]+]]
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIPPcEiT_..omp_par
-// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] !dbg [[DBG63:![0-9]+]] {
+// CHECK4-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] !dbg [[DBG62:![0-9]+]] {
// CHECK4-NEXT: omp.par.entry:
// CHECK4-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
-// CHECK4-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META64:![0-9]+]]
+// CHECK4-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META63:![0-9]+]]
// CHECK4-NEXT: [[GEP_ARGC_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 1
-// CHECK4-NEXT: [[LOADGEP_ARGC_ADDR:%.*]] = load ptr, ptr [[GEP_ARGC_ADDR]], align 8, !align [[META64]]
+// CHECK4-NEXT: [[LOADGEP_ARGC_ADDR:%.*]] = load ptr, ptr [[GEP_ARGC_ADDR]], align 8, !align [[META63]]
// CHECK4-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
// CHECK4-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[VAR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[TMP2:%.*]] = load i64, ptr [[LOADGEP__RELOADED]], align 8
-// CHECK4-NEXT: #dbg_declare(ptr [[LOADGEP_ARGC_ADDR]], [[META65:![0-9]+]], !DIExpression(), [[META66:![0-9]+]])
+// CHECK4-NEXT: #dbg_declare(ptr [[LOADGEP_ARGC_ADDR]], [[META64:![0-9]+]], !DIExpression(), [[META65:![0-9]+]])
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
// CHECK4: omp.par.region:
-// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[LOADGEP_ARGC_ADDR]], align 8, !dbg [[DBG67:![0-9]+]]
-// CHECK4-NEXT: call void @_Z3fooIPPcEvT_(ptr noundef [[TMP3]]), !dbg [[DBG67]]
-// CHECK4-NEXT: #dbg_declare(ptr [[VAR]], [[META69:![0-9]+]], !DIExpression(), [[META70:![0-9]+]])
-// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VAR]], align 8, !dbg [[META70]]
-// CHECK4-NEXT: [[TMP5:%.*]] = mul nsw i64 0, [[TMP2]], !dbg [[META70]]
-// CHECK4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 [[TMP5]], !dbg [[META70]]
-// CHECK4-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, ptr [[ARRAYIDX2]], i64 0, !dbg [[META70]]
-// CHECK4-NEXT: br label [[OMP_PAR_REGION_PARALLEL_AFTER:%.*]], !dbg [[DBG71:![0-9]+]]
+// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[LOADGEP_ARGC_ADDR]], align 8, !dbg [[DBG66:![0-9]+]]
+// CHECK4-NEXT: call void @_Z3fooIPPcEvT_(ptr noundef [[TMP3]]), !dbg [[DBG66]]
+// CHECK4-NEXT: #dbg_declare(ptr [[VAR]], [[META68:![0-9]+]], !DIExpression(), [[META69:![0-9]+]])
+// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VAR]], align 8, !dbg [[META69]]
+// CHECK4-NEXT: [[TMP5:%.*]] = mul nsw i64 0, [[TMP2]], !dbg [[META69]]
+// CHECK4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 [[TMP5]], !dbg [[META69]]
+// CHECK4-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, ptr [[ARRAYIDX2]], i64 0, !dbg [[META69]]
+// CHECK4-NEXT: br label [[OMP_PAR_REGION_PARALLEL_AFTER:%.*]], !dbg [[DBG70:![0-9]+]]
// CHECK4: omp.par.region.parallel.after:
// CHECK4-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
// CHECK4: omp.par.pre_finalize:
// CHECK4-NEXT: br label [[DOTFINI:%.*]]
// CHECK4: .fini:
-// CHECK4-NEXT: br label [[OMP_PAR_EXIT_EXITSTUB:%.*]], !dbg [[DBG71]]
+// CHECK4-NEXT: br label [[OMP_PAR_EXIT_EXITSTUB:%.*]], !dbg [[DBG70]]
// CHECK4: omp.par.exit.exitStub:
// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z3fooIPPcEvT_
-// CHECK4-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR3]] comdat !dbg [[DBG74:![0-9]+]] {
+// CHECK4-SAME: (ptr noundef [[ARGC:%.*]]) #[[ATTR3]] comdat !dbg [[DBG73:![0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8
-// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META77:![0-9]+]], !DIExpression(), [[META78:![0-9]+]])
-// CHECK4-NEXT: ret void, !dbg [[META78]]
+// CHECK4-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META76:![0-9]+]], !DIExpression(), [[META77:![0-9]+]])
+// CHECK4-NEXT: ret void, !dbg [[META77]]
//
diff --git a/clang/test/OpenMP/parallel_copyin_codegen.cpp b/clang/test/OpenMP/parallel_copyin_codegen.cpp
index c3c1815f4ba45..730f3c44cbb89 100644
--- a/clang/test/OpenMP/parallel_copyin_codegen.cpp
+++ b/clang/test/OpenMP/parallel_copyin_codegen.cpp
@@ -222,7 +222,7 @@ void foo() {
// CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[REF_TMP]]) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: [[TMP0:%.*]] = load atomic i8, ptr @_ZGVZ4mainE5s_arr acquire, align 8
// CHECK1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF3:![0-9]+]]
+// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]]
// CHECK1: init.check:
// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ4mainE5s_arr) #[[ATTR2]]
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
@@ -238,7 +238,7 @@ void foo() {
// CHECK1: init.end:
// CHECK1-NEXT: [[TMP4:%.*]] = load atomic i8, ptr @_ZGVZ4mainE3var acquire, align 8
// CHECK1-NEXT: [[GUARD_UNINITIALIZED1:%.*]] = icmp eq i8 [[TMP4]], 0
-// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END5:%.*]], !prof [[PROF3]]
+// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END5:%.*]], !prof [[PROF2]]
// CHECK1: init.check2:
// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ4mainE3var) #[[ATTR2]]
// CHECK1-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[TMP5]], 0
@@ -458,7 +458,7 @@ void foo() {
// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[REF_TMP]]) #[[ATTR2]]
// CHECK1-NEXT: [[TMP0:%.*]] = load atomic i8, ptr @_ZGVZ5tmainIiET_vE5s_arr acquire, align 8
// CHECK1-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF3]]
+// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2]]
// CHECK1: init.check:
// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ5tmainIiET_vE5s_arr) #[[ATTR2]]
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
@@ -474,7 +474,7 @@ void foo() {
// CHECK1: init.end:
// CHECK1-NEXT: [[TMP4:%.*]] = load atomic i8, ptr @_ZGVZ5tmainIiET_vE3var acquire, align 8
// CHECK1-NEXT: [[GUARD_UNINITIALIZED1:%.*]] = icmp eq i8 [[TMP4]], 0
-// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END5:%.*]], !prof [[PROF3]]
+// CHECK1-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END5:%.*]], !prof [[PROF2]]
// CHECK1: init.check2:
// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ5tmainIiET_vE3var) #[[ATTR2]]
// CHECK1-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[TMP5]], 0
@@ -792,7 +792,7 @@ void foo() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -835,7 +835,7 @@ void foo() {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[TMP0:%.*]] = load atomic i8, ptr @_ZGVZ10array_funcvE1s acquire, align 8
// CHECK5-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK5-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF3:![0-9]+]]
+// CHECK5-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]]
// CHECK5: init.check:
// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ10array_funcvE1s) #[[ATTR1:[0-9]+]]
// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
@@ -1014,7 +1014,7 @@ void foo() {
// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[REF_TMP]]) #[[ATTR3:[0-9]+]]
// CHECK11-NEXT: [[TMP0:%.*]] = load i8, ptr @_ZGVZ4mainE5s_arr, align 1
// CHECK11-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF3:![0-9]+]]
+// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]]
// CHECK11: init.check:
// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5s_arr, float noundef 1.000000e+00)
// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds nuw (i8, ptr @_ZZ4mainE5s_arr, i64 4), float noundef 2.000000e+00)
@@ -1024,7 +1024,7 @@ void foo() {
// CHECK11: init.end:
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr @_ZGVZ4mainE3var, align 1
// CHECK11-NEXT: [[GUARD_UNINITIALIZED1:%.*]] = icmp eq i8 [[TMP2]], 0
-// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END3:%.*]], !prof [[PROF3]]
+// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END3:%.*]], !prof [[PROF2]]
// CHECK11: init.check2:
// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE3var, float noundef 3.000000e+00)
// CHECK11-NEXT: [[TMP3:%.*]] = call i32 @__cxa_thread_atexit(ptr @_ZN1SIfED1Ev, ptr @_ZZ4mainE3var, ptr @__dso_handle) #[[ATTR3]]
@@ -1106,7 +1106,7 @@ void foo() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1120,10 +1120,10 @@ void foo() {
// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
-// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
-// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
-// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK11-NEXT: [[TMP4:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ4mainE5t_var)
// CHECK11-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK11-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP4]] to i64
@@ -1168,7 +1168,7 @@ void foo() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@main.omp_outlined.1
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1176,7 +1176,7 @@ void foo() {
// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK11-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ4mainE5t_var)
// CHECK11-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK11-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
@@ -1208,7 +1208,7 @@ void foo() {
// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[REF_TMP]]) #[[ATTR3]]
// CHECK11-NEXT: [[TMP0:%.*]] = load i8, ptr @_ZGVZ5tmainIiET_vE5s_arr, align 8
// CHECK11-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF3]]
+// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2]]
// CHECK11: init.check:
// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ5tmainIiET_vE5s_arr, i32 noundef 1)
// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds nuw (i8, ptr @_ZZ5tmainIiET_vE5s_arr, i64 4), i32 noundef 2)
@@ -1218,7 +1218,7 @@ void foo() {
// CHECK11: init.end:
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr @_ZGVZ5tmainIiET_vE3var, align 8
// CHECK11-NEXT: [[GUARD_UNINITIALIZED1:%.*]] = icmp eq i8 [[TMP2]], 0
-// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END3:%.*]], !prof [[PROF3]]
+// CHECK11-NEXT: br i1 [[GUARD_UNINITIALIZED1]], label [[INIT_CHECK2:%.*]], label [[INIT_END3:%.*]], !prof [[PROF2]]
// CHECK11: init.check2:
// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) @_ZZ5tmainIiET_vE3var, i32 noundef 3)
// CHECK11-NEXT: [[TMP3:%.*]] = call i32 @__cxa_thread_atexit(ptr @_ZN1SIiED1Ev, ptr @_ZZ5tmainIiET_vE3var, ptr @__dso_handle) #[[ATTR3]]
@@ -1338,7 +1338,7 @@ void foo() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1352,10 +1352,10 @@ void foo() {
// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
-// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
-// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
-// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK11-NEXT: [[TMP4:%.*]] = call align 128 ptr @llvm.threadlocal.address.p0(ptr align 128 @_ZZ5tmainIiET_vE5t_var)
// CHECK11-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK11-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP4]] to i64
@@ -1400,7 +1400,7 @@ void foo() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined.3
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1408,7 +1408,7 @@ void foo() {
// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK11-NEXT: [[TMP1:%.*]] = call align 128 ptr @llvm.threadlocal.address.p0(ptr align 128 @_ZZ5tmainIiET_vE5t_var)
// CHECK11-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK11-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
@@ -1509,7 +1509,7 @@ void foo() {
//
//
// CHECK14-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK14-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK14-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {
// CHECK14-NEXT: entry:
// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1517,7 +1517,7 @@ void foo() {
// CHECK14-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK14-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK14-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8
-// CHECK14-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK14-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK14-NEXT: [[TMP1:%.*]] = call align 128 ptr @llvm.threadlocal.address.p0(ptr align 128 @g)
// CHECK14-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK14-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
@@ -1551,7 +1551,7 @@ void foo() {
//
//
// CHECK14-LABEL: define {{[^@]+}}@_ZTW1g
-// CHECK14-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK14-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK14-NEXT: [[TMP1:%.*]] = call align 128 ptr @llvm.threadlocal.address.p0(ptr align 128 @g)
// CHECK14-NEXT: ret ptr [[TMP1]]
//
@@ -1561,7 +1561,7 @@ void foo() {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[TMP0:%.*]] = load i8, ptr @_ZGVZ10array_funcvE1s, align 1
// CHECK15-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK15-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF3:![0-9]+]]
+// CHECK15-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT_CHECK:%.*]], label [[INIT_END:%.*]], !prof [[PROF2:![0-9]+]]
// CHECK15: init.check:
// CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
// CHECK15: arrayctor.loop:
@@ -1618,7 +1618,7 @@ void foo() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_Z10array_funcv.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1628,8 +1628,8 @@ void foo() {
// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
-// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK15-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ10array_funcvE1a)
// CHECK15-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK15-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
@@ -1729,7 +1729,7 @@ void foo() {
// CHECK16-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK16-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK16-NEXT: store ptr [[T]], ptr [[T_ADDR]], align 8
-// CHECK16-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK16-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK16-NEXT: [[TMP1:%.*]] = call ptr @_ZTW1t()
// CHECK16-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK16-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
@@ -1762,7 +1762,7 @@ void foo() {
// CHECK16-NEXT: entry:
// CHECK16-NEXT: [[TMP0:%.*]] = load i8, ptr @__tls_guard, align 1
// CHECK16-NEXT: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
-// CHECK16-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT:%.*]], label [[EXIT:%.*]], !prof [[PROF7:![0-9]+]]
+// CHECK16-NEXT: br i1 [[GUARD_UNINITIALIZED]], label [[INIT:%.*]], label [[EXIT:%.*]], !prof [[PROF6:![0-9]+]]
// CHECK16: init:
// CHECK16-NEXT: store i8 1, ptr @__tls_guard, align 1
// CHECK16-NEXT: call void @__cxx_global_var_init()
diff --git a/clang/test/OpenMP/parallel_copyin_combined_codegen.c b/clang/test/OpenMP/parallel_copyin_combined_codegen.c
index fa5b6603e50d8..475471c020ca5 100644
--- a/clang/test/OpenMP/parallel_copyin_combined_codegen.c
+++ b/clang/test/OpenMP/parallel_copyin_combined_codegen.c
@@ -1,3 +1,4 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --prefix-filecheck-ir-name _ --version 6
// RUN: %clang_cc1 -verify -fopenmp -x c -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s
// expected-no-diagnostics
@@ -52,481 +53,508 @@ void test_omp_parallel_master_copyin(int *a) {
a[i] = i + x;
}
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_copyin
-// CHECK-SAME: (ptr noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: store i32 1, ptr [[TMP0]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @test_omp_parallel_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
-// CHECK-NEXT: ret void
+// CHECK-LABEL: define dso_local void @test_omp_parallel_copyin(
+// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: store i32 1, ptr [[TMP0]], align 4
+// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @test_omp_parallel_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
+// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_copyin.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
-// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
-// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
-// CHECK-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
-// CHECK: copyin.not.master:
-// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
-// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
-// CHECK-NEXT: br label [[COPYIN_NOT_MASTER_END]]
-// CHECK: copyin.not.master.end:
-// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
-// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]])
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// CHECK-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 99
-// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK: cond.true:
-// CHECK-NEXT: br label [[COND_END:%.*]]
-// CHECK: cond.false:
-// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: br label [[COND_END]]
-// CHECK: cond.end:
-// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK: omp.inner.for.cond:
-// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK: omp.inner.for.body:
-// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[TMP18:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
-// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP19]]
-// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8
-// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
-// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]]
-// CHECK-NEXT: store i32 [[ADD2]], ptr [[ARRAYIDX]], align 4
-// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK: omp.body.continue:
-// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK: omp.inner.for.inc:
-// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], 1
-// CHECK-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK: omp.inner.for.end:
-// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK: omp.loop.exit:
-// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]])
-// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
-// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP26]])
-// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_for_copyin
-// CHECK-SAME: (ptr noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: store i32 2, ptr [[TMP0]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @test_omp_parallel_for_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
-// CHECK-NEXT: ret void
+// CHECK-LABEL: define internal void @test_omp_parallel_copyin.omp_outlined(
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
+// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
+// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
+// CHECK-NEXT: br i1 [[TMP5]], label %[[COPYIN_NOT_MASTER:.*]], label %[[COPYIN_NOT_MASTER_END:.*]]
+// CHECK: [[COPYIN_NOT_MASTER]]:
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
+// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
+// CHECK-NEXT: br label %[[COPYIN_NOT_MASTER_END]]
+// CHECK: [[COPYIN_NOT_MASTER_END]]:
+// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]])
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// CHECK-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 99
+// CHECK-NEXT: br i1 [[CMP]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
+// CHECK: [[COND_TRUE]]:
+// CHECK-NEXT: br label %[[COND_END:.*]]
+// CHECK: [[COND_FALSE]]:
+// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: br label %[[COND_END]]
+// CHECK: [[COND_END]]:
+// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 99, %[[COND_TRUE]] ], [ [[TMP12]], %[[COND_FALSE]] ]
+// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND:.*]]
+// CHECK: [[OMP_INNER_FOR_COND]]:
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
+// CHECK-NEXT: br i1 [[CMP1]], label %[[OMP_INNER_FOR_BODY:.*]], label %[[OMP_INNER_FOR_END:.*]]
+// CHECK: [[OMP_INNER_FOR_BODY]]:
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[TMP18:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
+// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP19]]
+// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8
+// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
+// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]]
+// CHECK-NEXT: store i32 [[ADD2]], ptr [[ARRAYIDX]], align 4
+// CHECK-NEXT: br label %[[OMP_BODY_CONTINUE:.*]]
+// CHECK: [[OMP_BODY_CONTINUE]]:
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_INC:.*]]
+// CHECK: [[OMP_INNER_FOR_INC]]:
+// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], 1
+// CHECK-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND]]
+// CHECK: [[OMP_INNER_FOR_END]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]])
+// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP26]])
+// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_for_copyin.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
-// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
-// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
-// CHECK-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
-// CHECK: copyin.not.master:
-// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
-// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
-// CHECK-NEXT: br label [[COPYIN_NOT_MASTER_END]]
-// CHECK: copyin.not.master.end:
-// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
-// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]])
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// CHECK-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 99
-// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK: cond.true:
-// CHECK-NEXT: br label [[COND_END:%.*]]
-// CHECK: cond.false:
-// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: br label [[COND_END]]
-// CHECK: cond.end:
-// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK: omp.inner.for.cond:
-// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK: omp.inner.for.body:
-// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[TMP18:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
-// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP19]]
-// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8
-// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
-// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]]
-// CHECK-NEXT: store i32 [[ADD2]], ptr [[ARRAYIDX]], align 4
-// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK: omp.body.continue:
-// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK: omp.inner.for.inc:
-// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], 1
-// CHECK-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK: omp.inner.for.end:
-// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK: omp.loop.exit:
-// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]])
-// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_for_simd_copyin
-// CHECK-SAME: (ptr noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: store i32 3, ptr [[TMP0]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @test_omp_parallel_for_simd_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
-// CHECK-NEXT: ret void
+// CHECK-LABEL: define dso_local void @test_omp_parallel_for_copyin(
+// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: store i32 2, ptr [[TMP0]], align 4
+// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @test_omp_parallel_for_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
+// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_for_simd_copyin.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
-// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
-// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
-// CHECK-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
-// CHECK: copyin.not.master:
-// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
-// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
-// CHECK-NEXT: br label [[COPYIN_NOT_MASTER_END]]
-// CHECK: copyin.not.master.end:
-// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
-// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]])
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// CHECK-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 99
-// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK: cond.true:
-// CHECK-NEXT: br label [[COND_END:%.*]]
-// CHECK: cond.false:
-// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: br label [[COND_END]]
-// CHECK: cond.end:
-// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK: omp.inner.for.cond:
-// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group
-// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group
-// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK: omp.inner.for.body:
-// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group
-// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group
-// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group
-// CHECK-NEXT: [[TMP18:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4, !llvm.access.group
-// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP19]]
-// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group
-// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group
-// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
-// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]]
-// CHECK-NEXT: store i32 [[ADD2]], ptr [[ARRAYIDX]], align 4, !llvm.access.group
-// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK: omp.body.continue:
-// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK: omp.inner.for.inc:
-// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], 1
-// CHECK-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK: omp.inner.for.end:
-// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK: omp.loop.exit:
-// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]])
-// CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
-// CHECK-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK: .omp.final.then:
-// CHECK-NEXT: store i32 100, ptr [[I]], align 4
-// CHECK-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK: .omp.final.done:
-// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_sections_copyin
-// CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: store i32 4, ptr [[TMP0]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 3, ptr @test_omp_parallel_sections_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[TMP1]])
-// CHECK-NEXT: ret void
+// CHECK-LABEL: define internal void @test_omp_parallel_for_copyin.omp_outlined(
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
+// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
+// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
+// CHECK-NEXT: br i1 [[TMP5]], label %[[COPYIN_NOT_MASTER:.*]], label %[[COPYIN_NOT_MASTER_END:.*]]
+// CHECK: [[COPYIN_NOT_MASTER]]:
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
+// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
+// CHECK-NEXT: br label %[[COPYIN_NOT_MASTER_END]]
+// CHECK: [[COPYIN_NOT_MASTER_END]]:
+// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP8]])
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// CHECK-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 99
+// CHECK-NEXT: br i1 [[CMP]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
+// CHECK: [[COND_TRUE]]:
+// CHECK-NEXT: br label %[[COND_END:.*]]
+// CHECK: [[COND_FALSE]]:
+// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: br label %[[COND_END]]
+// CHECK: [[COND_END]]:
+// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 99, %[[COND_TRUE]] ], [ [[TMP12]], %[[COND_FALSE]] ]
+// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND:.*]]
+// CHECK: [[OMP_INNER_FOR_COND]]:
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
+// CHECK-NEXT: br i1 [[CMP1]], label %[[OMP_INNER_FOR_BODY:.*]], label %[[OMP_INNER_FOR_END:.*]]
+// CHECK: [[OMP_INNER_FOR_BODY]]:
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[TMP18:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
+// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP19]]
+// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8
+// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
+// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]]
+// CHECK-NEXT: store i32 [[ADD2]], ptr [[ARRAYIDX]], align 4
+// CHECK-NEXT: br label %[[OMP_BODY_CONTINUE:.*]]
+// CHECK: [[OMP_BODY_CONTINUE]]:
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_INC:.*]]
+// CHECK: [[OMP_INNER_FOR_INC]]:
+// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], 1
+// CHECK-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND]]
+// CHECK: [[OMP_INNER_FOR_END]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]])
+// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_sections_copyin.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
-// CHECK-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
-// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
-// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
-// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP3:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
-// CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP3]] to i64
-// CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP4]], [[TMP5]]
-// CHECK-NEXT: br i1 [[TMP6]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
-// CHECK: copyin.not.master:
-// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP2]], align 4
-// CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP3]], align 4
-// CHECK-NEXT: br label [[COPYIN_NOT_MASTER_END]]
-// CHECK: copyin.not.master.end:
-// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
-// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]])
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
-// CHECK-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_UB_]], align 4
-// CHECK-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
-// CHECK-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_IL_]], align 4
-// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB4:[0-9]+]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_SECTIONS_IL_]], ptr [[DOTOMP_SECTIONS_LB_]], ptr [[DOTOMP_SECTIONS_UB_]], ptr [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
-// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_UB_]], align 4
-// CHECK-NEXT: [[TMP13:%.*]] = icmp slt i32 [[TMP12]], 1
-// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i32 [[TMP12]], i32 1
-// CHECK-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_SECTIONS_UB_]], align 4
-// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_LB_]], align 4
-// CHECK-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_SECTIONS_IV_]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK: omp.inner.for.cond:
-// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_IV_]], align 4
-// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_UB_]], align 4
-// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK: omp.inner.for.body:
-// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_IV_]], align 4
-// CHECK-NEXT: switch i32 [[TMP18]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
-// CHECK-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
-// CHECK-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE1:%.*]]
-// CHECK-NEXT: ]
-// CHECK: .omp.sections.case:
-// CHECK-NEXT: [[TMP19:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
-// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8
-// CHECK-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4
-// CHECK-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
-// CHECK: .omp.sections.case1:
-// CHECK-NEXT: [[TMP22:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
-// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP1]], align 8
-// CHECK-NEXT: store i32 [[TMP23]], ptr [[TMP24]], align 4
-// CHECK-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
-// CHECK: .omp.sections.exit:
-// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK: omp.inner.for.inc:
-// CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_IV_]], align 4
-// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP25]], 1
-// CHECK-NEXT: store i32 [[INC]], ptr [[DOTOMP_SECTIONS_IV_]], align 4
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK: omp.inner.for.end:
-// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
-// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB4:[0-9]+]], i32 [[TMP27]])
-// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_master_copyin
-// CHECK-SAME: (ptr noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: store i32 5, ptr [[TMP0]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @test_omp_parallel_master_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
-// CHECK-NEXT: ret void
+// CHECK-LABEL: define dso_local void @test_omp_parallel_for_simd_copyin(
+// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: store i32 3, ptr [[TMP0]], align 4
+// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @test_omp_parallel_for_simd_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
+// CHECK-NEXT: ret void
//
-// CHECK-LABEL: define {{[^@]+}}@test_omp_parallel_master_copyin.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
-// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
-// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
-// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
-// CHECK-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
-// CHECK: copyin.not.master:
-// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
-// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
-// CHECK-NEXT: br label [[COPYIN_NOT_MASTER_END]]
-// CHECK: copyin.not.master.end:
-// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
-// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]])
-// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
-// CHECK-NEXT: [[TMP11:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB3:[0-9]+]], i32 [[TMP10]])
-// CHECK-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
-// CHECK-NEXT: br i1 [[TMP12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
-// CHECK: omp_if.then:
-// CHECK-NEXT: store i32 0, ptr [[I]], align 4
-// CHECK-NEXT: br label [[FOR_COND:%.*]]
-// CHECK: for.cond:
-// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP13]], 100
-// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
-// CHECK: for.body:
-// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[TMP15:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
-// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP16]]
-// CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP0]], align 8
-// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
-// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 [[IDXPROM]]
-// CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX]], align 4
-// CHECK-NEXT: br label [[FOR_INC:%.*]]
-// CHECK: for.inc:
-// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
-// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP19]], 1
-// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// CHECK-NEXT: br label [[FOR_COND]]
-// CHECK: for.end:
-// CHECK-NEXT: call void @__kmpc_end_master(ptr @[[GLOB3:[0-9]+]], i32 [[TMP10]])
-// CHECK-NEXT: br label [[OMP_IF_END:%.*]]
-// CHECK: omp_if.end:
-// CHECK-NEXT: ret void
+//
+// CHECK-LABEL: define internal void @test_omp_parallel_for_simd_copyin.omp_outlined(
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
+// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
+// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
+// CHECK-NEXT: br i1 [[TMP5]], label %[[COPYIN_NOT_MASTER:.*]], label %[[COPYIN_NOT_MASTER_END:.*]]
+// CHECK: [[COPYIN_NOT_MASTER]]:
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
+// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
+// CHECK-NEXT: br label %[[COPYIN_NOT_MASTER_END]]
+// CHECK: [[COPYIN_NOT_MASTER_END]]:
+// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP8]])
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// CHECK-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 99
+// CHECK-NEXT: br i1 [[CMP]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
+// CHECK: [[COND_TRUE]]:
+// CHECK-NEXT: br label %[[COND_END:.*]]
+// CHECK: [[COND_FALSE]]:
+// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: br label %[[COND_END]]
+// CHECK: [[COND_END]]:
+// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 99, %[[COND_TRUE]] ], [ [[TMP12]], %[[COND_FALSE]] ]
+// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND:.*]]
+// CHECK: [[OMP_INNER_FOR_COND]]:
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
+// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
+// CHECK-NEXT: br i1 [[CMP1]], label %[[OMP_INNER_FOR_BODY:.*]], label %[[OMP_INNER_FOR_END:.*]]
+// CHECK: [[OMP_INNER_FOR_BODY]]:
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[TMP18:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP19]]
+// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
+// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]]
+// CHECK-NEXT: store i32 [[ADD2]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: br label %[[OMP_BODY_CONTINUE:.*]]
+// CHECK: [[OMP_BODY_CONTINUE]]:
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_INC:.*]]
+// CHECK: [[OMP_INNER_FOR_INC]]:
+// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], 1
+// CHECK-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
+// CHECK: [[OMP_INNER_FOR_END]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]])
+// CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
+// CHECK-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
+// CHECK-NEXT: br i1 [[TMP26]], label %[[DOTOMP_FINAL_THEN:.*]], label %[[DOTOMP_FINAL_DONE:.*]]
+// CHECK: [[DOTOMP_FINAL_THEN]]:
+// CHECK-NEXT: store i32 100, ptr [[I]], align 4
+// CHECK-NEXT: br label %[[DOTOMP_FINAL_DONE]]
+// CHECK: [[DOTOMP_FINAL_DONE]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define dso_local void @test_omp_parallel_sections_copyin(
+// CHECK-SAME: ptr noundef [[A:%.*]], ptr noundef [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: store i32 4, ptr [[TMP0]], align 4
+// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @test_omp_parallel_sections_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[TMP1]])
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @test_omp_parallel_sections_copyin.omp_outlined(
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
+// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[X_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK-NEXT: [[TMP3:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
+// CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP3]] to i64
+// CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP4]], [[TMP5]]
+// CHECK-NEXT: br i1 [[TMP6]], label %[[COPYIN_NOT_MASTER:.*]], label %[[COPYIN_NOT_MASTER_END:.*]]
+// CHECK: [[COPYIN_NOT_MASTER]]:
+// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP2]], align 4
+// CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP3]], align 4
+// CHECK-NEXT: br label %[[COPYIN_NOT_MASTER_END]]
+// CHECK: [[COPYIN_NOT_MASTER_END]]:
+// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP9]])
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
+// CHECK-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_UB_]], align 4
+// CHECK-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
+// CHECK-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_IL_]], align 4
+// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB4:[0-9]+]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_SECTIONS_IL_]], ptr [[DOTOMP_SECTIONS_LB_]], ptr [[DOTOMP_SECTIONS_UB_]], ptr [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
+// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_UB_]], align 4
+// CHECK-NEXT: [[TMP13:%.*]] = icmp slt i32 [[TMP12]], 1
+// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i32 [[TMP12]], i32 1
+// CHECK-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_SECTIONS_UB_]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_LB_]], align 4
+// CHECK-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_SECTIONS_IV_]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND:.*]]
+// CHECK: [[OMP_INNER_FOR_COND]]:
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_IV_]], align 4
+// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_UB_]], align 4
+// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
+// CHECK-NEXT: br i1 [[CMP]], label %[[OMP_INNER_FOR_BODY:.*]], label %[[OMP_INNER_FOR_END:.*]]
+// CHECK: [[OMP_INNER_FOR_BODY]]:
+// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_IV_]], align 4
+// CHECK-NEXT: switch i32 [[TMP18]], label %[[DOTOMP_SECTIONS_EXIT:.*]] [
+// CHECK-NEXT: i32 0, label %[[DOTOMP_SECTIONS_CASE:.*]]
+// CHECK-NEXT: i32 1, label %[[DOTOMP_SECTIONS_CASE1:.*]]
+// CHECK-NEXT: ]
+// CHECK: [[DOTOMP_SECTIONS_CASE]]:
+// CHECK-NEXT: [[TMP19:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
+// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8
+// CHECK-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4
+// CHECK-NEXT: br label %[[DOTOMP_SECTIONS_EXIT]]
+// CHECK: [[DOTOMP_SECTIONS_CASE1]]:
+// CHECK-NEXT: [[TMP22:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
+// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP1]], align 8
+// CHECK-NEXT: store i32 [[TMP23]], ptr [[TMP24]], align 4
+// CHECK-NEXT: br label %[[DOTOMP_SECTIONS_EXIT]]
+// CHECK: [[DOTOMP_SECTIONS_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_INC:.*]]
+// CHECK: [[OMP_INNER_FOR_INC]]:
+// CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_SECTIONS_IV_]], align 4
+// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP25]], 1
+// CHECK-NEXT: store i32 [[INC]], ptr [[DOTOMP_SECTIONS_IV_]], align 4
+// CHECK-NEXT: br label %[[OMP_INNER_FOR_COND]]
+// CHECK: [[OMP_INNER_FOR_END]]:
+// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB4]], i32 [[TMP27]])
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define dso_local void @test_omp_parallel_master_copyin(
+// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: store i32 5, ptr [[TMP0]], align 4
+// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @test_omp_parallel_master_copyin.omp_outlined, ptr [[A_ADDR]], ptr [[TMP1]])
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @test_omp_parallel_master_copyin.omp_outlined(
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
+// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK-NEXT: [[TMP2:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
+// CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP2]] to i64
+// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
+// CHECK-NEXT: br i1 [[TMP5]], label %[[COPYIN_NOT_MASTER:.*]], label %[[COPYIN_NOT_MASTER_END:.*]]
+// CHECK: [[COPYIN_NOT_MASTER]]:
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
+// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4
+// CHECK-NEXT: br label %[[COPYIN_NOT_MASTER_END]]
+// CHECK: [[COPYIN_NOT_MASTER_END]]:
+// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP8]])
+// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
+// CHECK-NEXT: [[TMP11:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB3]], i32 [[TMP10]])
+// CHECK-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
+// CHECK-NEXT: br i1 [[TMP12]], label %[[OMP_IF_THEN:.*]], label %[[OMP_IF_END:.*]]
+// CHECK: [[OMP_IF_THEN]]:
+// CHECK-NEXT: store i32 0, ptr [[I]], align 4
+// CHECK-NEXT: br label %[[FOR_COND:.*]]
+// CHECK: [[FOR_COND]]:
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP13]], 100
+// CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
+// CHECK: [[FOR_BODY]]:
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP16]]
+// CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP0]], align 8
+// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
+// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 [[IDXPROM]]
+// CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX]], align 4
+// CHECK-NEXT: br label %[[FOR_INC:.*]]
+// CHECK: [[FOR_INC]]:
+// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
+// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP19]], 1
+// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
+// CHECK-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
+// CHECK: [[FOR_END]]:
+// CHECK-NEXT: call void @__kmpc_end_master(ptr @[[GLOB3]], i32 [[TMP10]])
+// CHECK-NEXT: br label %[[OMP_IF_END]]
+// CHECK: [[OMP_IF_END]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define weak_odr hidden ptr @_ZTW1x(
+// CHECK-SAME: ) #[[ATTR4:[0-9]+]] comdat {
+// CHECK-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
+// CHECK-NEXT: ret ptr [[TMP1]]
+//
+//.
+// CHECK: [[META2]] = !{}
+// CHECK: [[META3]] = !{i64 8}
+// CHECK: [[META4]] = !{i64 4}
+// CHECK: [[ACC_GRP7]] = distinct !{}
+// CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META9:![0-9]+]], [[META10:![0-9]+]]}
+// CHECK: [[META9]] = !{!"llvm.loop.parallel_accesses", [[ACC_GRP7]]}
+// CHECK: [[META10]] = !{!"llvm.loop.vectorize.enable"}
+// CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META12:![0-9]+]]}
+// CHECK: [[META12]] = !{!"llvm.loop.mustprogress"}
+//.
diff --git a/clang/test/OpenMP/parallel_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_firstprivate_codegen.cpp
index 06c33e88b495d..56290b33d5244 100644
--- a/clang/test/OpenMP/parallel_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/parallel_firstprivate_codegen.cpp
@@ -329,7 +329,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], ptr nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -719,7 +719,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], ptr nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1180,7 +1180,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i32 [[G:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i32 [[G:%.*]], i32 [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1284,7 +1284,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], ptr nonnull align 4 dereferenceable(16) [[E:%.*]]) #[[ATTR3]] {
+// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], ptr nonnull align 4 dereferenceable(16) [[E:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1386,7 +1386,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2.omp_outlined
-// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]]) #[[ATTR3]] {
+// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1509,7 +1509,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK9-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], ptr nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1899,7 +1899,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], ptr nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2360,7 +2360,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK12-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK12-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[G:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK12-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[G:%.*]], i64 [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK12-NEXT: entry:
// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2464,7 +2464,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK12-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK12-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i64 [[A:%.*]], i64 [[B:%.*]], i64 [[C:%.*]], ptr nonnull align 4 dereferenceable(16) [[E:%.*]]) #[[ATTR3]] {
+// CHECK12-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i64 [[A:%.*]], i64 [[B:%.*]], i64 [[C:%.*]], ptr nonnull align 4 dereferenceable(16) [[E:%.*]]) #[[ATTR2]] {
// CHECK12-NEXT: entry:
// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2566,7 +2566,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK12-LABEL: define {{[^@]+}}@g_block_invoke_2.omp_outlined
-// CHECK12-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i64 [[A:%.*]], i64 [[B:%.*]], i64 [[C:%.*]]) #[[ATTR3]] {
+// CHECK12-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[THIS:%.*]], i64 [[A:%.*]], i64 [[B:%.*]], i64 [[C:%.*]]) #[[ATTR2]] {
// CHECK12-NEXT: entry:
// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2635,7 +2635,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK17-LABEL: define {{[^@]+}}@_Z10array_funcPfP2StiPe.omp_outlined
-// CHECK17-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[S:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], ptr [[VLA1:%.*]], ptr [[A:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], ptr nonnull align 8 dereferenceable(8) [[VLA26:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr [[S:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], ptr [[VLA1:%.*]], ptr [[A:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[VLA26:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2725,7 +2725,7 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) {
//
//
// CHECK17-LABEL: define {{[^@]+}}@_ZN2St7St_funcEPS_iPe.omp_outlined
-// CHECK17-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[VLA:%.*]], ptr [[VLA1:%.*]], ptr [[THIS:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], ptr nonnull align 8 dereferenceable(8) [[VLA26:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr [[S:%.*]]) #[[ATTR2]] {
+// CHECK17-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[VLA:%.*]], ptr [[VLA1:%.*]], ptr [[THIS:%.*]], i64 [[VLA2:%.*]], i64 [[VLA4:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[VLA26:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr [[S:%.*]]) #[[ATTR2]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/parallel_for_codegen.cpp b/clang/test/OpenMP/parallel_for_codegen.cpp
index ccb55334ea7be..5a34827c42c88 100644
--- a/clang/test/OpenMP/parallel_for_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_codegen.cpp
@@ -381,7 +381,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -490,7 +490,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -599,7 +599,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -725,7 +725,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z8dynamic1PfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -828,7 +828,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z7guided7PfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -935,7 +935,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z9test_autoPfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1093,7 +1093,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z7runtimePfS_S_S_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1228,7 +1228,7 @@ void range_for_collapsed() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z12parallel_forPfi.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1497,7 +1497,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1606,7 +1606,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1715,7 +1715,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1841,7 +1841,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z8dynamic1PfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1944,7 +1944,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z7guided7PfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2051,7 +2051,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z9test_autoPfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2209,7 +2209,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z7runtimePfS_S_S_.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2344,7 +2344,7 @@ void range_for_collapsed() {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z12parallel_forPfi.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2613,7 +2613,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG23:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG23:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2722,7 +2722,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG33:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG33:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2831,7 +2831,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG42:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG42:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2957,7 +2957,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z8dynamic1PfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG52:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG52:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3060,7 +3060,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z7guided7PfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG64:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG64:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3167,7 +3167,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z9test_autoPfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG78:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG78:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3325,7 +3325,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z7runtimePfS_S_S_.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG93:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] !dbg [[DBG93:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3460,7 +3460,7 @@ void range_for_collapsed() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z12parallel_forPfi.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 !dbg [[DBG109:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 !dbg [[DBG109:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3729,7 +3729,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3838,7 +3838,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3947,7 +3947,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4073,7 +4073,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z8dynamic1PfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4176,7 +4176,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z7guided7PfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4283,7 +4283,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z9test_autoPfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[Y:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4441,7 +4441,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z7runtimePfS_S_S_.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4576,7 +4576,7 @@ void range_for_collapsed() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z12parallel_forPfi.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4810,7 +4810,7 @@ void range_for_collapsed() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_Z16range_for_singlev.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[ARR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(40) [[ARR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4932,7 +4932,7 @@ void range_for_collapsed() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_Z19range_for_collapsedv.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[ARR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(40) [[ARR:%.*]]) #[[ATTR4]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/parallel_for_lastprivate_conditional.cpp b/clang/test/OpenMP/parallel_for_lastprivate_conditional.cpp
index 911937d9a1f0a..1b8ffef1fc1a2 100644
--- a/clang/test/OpenMP/parallel_for_lastprivate_conditional.cpp
+++ b/clang/test/OpenMP/parallel_for_lastprivate_conditional.cpp
@@ -45,7 +45,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -61,7 +61,7 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
// CHECK1-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
@@ -191,7 +191,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -203,8 +203,8 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: store i32 0, ptr [[A1]], align 4
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[A1]], align 4
@@ -255,7 +255,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.omp_outlined.1
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -265,8 +265,8 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK1-NEXT: [[TMP3:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP2]] monotonic, align 4
// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], ptr [[TMP0]], i32 0, i32 1
diff --git a/clang/test/OpenMP/parallel_for_linear_codegen.cpp b/clang/test/OpenMP/parallel_for_linear_codegen.cpp
index 3d46a65db3c4f..8c017f5a4b2c7 100644
--- a/clang/test/OpenMP/parallel_for_linear_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_linear_codegen.cpp
@@ -117,7 +117,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -138,8 +138,8 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTLINEAR_START]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP1]], align 8
@@ -266,7 +266,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -287,8 +287,8 @@ int main() {
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META7:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META6:![0-9]+]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTLINEAR_START]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4
@@ -438,7 +438,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -456,7 +456,7 @@ int main() {
// CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK4-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 4
// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
diff --git a/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
index 10490e3bf42bd..b84e15adc40eb 100644
--- a/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
@@ -48,7 +48,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/parallel_for_simd_aligned_codegen.cpp b/clang/test/OpenMP/parallel_for_simd_aligned_codegen.cpp
index 385efb689c652..fac7a89109dfb 100644
--- a/clang/test/OpenMP/parallel_for_simd_aligned_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_simd_aligned_codegen.cpp
@@ -31,7 +31,7 @@ void foo(float *c) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z3fooPf.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -46,7 +46,7 @@ void foo(float *c) {
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
// CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP1]], i64 16) ]
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
@@ -71,23 +71,23 @@ void foo(float *c) {
// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK1: omp.inner.for.cond:
-// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
+// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK1: omp.inner.for.body:
-// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
+// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK1: omp.body.continue:
// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK1: omp.inner.for.inc:
-// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
+// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
-// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
+// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
+// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
// CHECK1: omp.inner.for.end:
// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
// CHECK1: omp.loop.exit:
diff --git a/clang/test/OpenMP/parallel_generic_loop_codegen.cpp b/clang/test/OpenMP/parallel_generic_loop_codegen.cpp
index ce9aa5d28e5ba..fb92f6c16fe17 100644
--- a/clang/test/OpenMP/parallel_generic_loop_codegen.cpp
+++ b/clang/test/OpenMP/parallel_generic_loop_codegen.cpp
@@ -47,7 +47,7 @@ int foo() {
//
//
// IR-LABEL: define {{[^@]+}}@_Z3foov.omp_outlined
-// IR-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
+// IR-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
// IR-NEXT: entry:
// IR-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// IR-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -64,7 +64,7 @@ int foo() {
// IR-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// IR-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// IR-NEXT: store ptr [[RESULT]], ptr [[RESULT_ADDR]], align 8
-// IR-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// IR-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// IR-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
// IR-NEXT: store i32 4095, ptr [[DOTOMP_UB]], align 4
// IR-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
@@ -147,7 +147,7 @@ int foo() {
//
//
// IR-OMP60-LABEL: define {{[^@]+}}@_Z3foov.omp_outlined
-// IR-OMP60-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
+// IR-OMP60-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
// IR-OMP60-NEXT: entry:
// IR-OMP60-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// IR-OMP60-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -164,7 +164,7 @@ int foo() {
// IR-OMP60-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// IR-OMP60-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// IR-OMP60-NEXT: store ptr [[RESULT]], ptr [[RESULT_ADDR]], align 8
-// IR-OMP60-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// IR-OMP60-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// IR-OMP60-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
// IR-OMP60-NEXT: store i32 4095, ptr [[DOTOMP_UB]], align 4
// IR-OMP60-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
@@ -247,7 +247,7 @@ int foo() {
//
//
// IR-PCH-LABEL: define {{[^@]+}}@_Z3foov.omp_outlined
-// IR-PCH-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
+// IR-PCH-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
// IR-PCH-NEXT: entry:
// IR-PCH-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// IR-PCH-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -264,7 +264,7 @@ int foo() {
// IR-PCH-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// IR-PCH-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// IR-PCH-NEXT: store ptr [[RESULT]], ptr [[RESULT_ADDR]], align 8
-// IR-PCH-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// IR-PCH-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// IR-PCH-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
// IR-PCH-NEXT: store i32 4095, ptr [[DOTOMP_UB]], align 4
// IR-PCH-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
@@ -347,7 +347,7 @@ int foo() {
//
//
// IR-PCH-OMP60-LABEL: define {{[^@]+}}@_Z3foov.omp_outlined
-// IR-PCH-OMP60-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
+// IR-PCH-OMP60-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
// IR-PCH-OMP60-NEXT: entry:
// IR-PCH-OMP60-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// IR-PCH-OMP60-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -364,7 +364,7 @@ int foo() {
// IR-PCH-OMP60-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// IR-PCH-OMP60-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// IR-PCH-OMP60-NEXT: store ptr [[RESULT]], ptr [[RESULT_ADDR]], align 8
-// IR-PCH-OMP60-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// IR-PCH-OMP60-NEXT: [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// IR-PCH-OMP60-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
// IR-PCH-OMP60-NEXT: store i32 4095, ptr [[DOTOMP_UB]], align 4
// IR-PCH-OMP60-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
diff --git a/clang/test/OpenMP/parallel_master_codegen.cpp b/clang/test/OpenMP/parallel_master_codegen.cpp
index 65bc0d9156e0e..43bfc2da63733 100644
--- a/clang/test/OpenMP/parallel_master_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_codegen.cpp
@@ -374,7 +374,7 @@ void parallel_master_allocate() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -382,7 +382,7 @@ void parallel_master_allocate() {
// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])
@@ -463,7 +463,7 @@ void parallel_master_allocate() {
//
//
// CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i64 noundef [[Y:%.*]], i64 noundef [[Y1:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i64 noundef [[Y:%.*]], i64 noundef [[Y1:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -476,7 +476,7 @@ void parallel_master_allocate() {
// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK17-NEXT: store i64 [[Y]], ptr [[Y_ADDR]], align 8
// CHECK17-NEXT: store i64 [[Y1]], ptr [[Y_ADDR2]], align 8
-// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[A3]], ptr align 4 [[TMP0]], i64 8, i1 false)
// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
@@ -622,7 +622,7 @@ void parallel_master_allocate() {
//
//
// CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv.omp_outlined
-// CHECK29-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK29-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK29-NEXT: entry:
// CHECK29-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK29-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -630,7 +630,7 @@ void parallel_master_allocate() {
// CHECK29-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK29-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK29-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK29-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK29-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK29-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)
// CHECK29-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64
// CHECK29-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
diff --git a/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
index 32165cb557fa1..5b6914f158808 100644
--- a/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
@@ -48,7 +48,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
index 3c20989718d77..56e96023d48b0 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
@@ -192,39 +192,39 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK1: .omp_outlined..exit:
// CHECK1-NEXT: ret i32 0
@@ -303,46 +303,46 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META28:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META28]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META28]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META28]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META27:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META27]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META27]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META27]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META27]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META27]]
// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META28]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META27]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__2_EXIT:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META28]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META27]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META27]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META27]]
// CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]
+// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META27]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK1: .omp_outlined..2.exit:
// CHECK1-NEXT: ret i32 0
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.4
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -363,8 +363,8 @@ struct S {
// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META28:![0-9]+]], !align [[META29:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META28]], !align [[META30:![0-9]+]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])
@@ -476,99 +476,99 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META40:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META42:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
-// CHECK1-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP18]], align 8
+// CHECK1-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2:%.*]], ptr [[TMP18]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8
+// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META28]], !align [[META30]]
// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8
-// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP18]], align 8
+// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
// CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP27]] to i64
// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds ptr, ptr [[TMP25]], i64 [[IDXPROM_I]]
// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[ARRAYIDX_I]], align 8
-// CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP18]], align 8
+// CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4
// CHECK1-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP30]] to i64
// CHECK1-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, ptr [[TMP28]], i64 [[IDXPROM4_I]]
// CHECK1-NEXT: [[TMP31:%.*]] = load i8, ptr [[ARRAYIDX5_I]], align 1
// CHECK1-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP31]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64
-// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP33]], [[TMP34]]
// CHECK1-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1
// CHECK1-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64
// CHECK1-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]]
// CHECK1-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1
-// CHECK1-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: store i32 [[TMP35]], ptr [[J_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: store i32 [[TMP35]], ptr [[J_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP36]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK1: land.lhs.true.i:
-// CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]]
// CHECK1-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK1: taskloop.if.then.i:
-// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: store i64 [[TMP39]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP40:%.*]] = load ptr, ptr [[TMP18]], align 8
+// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: store i64 [[TMP39]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP40:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP18]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP42:%.*]] = load ptr, ptr [[TMP41]], align 8
+// CHECK1-NEXT: [[TMP42:%.*]] = load ptr, ptr [[TMP41]], align 8, !nonnull [[META28]], !align [[META30]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META40]]
+// CHECK1-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META42]]
// CHECK1-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP43]], [[TMP44]]
// CHECK1-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP45:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: [[TMP45:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP46]], [[TMP47]]
// CHECK1-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1
// CHECK1-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64
// CHECK1-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP45]], [[CONV22_I]]
// CHECK1-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32
-// CHECK1-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP48]] to i64
-// CHECK1-NEXT: [[TMP49:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP50:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: [[TMP49:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP50:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP51]], [[TMP52]]
// CHECK1-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1
// CHECK1-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64
// CHECK1-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP50]], [[CONV33_I]]
-// CHECK1-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]
+// CHECK1-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META42]]
// CHECK1-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP53]], [[TMP54]]
// CHECK1-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1
// CHECK1-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64
@@ -576,10 +576,10 @@ struct S {
// CHECK1-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP49]], [[MUL41_I]]
// CHECK1-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]]
// CHECK1-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32
-// CHECK1-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META40]]
-// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
+// CHECK1-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META42]]
+// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
// CHECK1-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP55]], 1
-// CHECK1-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]
+// CHECK1-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META42]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK1: omp.inner.for.end.i:
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
@@ -659,61 +659,61 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META46:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META52:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META52]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META52]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META52]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META54]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META54]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META52]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META54]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META52]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META54]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META54]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: [[TMP24:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB1]], i32 [[TMP23]], i32 4)
// CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
// CHECK1-NEXT: br i1 [[TMP25]], label [[DOTCANCEL_EXIT_I:%.*]], label [[DOTCANCEL_CONTINUE_I:%.*]]
// CHECK1: .cancel.exit.i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__8_EXIT:%.*]]
// CHECK1: .cancel.continue.i:
-// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__kmpc_cancellationpoint(ptr @[[GLOB1]], i32 [[TMP26]], i32 4)
// CHECK1-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
// CHECK1-NEXT: br i1 [[TMP28]], label [[DOTCANCEL_EXIT2_I:%.*]], label [[DOTCANCEL_CONTINUE3_I:%.*]]
// CHECK1: .cancel.exit2.i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__8_EXIT]]
// CHECK1: .cancel.continue3.i:
-// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP29]], 1
-// CHECK1-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK1: omp.inner.for.end.i:
-// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__8_EXIT]]
// CHECK1: .omp_outlined..8.exit:
-// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]
+// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -761,7 +761,7 @@ struct S {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ei.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -779,7 +779,7 @@ struct S {
// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])
@@ -870,59 +870,59 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META53:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META64]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META66:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META66]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META66]]
// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
-// CHECK1-NEXT: store ptr [[TMP_I]], ptr [[TMP1_I]], align 8, !noalias [[META64]]
+// CHECK1-NEXT: store ptr [[TMP_I]], ptr [[TMP1_I]], align 8, !noalias [[META66]]
// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_6:%.*]], ptr [[TMP18]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META64]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META64]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META66]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META66]]
// CHECK1-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP23]], 1
-// CHECK1-NEXT: store i32 [[SUB3_I]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META64]]
-// CHECK1-NEXT: store ptr [[A_I]], ptr [[TMP4_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META64]]
+// CHECK1-NEXT: store i32 [[SUB3_I]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META66]]
+// CHECK1-NEXT: store ptr [[A_I]], ptr [[TMP4_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META66]], !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: store i32 0, ptr [[TMP24]], align 4
-// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META64]]
+// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META66]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP25]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__10_EXIT:%.*]]
// CHECK1: taskloop.if.then.i:
-// CHECK1-NEXT: store ptr [[A5_I]], ptr [[TMP6_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META64]]
+// CHECK1-NEXT: store ptr [[A5_I]], ptr [[TMP6_I]], align 8, !noalias [[META66]]
+// CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META66]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META66]]
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_6]], ptr [[TMP18]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]
+// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META66]]
// CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP29]] to i64
-// CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META64]]
+// CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META66]]
// CHECK1-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP30]]
// CHECK1-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]
-// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META64]]
+// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META66]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META66]], !nonnull [[META28]], !align [[META29]]
// CHECK1-NEXT: store i32 [[TMP31]], ptr [[TMP32]], align 4
-// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]
+// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META66]]
// CHECK1-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP33]], 1
-// CHECK1-NEXT: store i32 [[ADD9_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]
+// CHECK1-NEXT: store i32 [[ADD9_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META66]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK1: omp.inner.for.end.i:
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__10_EXIT]]
diff --git a/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
index 8d747fbb8eaaf..36b4c55dbef59 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
@@ -273,7 +273,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// CHECK-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -289,9 +289,9 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
-// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -428,51 +428,51 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]]) #[[ATTR4]]
-// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]]) #[[ATTR4]], !inline_history [[META17:![0-9]+]]
+// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
-// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK: omp.inner.for.cond.i:
-// CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP28]] to i64
-// CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP29]]
// CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK: omp.inner.for.body.i:
-// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
-// CHECK-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META17]]
+// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META16]]
// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP23]], align 4
// CHECK-NEXT: store i32 [[TMP31]], ptr [[TMP25]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP24]], ptr align 8 [[TMP22]], i64 8, i1 false)
// CHECK-NEXT: store i32 33, ptr [[TMP26]], align 4
-// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP32]], 1
-// CHECK-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK: .omp_outlined..exit:
// CHECK-NEXT: ret i32 0
@@ -495,7 +495,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP8]], i32 0, i32 0
// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP7]], i32 0, i32 0
-// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i32 0, i32 0
// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]
@@ -511,7 +511,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK: omp.arraycpy.done3:
// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP8]], i32 0, i32 1
// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP7]], i32 0, i32 1
-// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TMP13]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP15]], double noundef 0.000000e+00)
// CHECK-NEXT: ret void
//
@@ -616,7 +616,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
// CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
@@ -688,7 +688,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -704,9 +704,9 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -853,7 +853,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META31]]
// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR4]]
+// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR4]], !inline_history [[META32:![0-9]+]]
// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META31]]
// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META31]]
// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META31]]
@@ -899,7 +899,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], ptr [[TMP3]], i32 0, i32 2
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_2:%.*]], ptr [[TMP8]], i32 0, i32 2
// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1:%.*]], ptr [[TMP7]], i32 0, i32 0
-// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0:%.*]]], ptr [[TMP9]], i32 0, i32 0
// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]
@@ -915,7 +915,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK: omp.arraycpy.done3:
// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_2]], ptr [[TMP8]], i32 0, i32 3
// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP7]], i32 0, i32 1
-// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]], i32 noundef 0)
// CHECK-NEXT: ret void
//
@@ -979,7 +979,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
@@ -1080,50 +1080,50 @@ void array_func(int n, float a[n], St s[2]) {
// LAMBDA-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// LAMBDA-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// LAMBDA-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// LAMBDA-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// LAMBDA-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]]
-// LAMBDA-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// LAMBDA-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// LAMBDA-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META17:![0-9]+]]
+// LAMBDA-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// LAMBDA-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
-// LAMBDA-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// LAMBDA-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// LAMBDA: omp.inner.for.cond.i:
-// LAMBDA-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// LAMBDA-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// LAMBDA-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i64
-// LAMBDA-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
+// LAMBDA-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
// LAMBDA-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]
// LAMBDA-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// LAMBDA: omp.inner.for.body.i:
-// LAMBDA-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
-// LAMBDA-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META17]]
+// LAMBDA-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// LAMBDA-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META16]]
// LAMBDA-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 8
// LAMBDA-NEXT: store i32 11, ptr [[TMP23]], align 4
-// LAMBDA-NEXT: store ptr [[TMP22]], ptr [[REF_TMP_I]], align 8, !noalias [[META17]]
+// LAMBDA-NEXT: store ptr [[TMP22]], ptr [[REF_TMP_I]], align 8, !noalias [[META16]]
// LAMBDA-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP_I]], i32 0, i32 1
-// LAMBDA-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8, !noalias [[META17]]
+// LAMBDA-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8, !noalias [[META16]]
// LAMBDA-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]])
-// LAMBDA-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// LAMBDA-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// LAMBDA-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 1
-// LAMBDA-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// LAMBDA-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// LAMBDA: .omp_outlined..exit:
// LAMBDA-NEXT: ret i32 0
@@ -1151,7 +1151,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// BLOCKS-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// BLOCKS-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
+// BLOCKS-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
// BLOCKS-NEXT: entry:
// BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// BLOCKS-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1207,7 +1207,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// BLOCKS-LABEL: define {{[^@]+}}@.omp_task_privates_map.
-// BLOCKS-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR6:[0-9]+]] {
+// BLOCKS-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR5:[0-9]+]] {
// BLOCKS-NEXT: entry:
// BLOCKS-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// BLOCKS-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1226,7 +1226,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// BLOCKS-LABEL: define {{[^@]+}}@.omp_task_entry.
-// BLOCKS-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
+// BLOCKS-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
// BLOCKS-NEXT: entry:
// BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
// BLOCKS-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
@@ -1265,64 +1265,64 @@ void array_func(int n, float a[n], St s[2]) {
// BLOCKS-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// BLOCKS-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// BLOCKS-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// BLOCKS-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// BLOCKS-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR4:[0-9]+]]
-// BLOCKS-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// BLOCKS-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// BLOCKS-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META14:![0-9]+]]
+// BLOCKS-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
-// BLOCKS-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// BLOCKS: omp.inner.for.cond.i:
-// BLOCKS-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i64
-// BLOCKS-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]
// BLOCKS-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// BLOCKS: omp.inner.for.body.i:
-// BLOCKS-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// BLOCKS-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// BLOCKS-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 8
// BLOCKS-NEXT: store i32 11, ptr [[TMP23]], align 4
-// BLOCKS-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 1
-// BLOCKS-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 2
-// BLOCKS-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 3
-// BLOCKS-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 4
-// BLOCKS-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 5
// BLOCKS-NEXT: [[TMP28:%.*]] = load volatile double, ptr [[TMP22]], align 8
-// BLOCKS-NEXT: store volatile double [[TMP28]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: store volatile double [[TMP28]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 6
// BLOCKS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 4
-// BLOCKS-NEXT: store i32 [[TMP29]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: store i32 [[TMP29]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK_I]], i32 0, i32 3
-// BLOCKS-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: call void [[TMP31]](ptr noundef [[BLOCK_I]]) #[[ATTR4]]
-// BLOCKS-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: call void [[TMP31]](ptr noundef [[BLOCK_I]]) #[[ATTR3]], !inline_history [[META14]]
+// BLOCKS-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP32]], 1
-// BLOCKS-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// BLOCKS: .omp_outlined..exit:
// BLOCKS-NEXT: ret i32 0
@@ -1457,45 +1457,45 @@ void array_func(int n, float a[n], St s[2]) {
// ARRAY-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// ARRAY-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// ARRAY-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// ARRAY-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// ARRAY-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// ARRAY-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// ARRAY-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
// ARRAY-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP19]], align 8
-// ARRAY-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]]
-// ARRAY-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// ARRAY-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]], !inline_history [[META14:![0-9]+]]
+// ARRAY-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// ARRAY-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP25]] to i32
-// ARRAY-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// ARRAY-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// ARRAY: omp.inner.for.cond.i:
-// ARRAY-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// ARRAY-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// ARRAY-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP26]] to i64
-// ARRAY-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// ARRAY-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// ARRAY-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP27]]
// ARRAY-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// ARRAY: omp.inner.for.body.i:
-// ARRAY-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// ARRAY-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// ARRAY-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// ARRAY-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// ARRAY-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 1
-// ARRAY-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// ARRAY-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// ARRAY: .omp_outlined..exit:
// ARRAY-NEXT: ret i32 0
@@ -1539,7 +1539,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// SIMD-ONLY0: for.end:
// SIMD-ONLY0-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
// SIMD-ONLY0-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
@@ -1635,7 +1635,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
+// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
// SIMD-ONLY0: for.end:
// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
// SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR]]) #[[ATTR3]]
@@ -1696,7 +1696,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]
+// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
// SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
@@ -1790,7 +1790,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META5]], !align [[META7:![0-9]+]]
+// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META4]], !align [[META6:![0-9]+]]
// SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
@@ -1860,7 +1860,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// SIMD-ONLY1-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// SIMD-ONLY1: for.end:
// SIMD-ONLY1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
// SIMD-ONLY1-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
@@ -1956,7 +1956,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// SIMD-ONLY1-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
+// SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
// SIMD-ONLY1: for.end:
// SIMD-ONLY1-NEXT: store i32 0, ptr [[RETVAL]], align 4
// SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR]]) #[[ATTR3]]
@@ -2017,7 +2017,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]
+// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
// SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
@@ -2111,7 +2111,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META5]], !align [[META7:![0-9]+]]
+// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META4]], !align [[META6:![0-9]+]]
// SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
@@ -2205,7 +2205,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY3-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1
// SIMD-ONLY3-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// SIMD-ONLY3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// SIMD-ONLY3: for.end:
// SIMD-ONLY3-NEXT: ret void
//
@@ -2248,7 +2248,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY4-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1
// SIMD-ONLY4-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// SIMD-ONLY4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// SIMD-ONLY4: for.end:
// SIMD-ONLY4-NEXT: ret void
//
diff --git a/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
index 699f9d7109872..1c5c4dae90266 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
@@ -260,7 +260,7 @@ void loop() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -276,10 +276,10 @@ void loop() {
// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP5]])
@@ -411,67 +411,67 @@ void loop() {
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]], ptr [[DOTLASTPRIV_PTR_ADDR4_I]]) #[[ATTR4]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]], ptr [[DOTLASTPRIV_PTR_ADDR4_I]]) #[[ATTR4]], !inline_history [[META17:![0-9]+]]
// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8, !nonnull [[META3]], !align [[META5]]
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 4
-// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP38:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP39:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP38:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP39:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP40]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP41]] to i64
-// CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP42]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
-// CHECK1-NEXT: store i32 [[TMP43]], ptr [[I_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK1-NEXT: store i32 [[TMP43]], ptr [[I_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP36]], align 4
// CHECK1-NEXT: store i32 [[TMP44]], ptr [[TMP38]], align 4
// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP37]], ptr align 8 [[TMP35]], i64 8, i1 false)
// CHECK1-NEXT: store i32 33, ptr [[TMP39]], align 4
-// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP45]], 1
-// CHECK1-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK1: omp.inner.for.end.i:
-// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0
// CHECK1-NEXT: br i1 [[TMP47]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK1: .omp.lastprivate.then.i:
@@ -660,7 +660,7 @@ void loop() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -676,10 +676,10 @@ void loop() {
// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP5]])
@@ -822,18 +822,18 @@ void loop() {
// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META31]]
// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]]) #[[ATTR4]]
+// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]]) #[[ATTR4]], !inline_history [[META32:![0-9]+]]
// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META31]]
// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META31]]
// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META31]]
@@ -1054,56 +1054,56 @@ void loop() {
// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]]
-// CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META17:![0-9]+]]
+// CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
-// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
-// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK3: omp.inner.for.cond.i:
-// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP28]] to i64
-// CHECK3-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP29]]
// CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK3: omp.inner.for.body.i:
-// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
-// CHECK3-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK3-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: store double 1.000000e+00, ptr [[TMP25]], align 8
// CHECK3-NEXT: store i32 11, ptr [[TMP26]], align 4
-// CHECK3-NEXT: store ptr [[TMP25]], ptr [[REF_TMP_I]], align 8, !noalias [[META17]]
+// CHECK3-NEXT: store ptr [[TMP25]], ptr [[REF_TMP_I]], align 8, !noalias [[META16]]
// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP_I]], i32 0, i32 1
-// CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP31]], align 8, !noalias [[META17]]
+// CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP31]], align 8, !noalias [[META16]]
// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]])
-// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP32]], 1
-// CHECK3-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK3: omp.inner.for.end.i:
-// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
// CHECK3-NEXT: br i1 [[TMP34]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK3: .omp.lastprivate.then.i:
@@ -1156,7 +1156,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1213,7 +1213,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_privates_map.
-// CHECK4-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1232,7 +1232,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry.
-// CHECK4-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK4-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
// CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
@@ -1271,70 +1271,70 @@ void loop() {
// CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR4:[0-9]+]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META14:![0-9]+]]
// CHECK4-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META15:![0-9]+]], !align [[META16:![0-9]+]]
// CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1
// CHECK4-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META15]], !align [[META17:![0-9]+]]
-// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
-// CHECK4-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK4: omp.inner.for.cond.i:
-// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP28]] to i64
-// CHECK4-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP29]]
// CHECK4-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK4: omp.inner.for.body.i:
-// CHECK4-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK4-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK4-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: store double 1.000000e+00, ptr [[TMP25]], align 8
// CHECK4-NEXT: store i32 11, ptr [[TMP26]], align 4
-// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 1
-// CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 2
-// CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 3
-// CHECK4-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 4
-// CHECK4-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 5
// CHECK4-NEXT: [[TMP31:%.*]] = load volatile double, ptr [[TMP25]], align 8
-// CHECK4-NEXT: store volatile double [[TMP31]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: store volatile double [[TMP31]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 6
// CHECK4-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP26]], align 4
-// CHECK4-NEXT: store i32 [[TMP32]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: store i32 [[TMP32]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK_I]], i32 0, i32 3
-// CHECK4-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: call void [[TMP34]](ptr noundef [[BLOCK_I]]) #[[ATTR4]]
-// CHECK4-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: call void [[TMP34]](ptr noundef [[BLOCK_I]]) #[[ATTR3]], !inline_history [[META14]]
+// CHECK4-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP35]], 1
-// CHECK4-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK4: omp.inner.for.end.i:
-// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK4-NEXT: br i1 [[TMP37]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK4: .omp.lastprivate.then.i:
@@ -1348,7 +1348,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_dup.
-// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR7]] {
+// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR6]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1381,7 +1381,7 @@ void loop() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[S:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1396,8 +1396,8 @@ void loop() {
// CHECK5-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK5-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
// CHECK5-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK5-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -1492,52 +1492,52 @@ void loop() {
// CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK5-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
-// CHECK5-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
-// CHECK5-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META4:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
+// CHECK5-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META15:![0-9]+]]
+// CHECK5-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
// CHECK5-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP19]], align 8
-// CHECK5-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]]
+// CHECK5-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]], !inline_history [[META16:![0-9]+]]
// CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK5-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
// CHECK5-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32
-// CHECK5-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK5: omp.inner.for.cond.i:
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP30]] to i64
-// CHECK5-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]]
// CHECK5-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP31]]
// CHECK5-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK5: omp.inner.for.body.i:
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
-// CHECK5-NEXT: store i32 [[TMP32]], ptr [[I_I]], align 4, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
+// CHECK5-NEXT: store i32 [[TMP32]], ptr [[I_I]], align 4, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP33]], 1
-// CHECK5-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK5: omp.inner.for.end.i:
-// CHECK5-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
// CHECK5-NEXT: br i1 [[TMP35]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK5: .omp.lastprivate.then.i:
@@ -1577,7 +1577,7 @@ void loop() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z4loopv.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1587,7 +1587,7 @@ void loop() {
// CHECK6-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK6-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK6-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// CHECK6-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK6-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK6-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK6-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK6-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])
@@ -1672,52 +1672,52 @@ void loop() {
// CHECK6-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK6-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK6-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2:[0-9]+]]
-// CHECK6-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK6-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META4:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META15:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2:[0-9]+]], !inline_history [[META16:![0-9]+]]
+// CHECK6-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK6-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
// CHECK6-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
-// CHECK6-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK6: omp.inner.for.cond.i:
-// CHECK6-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP25]] to i64
-// CHECK6-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK6-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]]
// CHECK6-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP26]]
// CHECK6-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK6: omp.inner.for.body.i:
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
-// CHECK6-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
+// CHECK6-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP28]], 1
-// CHECK6-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I]]
// CHECK6: omp.inner.for.end.i:
-// CHECK6-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
// CHECK6-NEXT: br i1 [[TMP30]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK6: .omp.lastprivate.then.i:
-// CHECK6-NEXT: store i32 10, ptr [[I_I]], align 4, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP31:%.*]] = load i32, ptr [[I_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: store i32 10, ptr [[I_I]], align 4, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP31:%.*]] = load i32, ptr [[I_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: store i32 [[TMP31]], ptr [[TMP22]], align 4
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__EXIT]]
// CHECK6: .omp_outlined..exit:
diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
index 811abd68fb81c..a0da0f9704f9a 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
@@ -194,40 +194,40 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]]
+// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP14:![0-9]+]]
// CHECK1: .omp_outlined..exit:
// CHECK1-NEXT: ret i32 0
//
@@ -305,46 +305,46 @@ struct S {
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META31:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META31]]
-// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META31]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META30:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META30]]
+// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META30]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META30]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32:![0-9]+]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31:![0-9]+]]
// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__2_EXIT:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
// CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]]
+// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP32:![0-9]+]]
// CHECK1: .omp_outlined..2.exit:
// CHECK1-NEXT: ret i32 0
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.4
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -367,9 +367,9 @@ struct S {
// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META36:![0-9]+]], !align [[META37:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META36]], !align [[META37]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META36]], !align [[META38:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META35:![0-9]+]], !align [[META36:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META35]], !align [[META36]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META35]], !align [[META37:![0-9]+]]
// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -500,109 +500,109 @@ struct S {
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META46:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META50:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]]
-// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META36]], !align [[META37]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META50]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META49:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]], !inline_history [[META50:![0-9]+]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META35]], !align [[META36]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META49]]
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
-// CHECK1-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
-// CHECK1-NEXT: store i32 [[TMP29]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: store i32 [[TMP29]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !nonnull [[META36]], !align [[META38]]
+// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !nonnull [[META35]], !align [[META37]]
// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8
// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
// CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP35]] to i64
// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds ptr, ptr [[TMP32]], i64 [[IDXPROM_I]]
// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[ARRAYIDX_I]], align 8
// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP37]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP37]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4
// CHECK1-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP39]] to i64
// CHECK1-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, ptr [[TMP36]], i64 [[IDXPROM4_I]]
// CHECK1-NEXT: [[TMP40:%.*]] = load i8, ptr [[ARRAYIDX5_I]], align 1
// CHECK1-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP40]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP41]] to i64
-// CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP42]], [[TMP43]]
// CHECK1-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1
// CHECK1-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64
// CHECK1-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]]
// CHECK1-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1
-// CHECK1-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: store i32 [[TMP44]], ptr [[J_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: store i32 [[TMP44]], ptr [[J_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP45]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]]
// CHECK1: land.lhs.true.i:
-// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
-// CHECK1-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
+// CHECK1-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP46]], [[TMP47]]
// CHECK1-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]]
// CHECK1: taskloop.if.then.i:
-// CHECK1-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK1-NEXT: store i64 [[TMP48]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
+// CHECK1-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK1-NEXT: store i64 [[TMP48]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META36]], !align [[META38]]
+// CHECK1-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META35]], !align [[META37]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51:![0-9]+]]
-// CHECK1-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51:![0-9]+]]
+// CHECK1-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP53]], [[TMP54]]
// CHECK1-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP56]], [[TMP57]]
// CHECK1-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1
// CHECK1-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64
// CHECK1-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP55]], [[CONV22_I]]
// CHECK1-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32
-// CHECK1-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP58]] to i64
-// CHECK1-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP62:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP62:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP61]], [[TMP62]]
// CHECK1-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1
// CHECK1-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64
// CHECK1-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP60]], [[CONV33_I]]
-// CHECK1-NEXT: [[TMP63:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP64:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP63:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP64:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP63]], [[TMP64]]
// CHECK1-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1
// CHECK1-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64
@@ -610,15 +610,15 @@ struct S {
// CHECK1-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP59]], [[MUL41_I]]
// CHECK1-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]]
// CHECK1-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32
-// CHECK1-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK1-NEXT: [[TMP65:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: [[TMP65:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP65]], 1
-// CHECK1-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK1-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP52:![0-9]+]]
// CHECK1: omp.inner.for.end.i:
// CHECK1-NEXT: br label [[TASKLOOP_IF_END_I]]
// CHECK1: taskloop.if.end.i:
-// CHECK1-NEXT: [[TMP66:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META50]]
+// CHECK1-NEXT: [[TMP66:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META49]]
// CHECK1-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
// CHECK1-NEXT: br i1 [[TMP67]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK1: .omp.lastprivate.then.i:
@@ -689,7 +689,7 @@ struct S {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ei.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -707,7 +707,7 @@ struct S {
// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])
@@ -818,14 +818,14 @@ struct S {
// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
// CHECK1-NEXT: store ptr [[TMP_I]], ptr [[TMP1_I]], align 8, !noalias [[META65]]
// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_4:%.*]], ptr [[TMP18]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META65]]
// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META65]]
// CHECK1-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP23]], 1
// CHECK1-NEXT: store i32 [[SUB3_I]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META65]]
// CHECK1-NEXT: store ptr [[A_I]], ptr [[TMP4_I]], align 8, !noalias [[META65]]
-// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META65]], !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META65]], !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: store i32 0, ptr [[TMP24]], align 4
// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META65]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP25]]
@@ -836,7 +836,7 @@ struct S {
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32
// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]]
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_4]], ptr [[TMP18]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]], !llvm.access.group [[ACC_GRP66:![0-9]+]]
@@ -846,7 +846,7 @@ struct S {
// CHECK1-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]], !llvm.access.group [[ACC_GRP66]]
-// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META65]], !nonnull [[META36]], !align [[META37]], !llvm.access.group [[ACC_GRP66]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META65]], !nonnull [[META35]], !align [[META36]], !llvm.access.group [[ACC_GRP66]]
// CHECK1-NEXT: store i32 [[TMP31]], ptr [[TMP32]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]], !llvm.access.group [[ACC_GRP66]]
// CHECK1-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP33]], 1
@@ -1006,40 +1006,40 @@ struct S {
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK2-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// CHECK2-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// CHECK2-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK2: omp.inner.for.cond.i:
-// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK2-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK2-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK2-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK2: omp.inner.for.body.i:
-// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK2-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META14]]
-// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK2-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META13]]
+// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK2-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK2-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]]
+// CHECK2-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP14:![0-9]+]]
// CHECK2: .omp_outlined..exit:
// CHECK2-NEXT: ret i32 0
//
@@ -1117,46 +1117,46 @@ struct S {
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK2-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META31:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META31]]
-// CHECK2-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
-// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META31]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META30:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META30]]
+// CHECK2-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META30]]
+// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META30]]
// CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]]
+// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]]
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK2: omp.inner.for.cond.i:
-// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32:![0-9]+]]
+// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31:![0-9]+]]
// CHECK2-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
+// CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
// CHECK2-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK2-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__2_EXIT:%.*]]
// CHECK2: omp.inner.for.body.i:
-// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK2-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
+// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK2-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
// CHECK2-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK2-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]]
+// CHECK2-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP32:![0-9]+]]
// CHECK2: .omp_outlined..2.exit:
// CHECK2-NEXT: ret i32 0
//
//
// CHECK2-LABEL: define {{[^@]+}}@main.omp_outlined.4
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1179,9 +1179,9 @@ struct S {
// CHECK2-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
// CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
-// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META36:![0-9]+]], !align [[META37:![0-9]+]]
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META36]], !align [[META37]]
-// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META36]], !align [[META38:![0-9]+]]
+// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META35:![0-9]+]], !align [[META36:![0-9]+]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META35]], !align [[META36]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META35]], !align [[META37:![0-9]+]]
// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -1312,109 +1312,109 @@ struct S {
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK2-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META46:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META50:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]]
-// CHECK2-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META36]], !align [[META37]]
-// CHECK2-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META50]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META49:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]], !inline_history [[META50:![0-9]+]]
+// CHECK2-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META35]], !align [[META36]]
+// CHECK2-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META49]]
// CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
-// CHECK2-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
-// CHECK2-NEXT: store i32 [[TMP29]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: store i32 [[TMP29]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 2
-// CHECK2-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !nonnull [[META36]], !align [[META38]]
+// CHECK2-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !nonnull [[META35]], !align [[META37]]
// CHECK2-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8
// CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
// CHECK2-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP35]] to i64
// CHECK2-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds ptr, ptr [[TMP32]], i64 [[IDXPROM_I]]
// CHECK2-NEXT: [[TMP36:%.*]] = load ptr, ptr [[ARRAYIDX_I]], align 8
// CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP37]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP37]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4
// CHECK2-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP39]] to i64
// CHECK2-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, ptr [[TMP36]], i64 [[IDXPROM4_I]]
// CHECK2-NEXT: [[TMP40:%.*]] = load i8, ptr [[ARRAYIDX5_I]], align 1
// CHECK2-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP40]] to i32
-// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP41]] to i64
-// CHECK2-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP42]], [[TMP43]]
// CHECK2-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1
// CHECK2-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64
// CHECK2-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]]
// CHECK2-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1
-// CHECK2-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: store i32 [[TMP44]], ptr [[J_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: store i32 [[TMP44]], ptr [[J_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP45]]
// CHECK2-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]]
// CHECK2: land.lhs.true.i:
-// CHECK2-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
-// CHECK2-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
+// CHECK2-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP46]], [[TMP47]]
// CHECK2-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]]
// CHECK2: taskloop.if.then.i:
-// CHECK2-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK2-NEXT: store i64 [[TMP48]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
+// CHECK2-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK2-NEXT: store i64 [[TMP48]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
// CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 2
-// CHECK2-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META36]], !align [[META38]]
+// CHECK2-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META35]], !align [[META37]]
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK2: omp.inner.for.cond.i:
-// CHECK2-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51:![0-9]+]]
-// CHECK2-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51:![0-9]+]]
+// CHECK2-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP53]], [[TMP54]]
// CHECK2-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK2: omp.inner.for.body.i:
-// CHECK2-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP56]], [[TMP57]]
// CHECK2-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1
// CHECK2-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64
// CHECK2-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP55]], [[CONV22_I]]
// CHECK2-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32
-// CHECK2-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP58]] to i64
-// CHECK2-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP62:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP62:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP61]], [[TMP62]]
// CHECK2-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1
// CHECK2-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64
// CHECK2-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP60]], [[CONV33_I]]
-// CHECK2-NEXT: [[TMP63:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP64:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP63:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP64:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP63]], [[TMP64]]
// CHECK2-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1
// CHECK2-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64
@@ -1422,15 +1422,15 @@ struct S {
// CHECK2-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP59]], [[MUL41_I]]
// CHECK2-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]]
// CHECK2-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32
-// CHECK2-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK2-NEXT: [[TMP65:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: [[TMP65:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP65]], 1
-// CHECK2-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK2-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP52:![0-9]+]]
// CHECK2: omp.inner.for.end.i:
// CHECK2-NEXT: br label [[TASKLOOP_IF_END_I]]
// CHECK2: taskloop.if.end.i:
-// CHECK2-NEXT: [[TMP66:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META50]]
+// CHECK2-NEXT: [[TMP66:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META49]]
// CHECK2-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
// CHECK2-NEXT: br i1 [[TMP67]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK2: .omp.lastprivate.then.i:
@@ -1501,7 +1501,7 @@ struct S {
//
//
// CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2Ei.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1519,7 +1519,7 @@ struct S {
// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])
@@ -1630,14 +1630,14 @@ struct S {
// CHECK2-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
// CHECK2-NEXT: store ptr [[TMP_I]], ptr [[TMP1_I]], align 8, !noalias [[META65]]
// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_4:%.*]], ptr [[TMP18]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
// CHECK2-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META65]]
// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META65]]
// CHECK2-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP23]], 1
// CHECK2-NEXT: store i32 [[SUB3_I]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META65]]
// CHECK2-NEXT: store ptr [[A_I]], ptr [[TMP4_I]], align 8, !noalias [[META65]]
-// CHECK2-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META65]], !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META65]], !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: store i32 0, ptr [[TMP24]], align 4
// CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META65]]
// CHECK2-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP25]]
@@ -1648,7 +1648,7 @@ struct S {
// CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32
// CHECK2-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]]
// CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_4]], ptr [[TMP18]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK2-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK2: omp.inner.for.cond.i:
// CHECK2-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]], !llvm.access.group [[ACC_GRP66:![0-9]+]]
@@ -1658,7 +1658,7 @@ struct S {
// CHECK2-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK2: omp.inner.for.body.i:
// CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]], !llvm.access.group [[ACC_GRP66]]
-// CHECK2-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META65]], !nonnull [[META36]], !align [[META37]], !llvm.access.group [[ACC_GRP66]]
+// CHECK2-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META65]], !nonnull [[META35]], !align [[META36]], !llvm.access.group [[ACC_GRP66]]
// CHECK2-NEXT: store i32 [[TMP31]], ptr [[TMP32]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META65]], !llvm.access.group [[ACC_GRP66]]
// CHECK2-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP33]], 1
@@ -1818,40 +1818,40 @@ struct S {
// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// CHECK3-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK3-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// CHECK3-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK3-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK3: omp.inner.for.cond.i:
-// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK3-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK3-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK3-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK3: omp.inner.for.body.i:
-// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK3-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META14]]
-// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK3-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META13]]
+// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK3-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK3-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
-// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]]
+// CHECK3-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
+// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP14:![0-9]+]]
// CHECK3: .omp_outlined..exit:
// CHECK3-NEXT: ret i32 0
//
@@ -1929,46 +1929,46 @@ struct S {
// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META31:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META31]]
-// CHECK3-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META31]]
-// CHECK3-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META31]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META30:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META30]]
+// CHECK3-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META30]]
+// CHECK3-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META30]]
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]]
+// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK3: omp.inner.for.cond.i:
-// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32:![0-9]+]]
+// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31:![0-9]+]]
// CHECK3-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64
-// CHECK3-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
+// CHECK3-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
// CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]
// CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__2_EXIT:%.*]]
// CHECK3: omp.inner.for.body.i:
-// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK3-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
+// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK3-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
// CHECK3-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1
-// CHECK3-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META31]], !llvm.access.group [[ACC_GRP32]]
-// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]]
+// CHECK3-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META30]], !llvm.access.group [[ACC_GRP31]]
+// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP32:![0-9]+]]
// CHECK3: .omp_outlined..2.exit:
// CHECK3-NEXT: ret i32 0
//
//
// CHECK3-LABEL: define {{[^@]+}}@main.omp_outlined.4
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1991,9 +1991,9 @@ struct S {
// CHECK3-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
-// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META36:![0-9]+]], !align [[META37:![0-9]+]]
-// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META36]], !align [[META37]]
-// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META36]], !align [[META38:![0-9]+]]
+// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META35:![0-9]+]], !align [[META36:![0-9]+]]
+// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8, !nonnull [[META35]], !align [[META36]]
+// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !nonnull [[META35]], !align [[META37:![0-9]+]]
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -2129,81 +2129,81 @@ struct S {
// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META46:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META50:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]]
-// CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META36]], !align [[META37]]
-// CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META50]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META49:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]], !inline_history [[META50:![0-9]+]]
+// CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META35]], !align [[META36]]
+// CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META49]]
// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
-// CHECK3-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
-// CHECK3-NEXT: store i32 [[TMP29]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: store i32 [[TMP29]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 2
-// CHECK3-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !nonnull [[META36]], !align [[META38]]
+// CHECK3-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !nonnull [[META35]], !align [[META37]]
// CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8
// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
// CHECK3-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP35]] to i64
// CHECK3-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds ptr, ptr [[TMP32]], i64 [[IDXPROM_I]]
// CHECK3-NEXT: [[TMP36:%.*]] = load ptr, ptr [[ARRAYIDX_I]], align 8
// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP37]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP37]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4
// CHECK3-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP39]] to i64
// CHECK3-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, ptr [[TMP36]], i64 [[IDXPROM4_I]]
// CHECK3-NEXT: [[TMP40:%.*]] = load i8, ptr [[ARRAYIDX5_I]], align 1
// CHECK3-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP40]] to i32
-// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP41]] to i64
-// CHECK3-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP42]], [[TMP43]]
// CHECK3-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1
// CHECK3-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64
// CHECK3-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]]
// CHECK3-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1
-// CHECK3-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: store i32 [[TMP44]], ptr [[J_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: store i32 [[TMP44]], ptr [[J_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP45]]
// CHECK3-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]]
// CHECK3: land.lhs.true.i:
-// CHECK3-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP46]], [[TMP47]]
// CHECK3-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]]
// CHECK3: taskloop.if.then.i:
-// CHECK3-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: store i64 [[TMP48]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP48:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: store i64 [[TMP48]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 2
-// CHECK3-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META36]], !align [[META38]]
+// CHECK3-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META35]], !align [[META37]]
// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 3
// CHECK3-NEXT: [[TMP54:%.*]] = load i8, ptr [[TMP53]], align 1
// CHECK3-NEXT: [[LOADEDV_I:%.*]] = icmp ne i8 [[TMP54]], 0
@@ -2211,32 +2211,32 @@ struct S {
// CHECK3: omp_if.then.i:
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK3: omp.inner.for.cond.i:
-// CHECK3-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51:![0-9]+]]
-// CHECK3-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51:![0-9]+]]
+// CHECK3-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP55]], [[TMP56]]
// CHECK3-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK3: omp.inner.for.body.i:
-// CHECK3-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP58]], [[TMP59]]
// CHECK3-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1
// CHECK3-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64
// CHECK3-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP57]], [[CONV22_I]]
// CHECK3-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32
-// CHECK3-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP60]] to i64
-// CHECK3-NEXT: [[TMP61:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP62:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP63:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP64:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP61:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP62:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP63:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP64:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP63]], [[TMP64]]
// CHECK3-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1
// CHECK3-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64
// CHECK3-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP62]], [[CONV33_I]]
-// CHECK3-NEXT: [[TMP65:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP66:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP65:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP66:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP65]], [[TMP66]]
// CHECK3-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1
// CHECK3-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64
@@ -2244,42 +2244,42 @@ struct S {
// CHECK3-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP61]], [[MUL41_I]]
// CHECK3-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]]
// CHECK3-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32
-// CHECK3-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
-// CHECK3-NEXT: [[TMP67:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: [[TMP67:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP67]], 1
-// CHECK3-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]], !llvm.access.group [[ACC_GRP51]]
+// CHECK3-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]], !llvm.access.group [[ACC_GRP51]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP52:![0-9]+]]
// CHECK3: omp.inner.for.end.i:
// CHECK3-NEXT: br label [[OMP_IF_END_I:%.*]]
// CHECK3: omp_if.else.i:
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND47_I:%.*]]
// CHECK3: omp.inner.for.cond47.i:
-// CHECK3-NEXT: [[TMP68:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP69:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP68:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP69:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META49]]
// CHECK3-NEXT: [[CMP48_I:%.*]] = icmp ule i64 [[TMP68]], [[TMP69]]
// CHECK3-NEXT: br i1 [[CMP48_I]], label [[OMP_INNER_FOR_BODY49_I:%.*]], label [[OMP_INNER_FOR_END82_I:%.*]]
// CHECK3: omp.inner.for.body49.i:
-// CHECK3-NEXT: [[TMP70:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP72:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP70:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP72:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[SUB50_I:%.*]] = sub i32 [[TMP71]], [[TMP72]]
// CHECK3-NEXT: [[SUB51_I:%.*]] = sub i32 [[SUB50_I]], 1
// CHECK3-NEXT: [[CONV55_I:%.*]] = zext i32 [[SUB50_I]] to i64
// CHECK3-NEXT: [[DIV56_I:%.*]] = sdiv i64 [[TMP70]], [[CONV55_I]]
// CHECK3-NEXT: [[CONV59_I:%.*]] = trunc i64 [[DIV56_I]] to i32
-// CHECK3-NEXT: store i32 [[CONV59_I]], ptr [[I14_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP73:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: store i32 [[CONV59_I]], ptr [[I14_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP73:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[CONV60_I:%.*]] = sext i32 [[TMP73]] to i64
-// CHECK3-NEXT: [[TMP74:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP75:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP74:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP75:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[SUB61_I:%.*]] = sub i32 [[TMP76]], [[TMP77]]
// CHECK3-NEXT: [[SUB62_I:%.*]] = sub i32 [[SUB61_I]], 1
// CHECK3-NEXT: [[CONV66_I:%.*]] = zext i32 [[SUB61_I]] to i64
// CHECK3-NEXT: [[DIV67_I:%.*]] = sdiv i64 [[TMP75]], [[CONV66_I]]
-// CHECK3-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP79:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP79:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[SUB68_I:%.*]] = sub i32 [[TMP78]], [[TMP79]]
// CHECK3-NEXT: [[SUB69_I:%.*]] = sub i32 [[SUB68_I]], 1
// CHECK3-NEXT: [[CONV73_I:%.*]] = zext i32 [[SUB68_I]] to i64
@@ -2287,17 +2287,17 @@ struct S {
// CHECK3-NEXT: [[SUB75_I:%.*]] = sub nsw i64 [[TMP74]], [[MUL74_I]]
// CHECK3-NEXT: [[ADD77_I:%.*]] = add nsw i64 [[CONV60_I]], [[SUB75_I]]
// CHECK3-NEXT: [[CONV78_I:%.*]] = trunc i64 [[ADD77_I]] to i32
-// CHECK3-NEXT: store i32 [[CONV78_I]], ptr [[J15_I]], align 4, !noalias [[META50]]
-// CHECK3-NEXT: [[TMP80:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
+// CHECK3-NEXT: store i32 [[CONV78_I]], ptr [[J15_I]], align 4, !noalias [[META49]]
+// CHECK3-NEXT: [[TMP80:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
// CHECK3-NEXT: [[ADD81_I:%.*]] = add nsw i64 [[TMP80]], 1
-// CHECK3-NEXT: store i64 [[ADD81_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META50]]
+// CHECK3-NEXT: store i64 [[ADD81_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META49]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND47_I]], !llvm.loop [[LOOP54:![0-9]+]]
// CHECK3: omp.inner.for.end82.i:
// CHECK3-NEXT: br label [[OMP_IF_END_I]]
// CHECK3: omp_if.end.i:
// CHECK3-NEXT: br label [[TASKLOOP_IF_END_I]]
// CHECK3: taskloop.if.end.i:
-// CHECK3-NEXT: [[TMP81:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META50]]
+// CHECK3-NEXT: [[TMP81:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META49]]
// CHECK3-NEXT: [[TMP82:%.*]] = icmp ne i32 [[TMP81]], 0
// CHECK3-NEXT: br i1 [[TMP82]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK3: .omp.lastprivate.then.i:
@@ -2368,7 +2368,7 @@ struct S {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2Ei.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2386,7 +2386,7 @@ struct S {
// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])
@@ -2497,14 +2497,14 @@ struct S {
// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
// CHECK3-NEXT: store ptr [[TMP_I]], ptr [[TMP1_I]], align 8, !noalias [[META67]]
// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_4:%.*]], ptr [[TMP18]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
// CHECK3-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META67]]
// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META67]]
// CHECK3-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP23]], 1
// CHECK3-NEXT: store i32 [[SUB3_I]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META67]]
// CHECK3-NEXT: store ptr [[A_I]], ptr [[TMP4_I]], align 8, !noalias [[META67]]
-// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META67]], !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META67]], !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: store i32 0, ptr [[TMP24]], align 4
// CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META67]]
// CHECK3-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP25]]
@@ -2515,7 +2515,7 @@ struct S {
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32
// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META67]]
// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_4]], ptr [[TMP18]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META36]], !align [[META37]]
+// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META35]], !align [[META36]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK3: omp.inner.for.cond.i:
// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META67]], !llvm.access.group [[ACC_GRP68:![0-9]+]]
@@ -2525,7 +2525,7 @@ struct S {
// CHECK3-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK3: omp.inner.for.body.i:
// CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META67]], !llvm.access.group [[ACC_GRP68]]
-// CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META67]], !nonnull [[META36]], !align [[META37]], !llvm.access.group [[ACC_GRP68]]
+// CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META67]], !nonnull [[META35]], !align [[META36]], !llvm.access.group [[ACC_GRP68]]
// CHECK3-NEXT: store i32 [[TMP31]], ptr [[TMP32]], align 4, !llvm.access.group [[ACC_GRP68]]
// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META67]], !llvm.access.group [[ACC_GRP68]]
// CHECK3-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP33]], 1
@@ -2607,7 +2607,7 @@ struct S {
// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// CHECK5: omp.inner.for.end:
// CHECK5-NEXT: store i32 10, ptr [[I]], align 4
// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -2619,24 +2619,24 @@ struct S {
// CHECK5-NEXT: store i32 [[CONV8]], ptr [[DOTOMP_IV7]], align 4
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
// CHECK5: omp.inner.for.cond10:
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
+// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
// CHECK5-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64
-// CHECK5-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP5]]
+// CHECK5-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP4]]
// CHECK5-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]]
// CHECK5-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
// CHECK5: omp.inner.for.body13:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK5-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1
// CHECK5-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
-// CHECK5-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK5-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
// CHECK5: omp.body.continue16:
// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
// CHECK5: omp.inner.for.inc17:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK5-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
+// CHECK5-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
+// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP5:![0-9]+]]
// CHECK5: omp.inner.for.end19:
// CHECK5-NEXT: store i32 10, ptr [[I9]], align 4
// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -2695,14 +2695,14 @@ struct S {
// CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP30]], i64 8) ]
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]]
// CHECK5: omp.inner.for.cond48:
-// CHECK5-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9:![0-9]+]]
-// CHECK5-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8:![0-9]+]]
+// CHECK5-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP31]], [[TMP32]]
// CHECK5-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]]
// CHECK5: omp.inner.for.body50:
-// CHECK5-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: [[SUB51:%.*]] = sub i32 [[TMP34]], [[TMP35]]
// CHECK5-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1
// CHECK5-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1
@@ -2713,13 +2713,13 @@ struct S {
// CHECK5-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1
// CHECK5-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]]
// CHECK5-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32
-// CHECK5-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: [[CONV61:%.*]] = sext i32 [[TMP36]] to i64
-// CHECK5-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: [[SUB62:%.*]] = sub i32 [[TMP39]], [[TMP40]]
// CHECK5-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1
// CHECK5-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1
@@ -2727,8 +2727,8 @@ struct S {
// CHECK5-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]]
// CHECK5-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64
// CHECK5-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP38]], [[CONV67]]
-// CHECK5-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: [[SUB69:%.*]] = sub i32 [[TMP41]], [[TMP42]]
// CHECK5-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1
// CHECK5-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1
@@ -2740,15 +2740,15 @@ struct S {
// CHECK5-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1
// CHECK5-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]]
// CHECK5-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32
-// CHECK5-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]]
// CHECK5: omp.body.continue80:
// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]]
// CHECK5: omp.inner.for.inc81:
-// CHECK5-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK5-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK5-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP43]], 1
-// CHECK5-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]]
+// CHECK5-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP9:![0-9]+]]
// CHECK5: omp.inner.for.end83:
// CHECK5-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
// CHECK5-NEXT: [[SUB84:%.*]] = sub nsw i32 [[TMP44]], 0
@@ -2830,7 +2830,7 @@ struct S {
// CHECK5-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64
// CHECK5-NEXT: store i64 [[CONV]], ptr [[DOTOMP_UB]], align 8
// CHECK5-NEXT: store ptr [[A]], ptr [[_TMP6]], align 8
-// CHECK5-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META12:![0-9]+]], !align [[META13:![0-9]+]]
+// CHECK5-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META11:![0-9]+]], !align [[META12:![0-9]+]]
// CHECK5-NEXT: store i32 0, ptr [[TMP4]], align 4
// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
@@ -2842,25 +2842,25 @@ struct S {
// CHECK5-NEXT: store ptr [[A8]], ptr [[_TMP9]], align 8
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
+// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
// CHECK5-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64
-// CHECK5-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP14]]
+// CHECK5-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP13]]
// CHECK5-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]]
// CHECK5-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
+// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META12]], !align [[META13]], !llvm.access.group [[ACC_GRP14]]
-// CHECK5-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP14]]
+// CHECK5-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META11]], !align [[META12]], !llvm.access.group [[ACC_GRP13]]
+// CHECK5-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP13]]
// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK5: omp.body.continue:
// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
+// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
// CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK5-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
+// CHECK5-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
+// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
// CHECK5: omp.inner.for.end:
// CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK5-NEXT: store ptr [[A13]], ptr [[_TMP14]], align 8
@@ -2869,7 +2869,7 @@ struct S {
// CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
// CHECK5-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
// CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
-// CHECK5-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META12]], !align [[META13]]
+// CHECK5-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META11]], !align [[META12]]
// CHECK5-NEXT: store i32 [[ADD18]], ptr [[TMP13]], align 4
// CHECK5-NEXT: br label [[SIMD_IF_END]]
// CHECK5: simd.if.end:
@@ -2946,7 +2946,7 @@ struct S {
// CHECK6-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
// CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK6-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// CHECK6: omp.inner.for.end:
// CHECK6-NEXT: store i32 10, ptr [[I]], align 4
// CHECK6-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -2958,24 +2958,24 @@ struct S {
// CHECK6-NEXT: store i32 [[CONV8]], ptr [[DOTOMP_IV7]], align 4
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
// CHECK6: omp.inner.for.cond10:
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
// CHECK6-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64
-// CHECK6-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP5]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP4]]
// CHECK6-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]]
// CHECK6-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
// CHECK6: omp.inner.for.body13:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK6-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK6-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1
// CHECK6-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
-// CHECK6-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK6-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
// CHECK6: omp.body.continue16:
// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
// CHECK6: omp.inner.for.inc17:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK6-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK6-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
+// CHECK6-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
+// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP5:![0-9]+]]
// CHECK6: omp.inner.for.end19:
// CHECK6-NEXT: store i32 10, ptr [[I9]], align 4
// CHECK6-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -3034,14 +3034,14 @@ struct S {
// CHECK6-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP30]], i64 8) ]
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]]
// CHECK6: omp.inner.for.cond48:
-// CHECK6-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9:![0-9]+]]
-// CHECK6-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8:![0-9]+]]
+// CHECK6-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP31]], [[TMP32]]
// CHECK6-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]]
// CHECK6: omp.inner.for.body50:
-// CHECK6-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: [[SUB51:%.*]] = sub i32 [[TMP34]], [[TMP35]]
// CHECK6-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1
// CHECK6-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1
@@ -3052,13 +3052,13 @@ struct S {
// CHECK6-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1
// CHECK6-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]]
// CHECK6-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32
-// CHECK6-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: [[CONV61:%.*]] = sext i32 [[TMP36]] to i64
-// CHECK6-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: [[SUB62:%.*]] = sub i32 [[TMP39]], [[TMP40]]
// CHECK6-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1
// CHECK6-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1
@@ -3066,8 +3066,8 @@ struct S {
// CHECK6-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]]
// CHECK6-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64
// CHECK6-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP38]], [[CONV67]]
-// CHECK6-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: [[SUB69:%.*]] = sub i32 [[TMP41]], [[TMP42]]
// CHECK6-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1
// CHECK6-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1
@@ -3079,15 +3079,15 @@ struct S {
// CHECK6-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1
// CHECK6-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]]
// CHECK6-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32
-// CHECK6-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]]
// CHECK6: omp.body.continue80:
// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]]
// CHECK6: omp.inner.for.inc81:
-// CHECK6-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK6-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK6-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP43]], 1
-// CHECK6-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]]
+// CHECK6-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP9:![0-9]+]]
// CHECK6: omp.inner.for.end83:
// CHECK6-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
// CHECK6-NEXT: [[SUB84:%.*]] = sub nsw i32 [[TMP44]], 0
@@ -3169,7 +3169,7 @@ struct S {
// CHECK6-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64
// CHECK6-NEXT: store i64 [[CONV]], ptr [[DOTOMP_UB]], align 8
// CHECK6-NEXT: store ptr [[A]], ptr [[_TMP6]], align 8
-// CHECK6-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META12:![0-9]+]], !align [[META13:![0-9]+]]
+// CHECK6-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META11:![0-9]+]], !align [[META12:![0-9]+]]
// CHECK6-NEXT: store i32 0, ptr [[TMP4]], align 4
// CHECK6-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
@@ -3181,25 +3181,25 @@ struct S {
// CHECK6-NEXT: store ptr [[A8]], ptr [[_TMP9]], align 8
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
+// CHECK6-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
// CHECK6-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64
-// CHECK6-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP14]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP13]]
// CHECK6-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]]
// CHECK6-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META12]], !align [[META13]], !llvm.access.group [[ACC_GRP14]]
-// CHECK6-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP14]]
+// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META11]], !align [[META12]], !llvm.access.group [[ACC_GRP13]]
+// CHECK6-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP13]]
// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK6: omp.body.continue:
// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
+// CHECK6-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
// CHECK6-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK6-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
+// CHECK6-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
+// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
// CHECK6: omp.inner.for.end:
// CHECK6-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK6-NEXT: store ptr [[A13]], ptr [[_TMP14]], align 8
@@ -3208,7 +3208,7 @@ struct S {
// CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
// CHECK6-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
// CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
-// CHECK6-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META12]], !align [[META13]]
+// CHECK6-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META11]], !align [[META12]]
// CHECK6-NEXT: store i32 [[ADD18]], ptr [[TMP13]], align 4
// CHECK6-NEXT: br label [[SIMD_IF_END]]
// CHECK6: simd.if.end:
@@ -3285,7 +3285,7 @@ struct S {
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// CHECK7: omp.inner.for.end:
// CHECK7-NEXT: store i32 10, ptr [[I]], align 4
// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -3297,24 +3297,24 @@ struct S {
// CHECK7-NEXT: store i32 [[CONV8]], ptr [[DOTOMP_IV7]], align 4
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
// CHECK7: omp.inner.for.cond10:
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
+// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
// CHECK7-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64
-// CHECK7-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP5]]
+// CHECK7-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP4]]
// CHECK7-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]]
// CHECK7-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
// CHECK7: omp.inner.for.body13:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK7-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1
// CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
-// CHECK7-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK7-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
// CHECK7: omp.body.continue16:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
// CHECK7: omp.inner.for.inc17:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK7-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK7-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
+// CHECK7-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP5:![0-9]+]]
// CHECK7: omp.inner.for.end19:
// CHECK7-NEXT: store i32 10, ptr [[I9]], align 4
// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -3377,14 +3377,14 @@ struct S {
// CHECK7: omp_if.then:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]]
// CHECK7: omp.inner.for.cond48:
-// CHECK7-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9:![0-9]+]]
-// CHECK7-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8:![0-9]+]]
+// CHECK7-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP32]], [[TMP33]]
// CHECK7-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]]
// CHECK7: omp.inner.for.body50:
-// CHECK7-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: [[SUB51:%.*]] = sub i32 [[TMP35]], [[TMP36]]
// CHECK7-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1
// CHECK7-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1
@@ -3395,13 +3395,13 @@ struct S {
// CHECK7-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1
// CHECK7-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]]
// CHECK7-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32
-// CHECK7-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: [[CONV61:%.*]] = sext i32 [[TMP37]] to i64
-// CHECK7-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: [[SUB62:%.*]] = sub i32 [[TMP40]], [[TMP41]]
// CHECK7-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1
// CHECK7-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1
@@ -3409,8 +3409,8 @@ struct S {
// CHECK7-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]]
// CHECK7-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64
// CHECK7-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP39]], [[CONV67]]
-// CHECK7-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: [[SUB69:%.*]] = sub i32 [[TMP42]], [[TMP43]]
// CHECK7-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1
// CHECK7-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1
@@ -3422,15 +3422,15 @@ struct S {
// CHECK7-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1
// CHECK7-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]]
// CHECK7-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32
-// CHECK7-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]]
// CHECK7: omp.body.continue80:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]]
// CHECK7: omp.inner.for.inc81:
-// CHECK7-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK7-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK7-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP44]], 1
-// CHECK7-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]]
+// CHECK7-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP9:![0-9]+]]
// CHECK7: omp.inner.for.end83:
// CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
// CHECK7: omp_if.else:
@@ -3489,7 +3489,7 @@ struct S {
// CHECK7-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8
// CHECK7-NEXT: [[ADD118:%.*]] = add nsw i64 [[TMP57]], 1
// CHECK7-NEXT: store i64 [[ADD118]], ptr [[DOTOMP_IV45]], align 8
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND84]], !llvm.loop [[LOOP12:![0-9]+]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND84]], !llvm.loop [[LOOP11:![0-9]+]]
// CHECK7: omp.inner.for.end119:
// CHECK7-NEXT: br label [[OMP_IF_END]]
// CHECK7: omp_if.end:
@@ -3573,7 +3573,7 @@ struct S {
// CHECK7-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64
// CHECK7-NEXT: store i64 [[CONV]], ptr [[DOTOMP_UB]], align 8
// CHECK7-NEXT: store ptr [[A]], ptr [[_TMP6]], align 8
-// CHECK7-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META14:![0-9]+]], !align [[META15:![0-9]+]]
+// CHECK7-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META13:![0-9]+]], !align [[META14:![0-9]+]]
// CHECK7-NEXT: store i32 0, ptr [[TMP4]], align 4
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
@@ -3585,25 +3585,25 @@ struct S {
// CHECK7-NEXT: store ptr [[A8]], ptr [[_TMP9]], align 8
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
+// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
// CHECK7-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64
-// CHECK7-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP16]]
+// CHECK7-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP15]]
// CHECK7-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]]
// CHECK7-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
+// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META14]], !align [[META15]], !llvm.access.group [[ACC_GRP16]]
-// CHECK7-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP16]]
+// CHECK7-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META13]], !align [[META14]], !llvm.access.group [[ACC_GRP15]]
+// CHECK7-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP15]]
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK7: omp.body.continue:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
+// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
// CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK7-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
+// CHECK7-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
// CHECK7: omp.inner.for.end:
// CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK7-NEXT: store ptr [[A13]], ptr [[_TMP14]], align 8
@@ -3612,7 +3612,7 @@ struct S {
// CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
// CHECK7-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
// CHECK7-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
-// CHECK7-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META14]], !align [[META15]]
+// CHECK7-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META13]], !align [[META14]]
// CHECK7-NEXT: store i32 [[ADD18]], ptr [[TMP13]], align 4
// CHECK7-NEXT: br label [[SIMD_IF_END]]
// CHECK7: simd.if.end:
@@ -3689,7 +3689,7 @@ struct S {
// CHECK8-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
// CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK8-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// CHECK8: omp.inner.for.end:
// CHECK8-NEXT: store i32 10, ptr [[I]], align 4
// CHECK8-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -3701,24 +3701,24 @@ struct S {
// CHECK8-NEXT: store i32 [[CONV8]], ptr [[DOTOMP_IV7]], align 4
// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
// CHECK8: omp.inner.for.cond10:
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
+// CHECK8-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
// CHECK8-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64
-// CHECK8-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP5]]
+// CHECK8-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTOMP_UB6]], align 8, !llvm.access.group [[ACC_GRP4]]
// CHECK8-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]]
// CHECK8-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
// CHECK8: omp.inner.for.body13:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK8-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK8-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1
// CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
-// CHECK8-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK8-NEXT: store i32 [[ADD15]], ptr [[I9]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
// CHECK8: omp.body.continue16:
// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
// CHECK8: omp.inner.for.inc17:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK8-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
// CHECK8-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK8-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP5]]
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
+// CHECK8-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV7]], align 4, !llvm.access.group [[ACC_GRP4]]
+// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP5:![0-9]+]]
// CHECK8: omp.inner.for.end19:
// CHECK8-NEXT: store i32 10, ptr [[I9]], align 4
// CHECK8-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -3781,14 +3781,14 @@ struct S {
// CHECK8: omp_if.then:
// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]]
// CHECK8: omp.inner.for.cond48:
-// CHECK8-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9:![0-9]+]]
-// CHECK8-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8:![0-9]+]]
+// CHECK8-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_UB41]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP32]], [[TMP33]]
// CHECK8-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]]
// CHECK8: omp.inner.for.body50:
-// CHECK8-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: [[SUB51:%.*]] = sub i32 [[TMP35]], [[TMP36]]
// CHECK8-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1
// CHECK8-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1
@@ -3799,13 +3799,13 @@ struct S {
// CHECK8-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1
// CHECK8-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]]
// CHECK8-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32
-// CHECK8-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: store i32 [[CONV60]], ptr [[I46]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: [[CONV61:%.*]] = sext i32 [[TMP37]] to i64
-// CHECK8-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: [[SUB62:%.*]] = sub i32 [[TMP40]], [[TMP41]]
// CHECK8-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1
// CHECK8-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1
@@ -3813,8 +3813,8 @@ struct S {
// CHECK8-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]]
// CHECK8-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64
// CHECK8-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP39]], [[CONV67]]
-// CHECK8-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: [[SUB69:%.*]] = sub i32 [[TMP42]], [[TMP43]]
// CHECK8-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1
// CHECK8-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1
@@ -3826,15 +3826,15 @@ struct S {
// CHECK8-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1
// CHECK8-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]]
// CHECK8-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32
-// CHECK8-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: store i32 [[CONV79]], ptr [[J47]], align 4, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]]
// CHECK8: omp.body.continue80:
// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]]
// CHECK8: omp.inner.for.inc81:
-// CHECK8-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
+// CHECK8-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
// CHECK8-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP44]], 1
-// CHECK8-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP9]]
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]]
+// CHECK8-NEXT: store i64 [[ADD82]], ptr [[DOTOMP_IV45]], align 8, !llvm.access.group [[ACC_GRP8]]
+// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP9:![0-9]+]]
// CHECK8: omp.inner.for.end83:
// CHECK8-NEXT: br label [[OMP_IF_END:%.*]]
// CHECK8: omp_if.else:
@@ -3893,7 +3893,7 @@ struct S {
// CHECK8-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_IV45]], align 8
// CHECK8-NEXT: [[ADD118:%.*]] = add nsw i64 [[TMP57]], 1
// CHECK8-NEXT: store i64 [[ADD118]], ptr [[DOTOMP_IV45]], align 8
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND84]], !llvm.loop [[LOOP12:![0-9]+]]
+// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND84]], !llvm.loop [[LOOP11:![0-9]+]]
// CHECK8: omp.inner.for.end119:
// CHECK8-NEXT: br label [[OMP_IF_END]]
// CHECK8: omp_if.end:
@@ -3977,7 +3977,7 @@ struct S {
// CHECK8-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64
// CHECK8-NEXT: store i64 [[CONV]], ptr [[DOTOMP_UB]], align 8
// CHECK8-NEXT: store ptr [[A]], ptr [[_TMP6]], align 8
-// CHECK8-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META14:![0-9]+]], !align [[META15:![0-9]+]]
+// CHECK8-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META13:![0-9]+]], !align [[META14:![0-9]+]]
// CHECK8-NEXT: store i32 0, ptr [[TMP4]], align 4
// CHECK8-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
@@ -3989,25 +3989,25 @@ struct S {
// CHECK8-NEXT: store ptr [[A8]], ptr [[_TMP9]], align 8
// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
+// CHECK8-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
// CHECK8-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64
-// CHECK8-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP16]]
+// CHECK8-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP15]]
// CHECK8-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]]
// CHECK8-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
+// CHECK8-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META14]], !align [[META15]], !llvm.access.group [[ACC_GRP16]]
-// CHECK8-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP16]]
+// CHECK8-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META13]], !align [[META14]], !llvm.access.group [[ACC_GRP15]]
+// CHECK8-NEXT: store i32 [[ADD]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP15]]
// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK8: omp.body.continue:
// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
+// CHECK8-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
// CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1
-// CHECK8-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
+// CHECK8-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
+// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
// CHECK8: omp.inner.for.end:
// CHECK8-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK8-NEXT: store ptr [[A13]], ptr [[_TMP14]], align 8
@@ -4016,7 +4016,7 @@ struct S {
// CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
// CHECK8-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
// CHECK8-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
-// CHECK8-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META14]], !align [[META15]]
+// CHECK8-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META13]], !align [[META14]]
// CHECK8-NEXT: store i32 [[ADD18]], ptr [[TMP13]], align 4
// CHECK8-NEXT: br label [[SIMD_IF_END]]
// CHECK8: simd.if.end:
diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
index 84b393a7d2e1a..e29a2821e0822 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
@@ -273,7 +273,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// CHECK-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -289,9 +289,9 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
-// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -428,51 +428,51 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]]) #[[ATTR4]]
-// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META17]]
-// CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]]) #[[ATTR4]], !inline_history [[META17:![0-9]+]]
+// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META16]]
+// CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
-// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK: omp.inner.for.cond.i:
-// CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
+// CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
// CHECK-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP28]] to i64
-// CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP29]]
// CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK: omp.inner.for.body.i:
-// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
-// CHECK-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
+// CHECK-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP23]], align 4, !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: store i32 [[TMP31]], ptr [[TMP25]], align 4, !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP24]], ptr align 8 [[TMP22]], i64 8, i1 false), !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: store i32 33, ptr [[TMP26]], align 4, !llvm.access.group [[ACC_GRP18]]
-// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP32]], 1
-// CHECK-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP19:![0-9]+]]
// CHECK: .omp_outlined..exit:
// CHECK-NEXT: ret i32 0
@@ -495,7 +495,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP8]], i32 0, i32 0
// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP7]], i32 0, i32 0
-// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i32 0, i32 0
// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]
@@ -511,7 +511,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK: omp.arraycpy.done3:
// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP8]], i32 0, i32 1
// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP7]], i32 0, i32 1
-// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TMP13]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP15]], double noundef 0.000000e+00)
// CHECK-NEXT: ret void
//
@@ -616,7 +616,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
// CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
@@ -688,7 +688,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// CHECK-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -704,9 +704,9 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -853,7 +853,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META35]]
// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META35]]
// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META35]]
-// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR4]]
+// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR4]], !inline_history [[META36:![0-9]+]]
// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META35]]
// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META35]]
// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META35]]
@@ -863,21 +863,21 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]]
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK: omp.inner.for.cond.i:
-// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36:![0-9]+]]
+// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37:![0-9]+]]
// CHECK-NEXT: [[CONV4_I:%.*]] = sext i32 [[TMP27]] to i64
-// CHECK-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
+// CHECK-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
// CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV4_I]], [[TMP28]]
// CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
// CHECK: omp.inner.for.body.i:
-// CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
-// CHECK-NEXT: store i32 [[TMP29]], ptr [[I_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
-// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP22]], align 128, !llvm.access.group [[ACC_GRP36]]
-// CHECK-NEXT: store i32 [[TMP30]], ptr [[TMP23]], align 4, !llvm.access.group [[ACC_GRP36]]
-// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP24]], ptr align 4 [[TMP25]], i64 4, i1 false), !llvm.access.group [[ACC_GRP36]]
-// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
+// CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
+// CHECK-NEXT: store i32 [[TMP29]], ptr [[I_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
+// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP22]], align 128, !llvm.access.group [[ACC_GRP37]]
+// CHECK-NEXT: store i32 [[TMP30]], ptr [[TMP23]], align 4, !llvm.access.group [[ACC_GRP37]]
+// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP24]], ptr align 4 [[TMP25]], i64 4, i1 false), !llvm.access.group [[ACC_GRP37]]
+// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
// CHECK-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP31]], 1
-// CHECK-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
-// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP37:![0-9]+]]
+// CHECK-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
+// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP38:![0-9]+]]
// CHECK: .omp_outlined..1.exit:
// CHECK-NEXT: ret i32 0
//
@@ -899,7 +899,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], ptr [[TMP3]], i32 0, i32 2
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_2:%.*]], ptr [[TMP8]], i32 0, i32 2
// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1:%.*]], ptr [[TMP7]], i32 0, i32 0
-// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0:%.*]]], ptr [[TMP9]], i32 0, i32 0
// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]
@@ -915,7 +915,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK: omp.arraycpy.done3:
// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_2]], ptr [[TMP8]], i32 0, i32 3
// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP7]], i32 0, i32 1
-// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]], i32 noundef 0)
// CHECK-NEXT: ret void
//
@@ -979,7 +979,7 @@ void array_func(int n, float a[n], St s[2]) {
// CHECK-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
@@ -1080,50 +1080,50 @@ void array_func(int n, float a[n], St s[2]) {
// LAMBDA-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// LAMBDA-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// LAMBDA-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// LAMBDA-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// LAMBDA-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]]
-// LAMBDA-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// LAMBDA-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// LAMBDA-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// LAMBDA-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META17:![0-9]+]]
+// LAMBDA-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// LAMBDA-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// LAMBDA-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
-// LAMBDA-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// LAMBDA-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// LAMBDA: omp.inner.for.cond.i:
-// LAMBDA-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
+// LAMBDA-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
// LAMBDA-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i64
-// LAMBDA-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]
// LAMBDA-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// LAMBDA: omp.inner.for.body.i:
-// LAMBDA-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
-// LAMBDA-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 8, !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: store i32 11, ptr [[TMP23]], align 4, !llvm.access.group [[ACC_GRP18]]
-// LAMBDA-NEXT: store ptr [[TMP22]], ptr [[REF_TMP_I]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: store ptr [[TMP22]], ptr [[REF_TMP_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP_I]], i32 0, i32 1
-// LAMBDA-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]]), !llvm.access.group [[ACC_GRP18]]
-// LAMBDA-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 1
-// LAMBDA-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// LAMBDA-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP19:![0-9]+]]
// LAMBDA: .omp_outlined..exit:
// LAMBDA-NEXT: ret i32 0
@@ -1151,7 +1151,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// BLOCKS-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// BLOCKS-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
+// BLOCKS-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
// BLOCKS-NEXT: entry:
// BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// BLOCKS-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1207,7 +1207,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// BLOCKS-LABEL: define {{[^@]+}}@.omp_task_privates_map.
-// BLOCKS-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR6:[0-9]+]] {
+// BLOCKS-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR5:[0-9]+]] {
// BLOCKS-NEXT: entry:
// BLOCKS-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// BLOCKS-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1226,7 +1226,7 @@ void array_func(int n, float a[n], St s[2]) {
//
//
// BLOCKS-LABEL: define {{[^@]+}}@.omp_task_entry.
-// BLOCKS-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
+// BLOCKS-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
// BLOCKS-NEXT: entry:
// BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
// BLOCKS-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
@@ -1265,64 +1265,64 @@ void array_func(int n, float a[n], St s[2]) {
// BLOCKS-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// BLOCKS-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// BLOCKS-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// BLOCKS-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// BLOCKS-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR4:[0-9]+]]
-// BLOCKS-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]
-// BLOCKS-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// BLOCKS-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// BLOCKS-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META14:![0-9]+]]
+// BLOCKS-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META13]]
+// BLOCKS-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// BLOCKS-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
-// BLOCKS-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// BLOCKS-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// BLOCKS: omp.inner.for.cond.i:
-// BLOCKS-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15:![0-9]+]]
+// BLOCKS-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15:![0-9]+]]
// BLOCKS-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i64
-// BLOCKS-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]
// BLOCKS-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// BLOCKS: omp.inner.for.body.i:
-// BLOCKS-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
-// BLOCKS-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 8, !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: store i32 11, ptr [[TMP23]], align 4, !llvm.access.group [[ACC_GRP15]]
-// BLOCKS-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 1
-// BLOCKS-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 2
-// BLOCKS-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 3
-// BLOCKS-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 4
-// BLOCKS-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 5
// BLOCKS-NEXT: [[TMP28:%.*]] = load volatile double, ptr [[TMP22]], align 8, !llvm.access.group [[ACC_GRP15]]
-// BLOCKS-NEXT: store volatile double [[TMP28]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store volatile double [[TMP28]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 6
// BLOCKS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 4, !llvm.access.group [[ACC_GRP15]]
-// BLOCKS-NEXT: store i32 [[TMP29]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store i32 [[TMP29]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK_I]], i32 0, i32 3
-// BLOCKS-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
-// BLOCKS-NEXT: call void [[TMP31]](ptr noundef [[BLOCK_I]]) #[[ATTR4]], !llvm.access.group [[ACC_GRP15]]
-// BLOCKS-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: call void [[TMP31]](ptr noundef [[BLOCK_I]]) #[[ATTR3]], !llvm.access.group [[ACC_GRP15]], !inline_history [[META14]]
+// BLOCKS-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP32]], 1
-// BLOCKS-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// BLOCKS-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
// BLOCKS: .omp_outlined..exit:
// BLOCKS-NEXT: ret i32 0
@@ -1457,45 +1457,45 @@ void array_func(int n, float a[n], St s[2]) {
// ARRAY-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// ARRAY-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// ARRAY-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// ARRAY-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// ARRAY-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// ARRAY-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// ARRAY-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
// ARRAY-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP19]], align 8
-// ARRAY-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]]
-// ARRAY-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]
-// ARRAY-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// ARRAY-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]], !inline_history [[META14:![0-9]+]]
+// ARRAY-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META13]]
+// ARRAY-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// ARRAY-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP25]] to i32
-// ARRAY-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// ARRAY-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// ARRAY: omp.inner.for.cond.i:
-// ARRAY-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15:![0-9]+]]
+// ARRAY-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15:![0-9]+]]
// ARRAY-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP26]] to i64
-// ARRAY-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// ARRAY-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// ARRAY-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP27]]
// ARRAY-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// ARRAY: omp.inner.for.body.i:
-// ARRAY-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
-// ARRAY-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
-// ARRAY-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// ARRAY-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
+// ARRAY-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
+// ARRAY-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// ARRAY-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 1
-// ARRAY-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP15]]
+// ARRAY-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP15]]
// ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP16:![0-9]+]]
// ARRAY: .omp_outlined..exit:
// ARRAY-NEXT: ret i32 0
@@ -1532,30 +1532,30 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// SIMD-ONLY0: omp.inner.for.cond:
-// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// SIMD-ONLY0-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
-// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
// SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// SIMD-ONLY0: omp.inner.for.body:
-// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY0-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
-// SIMD-ONLY0-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY0-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY0-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR]], i64 0, i64 0
-// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX2]], ptr align 8 [[VAR]], i64 8, i1 false), !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY0-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX2]], ptr align 8 [[VAR]], i64 8, i1 false), !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY0-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY0-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// SIMD-ONLY0: omp.body.continue:
// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// SIMD-ONLY0: omp.inner.for.inc:
-// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY0-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP5]], 1
-// SIMD-ONLY0-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// SIMD-ONLY0-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// SIMD-ONLY0: omp.inner.for.end:
// SIMD-ONLY0-NEXT: store i32 10, ptr [[I]], align 4
// SIMD-ONLY0-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1646,29 +1646,29 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// SIMD-ONLY0: omp.inner.for.cond:
-// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
+// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
// SIMD-ONLY0-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
-// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
// SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// SIMD-ONLY0: omp.inner.for.body:
-// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY0-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
-// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 128, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
+// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 128, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
-// SIMD-ONLY0-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY0-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY0-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR]], i64 0, i64 0
-// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i64 4, i1 false), !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY0-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// SIMD-ONLY0: omp.body.continue:
// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// SIMD-ONLY0: omp.inner.for.inc:
-// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY0-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP5]], 1
-// SIMD-ONLY0-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
-// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
+// SIMD-ONLY0-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
+// SIMD-ONLY0-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
// SIMD-ONLY0: omp.inner.for.end:
// SIMD-ONLY0-NEXT: store i32 10, ptr [[I]], align 4
// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1730,7 +1730,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META9:![0-9]+]], !align [[META10:![0-9]+]]
+// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]
// SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
@@ -1824,7 +1824,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY0-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META9]], !align [[META11:![0-9]+]]
+// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META8]], !align [[META10:![0-9]+]]
// SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
@@ -1887,30 +1887,30 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// SIMD-ONLY1: omp.inner.for.cond:
-// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// SIMD-ONLY1-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
-// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
// SIMD-ONLY1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// SIMD-ONLY1: omp.inner.for.body:
-// SIMD-ONLY1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// SIMD-ONLY1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// SIMD-ONLY1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
-// SIMD-ONLY1-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY1-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR]], i64 0, i64 0
-// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX2]], ptr align 8 [[VAR]], i64 8, i1 false), !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY1-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX2]], ptr align 8 [[VAR]], i64 8, i1 false), !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY1-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// SIMD-ONLY1: omp.body.continue:
// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// SIMD-ONLY1: omp.inner.for.inc:
-// SIMD-ONLY1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP5]], 1
-// SIMD-ONLY1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// SIMD-ONLY1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// SIMD-ONLY1: omp.inner.for.end:
// SIMD-ONLY1-NEXT: store i32 10, ptr [[I]], align 4
// SIMD-ONLY1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -2001,29 +2001,29 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// SIMD-ONLY1: omp.inner.for.cond:
-// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
+// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
// SIMD-ONLY1-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
-// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
// SIMD-ONLY1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// SIMD-ONLY1: omp.inner.for.body:
-// SIMD-ONLY1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// SIMD-ONLY1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// SIMD-ONLY1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
-// SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 128, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
+// SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR]], align 128, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
-// SIMD-ONLY1-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY1-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR]], i64 0, i64 0
-// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i64 4, i1 false), !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// SIMD-ONLY1: omp.body.continue:
// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// SIMD-ONLY1: omp.inner.for.inc:
-// SIMD-ONLY1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
+// SIMD-ONLY1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
// SIMD-ONLY1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP5]], 1
-// SIMD-ONLY1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
-// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
+// SIMD-ONLY1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
+// SIMD-ONLY1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
// SIMD-ONLY1: omp.inner.for.end:
// SIMD-ONLY1-NEXT: store i32 10, ptr [[I]], align 4
// SIMD-ONLY1-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2085,7 +2085,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META9:![0-9]+]], !align [[META10:![0-9]+]]
+// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]
// SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
@@ -2179,7 +2179,7 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY1-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META9]], !align [[META11:![0-9]+]]
+// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META8]], !align [[META10:![0-9]+]]
// SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
@@ -2251,45 +2251,45 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// SIMD-ONLY3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// SIMD-ONLY3: omp.inner.for.cond:
-// SIMD-ONLY3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// SIMD-ONLY3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// SIMD-ONLY3-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
-// SIMD-ONLY3-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
// SIMD-ONLY3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// SIMD-ONLY3: omp.inner.for.body:
-// SIMD-ONLY3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// SIMD-ONLY3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// SIMD-ONLY3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY3-NEXT: store double 1.000000e+00, ptr @g, align 8, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY3-NEXT: store i32 11, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY3-NEXT: store double 1.000000e+00, ptr @g, align 8, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY3-NEXT: store i32 11, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 0
-// SIMD-ONLY3-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 1
-// SIMD-ONLY3-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 2
-// SIMD-ONLY3-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 3
-// SIMD-ONLY3-NEXT: store ptr @__main_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: store ptr @__main_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 4
-// SIMD-ONLY3-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 5
-// SIMD-ONLY3-NEXT: [[TMP4:%.*]] = load volatile double, ptr @g, align 8, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY3-NEXT: store volatile double [[TMP4]], ptr [[BLOCK_CAPTURED]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: [[TMP4:%.*]] = load volatile double, ptr @g, align 8, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY3-NEXT: store volatile double [[TMP4]], ptr [[BLOCK_CAPTURED]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[BLOCK_CAPTURED2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 6
-// SIMD-ONLY3-NEXT: [[TMP5:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY3-NEXT: store i32 [[TMP5]], ptr [[BLOCK_CAPTURED2]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: [[TMP5:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY3-NEXT: store i32 [[TMP5]], ptr [[BLOCK_CAPTURED2]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
-// SIMD-ONLY3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY3-NEXT: call void [[TMP7]](ptr noundef [[BLOCK]]), !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY3-NEXT: call void [[TMP7]](ptr noundef [[BLOCK]]), !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// SIMD-ONLY3: omp.body.continue:
// SIMD-ONLY3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// SIMD-ONLY3: omp.inner.for.inc:
-// SIMD-ONLY3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
-// SIMD-ONLY3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// SIMD-ONLY3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// SIMD-ONLY3: omp.inner.for.end:
// SIMD-ONLY3-NEXT: store i32 10, ptr [[I]], align 4
// SIMD-ONLY3-NEXT: ret void
@@ -2332,24 +2332,24 @@ void array_func(int n, float a[n], St s[2]) {
// SIMD-ONLY4-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// SIMD-ONLY4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// SIMD-ONLY4: omp.inner.for.cond:
-// SIMD-ONLY4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// SIMD-ONLY4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// SIMD-ONLY4-NEXT: [[CONV1:%.*]] = sext i32 [[TMP3]] to i64
-// SIMD-ONLY4-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY4-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY4-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP4]]
// SIMD-ONLY4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// SIMD-ONLY4: omp.inner.for.body:
-// SIMD-ONLY4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
// SIMD-ONLY4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// SIMD-ONLY4-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY4-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// SIMD-ONLY4: omp.body.continue:
// SIMD-ONLY4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// SIMD-ONLY4: omp.inner.for.inc:
-// SIMD-ONLY4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// SIMD-ONLY4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// SIMD-ONLY4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
-// SIMD-ONLY4-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// SIMD-ONLY4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// SIMD-ONLY4-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// SIMD-ONLY4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// SIMD-ONLY4: omp.inner.for.end:
// SIMD-ONLY4-NEXT: store i32 10, ptr [[I]], align 4
// SIMD-ONLY4-NEXT: ret void
diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
index b60cdb10e423c..4149cf52ecc17 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
@@ -260,7 +260,7 @@ void loop() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -276,10 +276,10 @@ void loop() {
// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP5]])
@@ -411,67 +411,67 @@ void loop() {
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]], ptr [[DOTLASTPRIV_PTR_ADDR4_I]]) #[[ATTR4]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]], ptr [[DOTLASTPRIV_PTR_ADDR4_I]]) #[[ATTR4]], !inline_history [[META17:![0-9]+]]
// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8, !nonnull [[META3]], !align [[META5]]
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META3]], !align [[META5]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 4
-// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP38:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP39:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META17]]
-// CHECK1-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP38:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP39:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META16]]
+// CHECK1-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP40]] to i32
-// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
+// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
// CHECK1-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP41]] to i64
-// CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP42]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
-// CHECK1-NEXT: store i32 [[TMP43]], ptr [[I_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
+// CHECK1-NEXT: store i32 [[TMP43]], ptr [[I_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP36]], align 4, !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: store i32 [[TMP44]], ptr [[TMP38]], align 4, !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP37]], ptr align 8 [[TMP35]], i64 8, i1 false), !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: store i32 33, ptr [[TMP39]], align 4, !llvm.access.group [[ACC_GRP18]]
-// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP45]], 1
-// CHECK1-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK1-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP19:![0-9]+]]
// CHECK1: omp.inner.for.end.i:
-// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
// CHECK1-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0
// CHECK1-NEXT: br i1 [[TMP47]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK1: .omp.lastprivate.then.i:
@@ -660,7 +660,7 @@ void loop() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -676,10 +676,10 @@ void loop() {
// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP5]])
@@ -822,18 +822,18 @@ void loop() {
// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META35]]
// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META35]]
// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META35]]
-// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]]) #[[ATTR4]]
+// CHECK1-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]], ptr [[DOTLASTPRIV_PTR_ADDR2_I]], ptr [[DOTLASTPRIV_PTR_ADDR3_I]]) #[[ATTR4]], !inline_history [[META36:![0-9]+]]
// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP22]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[TMP29]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP19]], i32 0, i32 3
-// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META35]]
// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META35]]
// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META35]]
@@ -843,21 +843,21 @@ void loop() {
// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]]
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK1: omp.inner.for.cond.i:
-// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36:![0-9]+]]
+// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37:![0-9]+]]
// CHECK1-NEXT: [[CONV4_I:%.*]] = sext i32 [[TMP38]] to i64
-// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
+// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV4_I]], [[TMP39]]
// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK1: omp.inner.for.body.i:
-// CHECK1-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
-// CHECK1-NEXT: store i32 [[TMP40]], ptr [[I_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
-// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP33]], align 128, !llvm.access.group [[ACC_GRP36]]
-// CHECK1-NEXT: store i32 [[TMP41]], ptr [[TMP34]], align 4, !llvm.access.group [[ACC_GRP36]]
-// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP35]], ptr align 4 [[TMP36]], i64 4, i1 false), !llvm.access.group [[ACC_GRP36]]
-// CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
+// CHECK1-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
+// CHECK1-NEXT: store i32 [[TMP40]], ptr [[I_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
+// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP33]], align 128, !llvm.access.group [[ACC_GRP37]]
+// CHECK1-NEXT: store i32 [[TMP41]], ptr [[TMP34]], align 4, !llvm.access.group [[ACC_GRP37]]
+// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP35]], ptr align 4 [[TMP36]], i64 4, i1 false), !llvm.access.group [[ACC_GRP37]]
+// CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
// CHECK1-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP42]], 1
-// CHECK1-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP36]]
-// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP37:![0-9]+]]
+// CHECK1-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META35]], !llvm.access.group [[ACC_GRP37]]
+// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP38:![0-9]+]]
// CHECK1: omp.inner.for.end.i:
// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META35]]
// CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
@@ -1054,56 +1054,56 @@ void loop() {
// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]]
-// CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META17:![0-9]+]]
+// CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
-// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META17]]
-// CHECK3-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
+// CHECK3-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
-// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK3: omp.inner.for.cond.i:
-// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
+// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
// CHECK3-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP28]] to i64
-// CHECK3-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP29]]
// CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK3: omp.inner.for.body.i:
-// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
-// CHECK3-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: store double 1.000000e+00, ptr [[TMP25]], align 8, !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: store i32 11, ptr [[TMP26]], align 4, !llvm.access.group [[ACC_GRP18]]
-// CHECK3-NEXT: store ptr [[TMP25]], ptr [[REF_TMP_I]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: store ptr [[TMP25]], ptr [[REF_TMP_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP_I]], i32 0, i32 1
-// CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP31]], align 8, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP31]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]]), !llvm.access.group [[ACC_GRP18]]
-// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP32]], 1
-// CHECK3-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META17]], !llvm.access.group [[ACC_GRP18]]
+// CHECK3-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP18]]
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP19:![0-9]+]]
// CHECK3: omp.inner.for.end.i:
-// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META17]]
+// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
// CHECK3-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
// CHECK3-NEXT: br i1 [[TMP34]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK3: .omp.lastprivate.then.i:
@@ -1156,7 +1156,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1213,7 +1213,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_privates_map.
-// CHECK4-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1232,7 +1232,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry.
-// CHECK4-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK4-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
// CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
@@ -1271,70 +1271,70 @@ void loop() {
// CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR4:[0-9]+]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META13:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]], !inline_history [[META14:![0-9]+]]
// CHECK4-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META15:![0-9]+]], !align [[META16:![0-9]+]]
// CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1
// CHECK4-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META15]], !align [[META17:![0-9]+]]
-// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]
-// CHECK4-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META13]]
+// CHECK4-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META13]]
// CHECK4-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
-// CHECK4-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK4: omp.inner.for.cond.i:
-// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
+// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP18:![0-9]+]]
// CHECK4-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP28]] to i64
-// CHECK4-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP29]]
// CHECK4-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK4: omp.inner.for.body.i:
-// CHECK4-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
-// CHECK4-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: store double 1.000000e+00, ptr [[TMP25]], align 8, !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: store i32 11, ptr [[TMP26]], align 4, !llvm.access.group [[ACC_GRP18]]
-// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 1
-// CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 2
-// CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 3
-// CHECK4-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 4
-// CHECK4-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 5
// CHECK4-NEXT: [[TMP31:%.*]] = load volatile double, ptr [[TMP25]], align 8, !llvm.access.group [[ACC_GRP18]]
-// CHECK4-NEXT: store volatile double [[TMP31]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store volatile double [[TMP31]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 6
// CHECK4-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP26]], align 4, !llvm.access.group [[ACC_GRP18]]
-// CHECK4-NEXT: store i32 [[TMP32]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store i32 [[TMP32]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK_I]], i32 0, i32 3
-// CHECK4-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
-// CHECK4-NEXT: call void [[TMP34]](ptr noundef [[BLOCK_I]]) #[[ATTR4]], !llvm.access.group [[ACC_GRP18]]
-// CHECK4-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 8, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: call void [[TMP34]](ptr noundef [[BLOCK_I]]) #[[ATTR3]], !llvm.access.group [[ACC_GRP18]], !inline_history [[META14]]
+// CHECK4-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP35]], 1
-// CHECK4-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]], !llvm.access.group [[ACC_GRP18]]
+// CHECK4-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META13]], !llvm.access.group [[ACC_GRP18]]
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP19:![0-9]+]]
// CHECK4: omp.inner.for.end.i:
-// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]
+// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META13]]
// CHECK4-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK4-NEXT: br i1 [[TMP37]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK4: .omp.lastprivate.then.i:
@@ -1348,7 +1348,7 @@ void loop() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_dup.
-// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR7]] {
+// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR6]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1381,7 +1381,7 @@ void loop() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[S:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1396,8 +1396,8 @@ void loop() {
// CHECK5-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK5-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
// CHECK5-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
// CHECK5-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
@@ -1492,52 +1492,52 @@ void loop() {
// CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
// CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK5-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
-// CHECK5-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
-// CHECK5-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META4:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK5-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
+// CHECK5-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META15:![0-9]+]]
+// CHECK5-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
// CHECK5-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP19]], align 8
-// CHECK5-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]]
+// CHECK5-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTLASTPRIV_PTR_ADDR_I]], ptr [[DOTLASTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]], !inline_history [[META16:![0-9]+]]
// CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK5-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META16]]
-// CHECK5-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META15]]
+// CHECK5-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
// CHECK5-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32
-// CHECK5-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK5: omp.inner.for.cond.i:
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17:![0-9]+]]
+// CHECK5-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP17:![0-9]+]]
// CHECK5-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP30]] to i64
-// CHECK5-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK5-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]], !llvm.access.group [[ACC_GRP17]]
// CHECK5-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP31]]
// CHECK5-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK5: omp.inner.for.body.i:
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK5-NEXT: store i32 [[TMP32]], ptr [[I_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK5-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP17]]
+// CHECK5-NEXT: store i32 [[TMP32]], ptr [[I_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP17]]
+// CHECK5-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP17]]
// CHECK5-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP33]], 1
-// CHECK5-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK5-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP17]]
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP18:![0-9]+]]
// CHECK5: omp.inner.for.end.i:
-// CHECK5-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK5-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
// CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
// CHECK5-NEXT: br i1 [[TMP35]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK5: .omp.lastprivate.then.i:
@@ -1578,7 +1578,7 @@ void loop() {
//
//
// CHECK6-LABEL: define {{[^@]+}}@_Z4loopv.omp_outlined
-// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[J:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK6-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[J:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK6-NEXT: entry:
// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1590,8 +1590,8 @@ void loop() {
// CHECK6-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK6-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
// CHECK6-NEXT: store ptr [[J]], ptr [[J_ADDR]], align 8
-// CHECK6-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK6-NEXT: [[TMP1:%.*]] = load ptr, ptr [[J_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK6-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK6-NEXT: [[TMP1:%.*]] = load ptr, ptr [[J_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK6-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK6-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK6-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])
@@ -1664,64 +1664,64 @@ void loop() {
// CHECK6-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8
// CHECK6-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
// CHECK6-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META16:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META4:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META15:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK6-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
-// CHECK6-NEXT: store i32 [[TMP20]], ptr [[DOTLINEAR_START_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: store i32 [[TMP20]], ptr [[DOTLINEAR_START_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP18]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK6-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK6-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
-// CHECK6-NEXT: store i32 [[TMP23]], ptr [[DOTLINEAR_START1_I]], align 4, !noalias [[META16]]
-// CHECK6-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK6-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META16]]
+// CHECK6-NEXT: store i32 [[TMP23]], ptr [[DOTLINEAR_START1_I]], align 4, !noalias [[META15]]
+// CHECK6-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK6-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META15]]
// CHECK6-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP25]] to i32
-// CHECK6-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
// CHECK6: omp.inner.for.cond.i:
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17:![0-9]+]]
+// CHECK6-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16:![0-9]+]]
// CHECK6-NEXT: [[CONV3_I:%.*]] = sext i32 [[TMP26]] to i64
-// CHECK6-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK6-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
// CHECK6-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV3_I]], [[TMP27]]
// CHECK6-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]
// CHECK6: omp.inner.for.body.i:
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK6-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK6-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTLINEAR_START1_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK6-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK6-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
+// CHECK6-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
+// CHECK6-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTLINEAR_START1_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
+// CHECK6-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
// CHECK6-NEXT: [[ADD5_I:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK6-NEXT: store i32 [[ADD5_I]], ptr [[J_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK6-NEXT: [[TMP31:%.*]] = load i32, ptr [[J_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK6-NEXT: store i32 [[ADD5_I]], ptr [[J_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
+// CHECK6-NEXT: [[TMP31:%.*]] = load i32, ptr [[J_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
// CHECK6-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP31]], 1
-// CHECK6-NEXT: store i32 [[INC_I]], ptr [[J_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK6-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
+// CHECK6-NEXT: store i32 [[INC_I]], ptr [[J_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
+// CHECK6-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
// CHECK6-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP32]], 1
-// CHECK6-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META16]], !llvm.access.group [[ACC_GRP17]]
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP18:![0-9]+]]
+// CHECK6-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META15]], !llvm.access.group [[ACC_GRP16]]
+// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP17:![0-9]+]]
// CHECK6: omp.inner.for.end.i:
-// CHECK6-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
// CHECK6-NEXT: br i1 [[TMP34]], label [[DOTOMP_LINEAR_PU_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
// CHECK6: .omp.linear.pu.i:
-// CHECK6-NEXT: [[TMP35:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK6-NEXT: [[TMP35:%.*]] = load ptr, ptr [[TMP18]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK6-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP18]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP37:%.*]] = load ptr, ptr [[TMP36]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK6-NEXT: [[TMP38:%.*]] = load i32, ptr [[J_I]], align 4, !noalias [[META16]]
+// CHECK6-NEXT: [[TMP37:%.*]] = load ptr, ptr [[TMP36]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK6-NEXT: [[TMP38:%.*]] = load i32, ptr [[J_I]], align 4, !noalias [[META15]]
// CHECK6-NEXT: store i32 [[TMP38]], ptr [[TMP37]], align 4
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__EXIT]]
// CHECK6: .omp_outlined..exit:
@@ -1775,32 +1775,32 @@ void loop() {
// CHECK7: arrayctor.cont:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// CHECK7-NEXT: [[CONV5:%.*]] = sext i32 [[TMP1]] to i64
-// CHECK7-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK7-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV5]], [[TMP2]]
// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
// CHECK7: omp.inner.for.cond.cleanup:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 0
-// CHECK7-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK7-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK7-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR3]], i64 0, i64 0
-// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX6]], ptr align 8 [[VAR1]], i64 8, i1 false), !llvm.access.group [[ACC_GRP2]]
-// CHECK7-NEXT: store i32 33, ptr [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX6]], ptr align 8 [[VAR1]], i64 8, i1 false), !llvm.access.group [[ACC_GRP1]]
+// CHECK7-NEXT: store i32 33, ptr [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK7: omp.body.continue:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP5]], 1
-// CHECK7-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// CHECK7-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// CHECK7: omp.inner.for.end:
// CHECK7-NEXT: store i32 10, ptr [[I]], align 4
// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[VAR]], ptr align 8 [[VAR1]], i64 8, i1 false)
@@ -1930,31 +1930,31 @@ void loop() {
// CHECK7-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
+// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
// CHECK7-NEXT: [[CONV5:%.*]] = sext i32 [[TMP1]] to i64
-// CHECK7-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP6]]
+// CHECK7-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP5]]
// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV5]], [[TMP2]]
// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
// CHECK7: omp.inner.for.cond.cleanup:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR1]], align 128, !llvm.access.group [[ACC_GRP6]]
+// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR1]], align 128, !llvm.access.group [[ACC_GRP5]]
// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i64 0, i64 0
-// CHECK7-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK7-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]
// CHECK7-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i64 0, i64 0
-// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[VAR4]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
+// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[VAR4]], i64 4, i1 false), !llvm.access.group [[ACC_GRP5]]
// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK7: omp.body.continue:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP5]], 1
-// CHECK7-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
+// CHECK7-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
+// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
// CHECK7: omp.inner.for.end:
// CHECK7-NEXT: store i32 10, ptr [[I]], align 4
// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[T_VAR1]], align 128
@@ -2146,45 +2146,45 @@ void loop() {
// CHECK10-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// CHECK10-NEXT: [[CONV1:%.*]] = sext i32 [[TMP1]] to i64
-// CHECK10-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP2]]
// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK10-NEXT: store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP2]]
-// CHECK10-NEXT: store i32 11, ptr [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK10-NEXT: store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP1]]
+// CHECK10-NEXT: store i32 11, ptr [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 0
-// CHECK10-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 1
-// CHECK10-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 2
-// CHECK10-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 3
-// CHECK10-NEXT: store ptr @__main_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: store ptr @__main_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 4
-// CHECK10-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 5
-// CHECK10-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP2]]
-// CHECK10-NEXT: store volatile double [[TMP4]], ptr [[BLOCK_CAPTURED]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP1]]
+// CHECK10-NEXT: store volatile double [[TMP4]], ptr [[BLOCK_CAPTURED]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[BLOCK_CAPTURED2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 6
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, ptr [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK10-NEXT: store i32 [[TMP5]], ptr [[BLOCK_CAPTURED2]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: [[TMP5:%.*]] = load i32, ptr [[SIVAR]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK10-NEXT: store i32 [[TMP5]], ptr [[BLOCK_CAPTURED2]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
-// CHECK10-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8, !llvm.access.group [[ACC_GRP2]]
-// CHECK10-NEXT: call void [[TMP7]](ptr noundef [[BLOCK]]), !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8, !llvm.access.group [[ACC_GRP1]]
+// CHECK10-NEXT: call void [[TMP7]](ptr noundef [[BLOCK]]), !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK10: omp.body.continue:
// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK10-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
-// CHECK10-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// CHECK10-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// CHECK10: omp.inner.for.end:
// CHECK10-NEXT: store i32 10, ptr [[I]], align 4
// CHECK10-NEXT: [[TMP9:%.*]] = load double, ptr [[G]], align 8
@@ -2233,24 +2233,24 @@ void loop() {
// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_IV]], align 4
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// CHECK11-NEXT: [[CONV3:%.*]] = sext i32 [[TMP3]] to i64
-// CHECK11-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK11-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK11-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP4]]
// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK11: omp.body.continue:
// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP6]], 1
-// CHECK11-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// CHECK11-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// CHECK11: omp.inner.for.end:
// CHECK11-NEXT: store i32 10, ptr [[I]], align 4
// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[A1]], align 8
@@ -2285,32 +2285,32 @@ void loop() {
// CHECK12-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START1]], align 4
// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
+// CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]+]]
// CHECK12-NEXT: [[CONV5:%.*]] = sext i32 [[TMP3]] to i64
-// CHECK12-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP2]]
+// CHECK12-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8, !llvm.access.group [[ACC_GRP1]]
// CHECK12-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV5]], [[TMP4]]
// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK12-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], ptr [[I2]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTLINEAR_START1]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK12-NEXT: store i32 [[ADD]], ptr [[I2]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK12-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTLINEAR_START1]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK12-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK12-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP7]], 1
// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP6]], [[MUL6]]
-// CHECK12-NEXT: store i32 [[ADD7]], ptr [[J4]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, ptr [[J4]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK12-NEXT: store i32 [[ADD7]], ptr [[J4]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK12-NEXT: [[TMP8:%.*]] = load i32, ptr [[J4]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
-// CHECK12-NEXT: store i32 [[INC]], ptr [[J4]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK12-NEXT: store i32 [[INC]], ptr [[J4]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK12: omp.body.continue:
// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
+// CHECK12-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP9]], 1
-// CHECK12-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
+// CHECK12-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP1]]
+// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
// CHECK12: omp.inner.for.end:
// CHECK12-NEXT: store i32 10, ptr [[I]], align 4
// CHECK12-NEXT: [[TMP10:%.*]] = load i32, ptr [[J4]], align 4
diff --git a/clang/test/OpenMP/parallel_reduction_codegen.cpp b/clang/test/OpenMP/parallel_reduction_codegen.cpp
index beef3b29f5029..d2a5028bc481f 100644
--- a/clang/test/OpenMP/parallel_reduction_codegen.cpp
+++ b/clang/test/OpenMP/parallel_reduction_codegen.cpp
@@ -580,7 +580,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -820,7 +820,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -866,7 +866,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1060,7 +1060,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1255,7 +1255,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1835,7 +1835,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2315,7 +2315,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2442,7 +2442,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/parallel_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_reduction_task_codegen.cpp
index 46415d4557eb0..afd7487a38f1d 100644
--- a/clang/test/OpenMP/parallel_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/parallel_reduction_task_codegen.cpp
@@ -48,7 +48,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
index 965c3037c2d11..06e36329c7496 100644
--- a/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
@@ -48,7 +48,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/reduction_compound_op.cpp b/clang/test/OpenMP/reduction_compound_op.cpp
index 7b2048b2d7943..ebd71d545c3e4 100644
--- a/clang/test/OpenMP/reduction_compound_op.cpp
+++ b/clang/test/OpenMP/reduction_compound_op.cpp
@@ -109,7 +109,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1:[0-9]+]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1:[0-9]+]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -135,9 +135,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -254,7 +254,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.1
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -280,9 +280,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -399,7 +399,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.2
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -425,9 +425,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -544,7 +544,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.3
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -570,9 +570,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -689,7 +689,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.4
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -715,9 +715,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -834,7 +834,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.5
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -860,9 +860,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -979,7 +979,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.6
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1005,9 +1005,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1124,7 +1124,7 @@ void foo(int N, Point const *Points) {
//
//
// NORM-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.7
-// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// NORM-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// NORM-NEXT: entry:
// NORM-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// NORM-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1150,9 +1150,9 @@ void foo(int N, Point const *Points) {
// NORM-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// NORM-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// NORM-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// NORM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// NORM-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// NORM-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// NORM-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// NORM-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1312,7 +1312,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1:[0-9]+]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1:[0-9]+]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1336,9 +1336,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1448,7 +1448,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.1
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1472,9 +1472,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1584,7 +1584,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.2
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1608,9 +1608,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1720,7 +1720,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.3
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1744,9 +1744,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1856,7 +1856,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.4
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1880,9 +1880,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -1992,7 +1992,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.5
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2016,9 +2016,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -2128,7 +2128,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.6
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2154,9 +2154,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -2273,7 +2273,7 @@ void foo(int N, Point const *Points) {
//
//
// COMP-LABEL: define {{[^@]+}}@_Z3fooiPK5Point.omp_outlined.7
-// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
+// COMP-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[N:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[RED:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[POINTS:%.*]]) #[[ATTR1]] {
// COMP-NEXT: entry:
// COMP-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// COMP-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2299,9 +2299,9 @@ void foo(int N, Point const *Points) {
// COMP-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8
// COMP-NEXT: store ptr [[RED]], ptr [[RED_ADDR]], align 8
// COMP-NEXT: store ptr [[POINTS]], ptr [[POINTS_ADDR]], align 8
-// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
-// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8
-// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8
+// COMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP1:%.*]] = load ptr, ptr [[RED_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// COMP-NEXT: [[TMP2:%.*]] = load ptr, ptr [[POINTS_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// COMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
// COMP-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
// COMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
@@ -2463,7 +2463,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4
// SIMD-ONLY-NEXT: [[INC:%.*]] = add i32 [[TMP4]], 1
// SIMD-ONLY-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]
// SIMD-ONLY: for.end:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I1]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND2:%.*]]
@@ -2481,7 +2481,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP9:%.*]] = load i32, ptr [[I1]], align 4
// SIMD-ONLY-NEXT: [[INC6:%.*]] = add i32 [[TMP9]], 1
// SIMD-ONLY-NEXT: store i32 [[INC6]], ptr [[I1]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP3:![0-9]+]]
// SIMD-ONLY: for.end7:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I8]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND9:%.*]]
@@ -2499,7 +2499,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP14:%.*]] = load i32, ptr [[I8]], align 4
// SIMD-ONLY-NEXT: [[INC13:%.*]] = add i32 [[TMP14]], 1
// SIMD-ONLY-NEXT: store i32 [[INC13]], ptr [[I8]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP5:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP4:![0-9]+]]
// SIMD-ONLY: for.end14:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I15]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND16:%.*]]
@@ -2517,7 +2517,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP19:%.*]] = load i32, ptr [[I15]], align 4
// SIMD-ONLY-NEXT: [[INC20:%.*]] = add i32 [[TMP19]], 1
// SIMD-ONLY-NEXT: store i32 [[INC20]], ptr [[I15]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND16]], !llvm.loop [[LOOP6:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND16]], !llvm.loop [[LOOP5:![0-9]+]]
// SIMD-ONLY: for.end21:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I22]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND23:%.*]]
@@ -2535,7 +2535,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP24:%.*]] = load i32, ptr [[I22]], align 4
// SIMD-ONLY-NEXT: [[INC27:%.*]] = add i32 [[TMP24]], 1
// SIMD-ONLY-NEXT: store i32 [[INC27]], ptr [[I22]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND23]], !llvm.loop [[LOOP6:![0-9]+]]
// SIMD-ONLY: for.end28:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I29]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND30:%.*]]
@@ -2553,7 +2553,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP29:%.*]] = load i32, ptr [[I29]], align 4
// SIMD-ONLY-NEXT: [[INC34:%.*]] = add i32 [[TMP29]], 1
// SIMD-ONLY-NEXT: store i32 [[INC34]], ptr [[I29]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND30]], !llvm.loop [[LOOP8:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND30]], !llvm.loop [[LOOP7:![0-9]+]]
// SIMD-ONLY: for.end35:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I36]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND37:%.*]]
@@ -2571,7 +2571,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP34:%.*]] = load i32, ptr [[I36]], align 4
// SIMD-ONLY-NEXT: [[INC41:%.*]] = add i32 [[TMP34]], 1
// SIMD-ONLY-NEXT: store i32 [[INC41]], ptr [[I36]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND37]], !llvm.loop [[LOOP9:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND37]], !llvm.loop [[LOOP8:![0-9]+]]
// SIMD-ONLY: for.end42:
// SIMD-ONLY-NEXT: store i32 0, ptr [[I43]], align 4
// SIMD-ONLY-NEXT: br label [[FOR_COND44:%.*]]
@@ -2589,7 +2589,7 @@ void foo(int N, Point const *Points) {
// SIMD-ONLY-NEXT: [[TMP39:%.*]] = load i32, ptr [[I43]], align 4
// SIMD-ONLY-NEXT: [[INC48:%.*]] = add i32 [[TMP39]], 1
// SIMD-ONLY-NEXT: store i32 [[INC48]], ptr [[I43]], align 4
-// SIMD-ONLY-NEXT: br label [[FOR_COND44]], !llvm.loop [[LOOP10:![0-9]+]]
+// SIMD-ONLY-NEXT: br label [[FOR_COND44]], !llvm.loop [[LOOP9:![0-9]+]]
// SIMD-ONLY: for.end49:
// SIMD-ONLY-NEXT: ret void
//
diff --git a/clang/test/OpenMP/scope_codegen.cpp b/clang/test/OpenMP/scope_codegen.cpp
index ad8980d5a6a01..283e53836e923 100644
--- a/clang/test/OpenMP/scope_codegen.cpp
+++ b/clang/test/OpenMP/scope_codegen.cpp
@@ -954,7 +954,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIdEC1Ev_l70.omp_outlined.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_CGROUP_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_NULL_ALLOCATOR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_DEFAULT_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_LARGE_CAP_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_CONST_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_HIGH_BW_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_LOW_LAT_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_PTEAM_MEM_ALLOC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_THREAD_MEM_ALLOC:%.*]], i64 noundef [[A:%.*]]) #[[ATTR9:[0-9]+]] personality ptr @__gxx_personality_v0 {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_CGROUP_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_NULL_ALLOCATOR:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_DEFAULT_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_LARGE_CAP_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_CONST_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_HIGH_BW_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_LOW_LAT_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_PTEAM_MEM_ALLOC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_THREAD_MEM_ALLOC:%.*]], i64 noundef [[A:%.*]]) #[[ATTR9:[0-9]+]] personality ptr @__gxx_personality_v0 {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1727,7 +1727,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIdEC1Ev_l70.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_CGROUP_MEM_ALLOC:%.*]], i64 noundef [[A:%.*]]) #[[ATTR9:[0-9]+]] personality ptr @__gxx_personality_v0 !dbg [[DBG72:![0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[OMP_CGROUP_MEM_ALLOC:%.*]], i64 noundef [[A:%.*]]) #[[ATTR9:[0-9]+]] personality ptr @__gxx_personality_v0 !dbg [[DBG72:![0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/sections_firstprivate_codegen.cpp b/clang/test/OpenMP/sections_firstprivate_codegen.cpp
index adf5530de0492..631f1698d4615 100644
--- a/clang/test/OpenMP/sections_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/sections_firstprivate_codegen.cpp
@@ -492,7 +492,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -980,7 +980,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/sections_lastprivate_codegen.cpp b/clang/test/OpenMP/sections_lastprivate_codegen.cpp
index 1249d31daa18b..b3d828e28afb6 100644
--- a/clang/test/OpenMP/sections_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/sections_lastprivate_codegen.cpp
@@ -249,7 +249,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -275,11 +275,11 @@ int main() {
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
@@ -544,7 +544,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -567,10 +567,10 @@ int main() {
// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
@@ -760,7 +760,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -776,7 +776,7 @@ int main() {
// CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK4-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
-// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
+// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
@@ -925,7 +925,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -951,11 +951,11 @@ int main() {
// CHECK5-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK5-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
// CHECK5-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
-// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
@@ -1238,7 +1238,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1261,10 +1261,10 @@ int main() {
// CHECK5-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
// CHECK5-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
// CHECK5-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
-// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
diff --git a/clang/test/OpenMP/sections_reduction_codegen.cpp b/clang/test/OpenMP/sections_reduction_codegen.cpp
index de3fb4ca1c5bf..e5289baad00ed 100644
--- a/clang/test/OpenMP/sections_reduction_codegen.cpp
+++ b/clang/test/OpenMP/sections_reduction_codegen.cpp
@@ -245,7 +245,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -277,12 +277,12 @@ int main() {
// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
@@ -633,7 +633,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -663,12 +663,12 @@ int main() {
// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8
// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
// CHECK1-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
-// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_SECTIONS_LB_]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_UB_]], align 4
// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_SECTIONS_ST_]], align 4
@@ -958,7 +958,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1065,7 +1065,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined.omp.reduction.reduction_func
-// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/sections_reduction_task_codegen.cpp b/clang/test/OpenMP/sections_reduction_task_codegen.cpp
index 0fc426ba5c25b..900ae29e9afdd 100644
--- a/clang/test/OpenMP/sections_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/sections_reduction_task_codegen.cpp
@@ -48,7 +48,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/single_firstprivate_codegen.cpp b/clang/test/OpenMP/single_firstprivate_codegen.cpp
index 0501b14a41cb6..0ce66b0b3ee8c 100644
--- a/clang/test/OpenMP/single_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/single_firstprivate_codegen.cpp
@@ -447,7 +447,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -897,7 +897,7 @@ int main() {
//
//
// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
-// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK4-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/structured-bindings-codegen.cpp b/clang/test/OpenMP/structured-bindings-codegen.cpp
index 56788e8f331b3..67361fbe230ac 100644
--- a/clang/test/OpenMP/structured-bindings-codegen.cpp
+++ b/clang/test/OpenMP/structured-bindings-codegen.cpp
@@ -737,7 +737,7 @@ void test_target_map_orig_use_binding() {
}
#endif
// CHECK-LABEL: define dso_local void @_Z30test_binding_and_orig_separatev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[T:%.*]], ptr align 4 @__const._Z30test_binding_and_orig_separatev.t, i64 12, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[T]], i64 12, i1 false)
@@ -765,7 +765,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z30test_binding_and_orig_separatev_l20(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(12) [[T:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(12) [[T:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[T]], ptr [[T_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -783,7 +783,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z24test_target_implicit_mapv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z24test_target_implicit_mapv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -805,7 +805,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_implicit_mapv_l32(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR:%.*]], align 8
@@ -824,7 +824,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z20test_target_parallelv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z20test_target_parallelv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -846,7 +846,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z20test_target_parallelv_l42(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR:%.*]], align 8
@@ -856,7 +856,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z20test_target_parallelv_l42.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -876,7 +876,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z24test_target_parallel_forv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z24test_target_parallel_forv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -898,7 +898,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_parallel_forv_l52(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR:%.*]], align 8
@@ -908,7 +908,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_parallel_forv_l52.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -973,7 +973,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z21test_firstprivate_dsav(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z21test_firstprivate_dsav.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -982,7 +982,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z21test_firstprivate_dsav.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[P:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[P:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -1001,7 +1001,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z15test_shared_dsav(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z15test_shared_dsav.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1010,7 +1010,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z15test_shared_dsav.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -1026,7 +1026,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z18test_reduction_dsav(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z18test_reduction_dsav.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1036,7 +1036,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z18test_reduction_dsav.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SUM:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SUM:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -1119,7 +1119,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z18test_reduction_dsav.omp_outlined.omp.reduction.reduction_func(
-// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1137,7 +1137,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z18test_parallel_for_v(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z18test_parallel_for_v.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1146,7 +1146,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z18test_parallel_for_v.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -1207,7 +1207,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z23test_parallel_for_simd_v(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z23test_parallel_for_simd_v.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1216,7 +1216,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z23test_parallel_for_simd_v.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -1284,7 +1284,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z28test_target_teams_distributev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z28test_target_teams_distributev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1306,7 +1306,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z28test_target_teams_distributev_l113(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR:%.*]], align 8
@@ -1316,7 +1316,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z28test_target_teams_distributev_l113.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR2]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -1381,7 +1381,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z9test_taskv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z9test_taskv.p, i64 8, i1 false)
@@ -1407,7 +1407,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map.(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1423,7 +1423,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry.(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1447,7 +1447,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META35]]
// CHECK: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META35]]
// CHECK: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META35]]
-// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META36:![0-9]+]]
+// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3:[0-9]+]], !inline_history [[META36:![0-9]+]]
// CHECK: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META35]]
// CHECK: [[TMP13:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META35]]
// CHECK: [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
@@ -1458,7 +1458,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z22test_task_firstprivatev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z22test_task_firstprivatev.p, i64 8, i1 false)
@@ -1484,7 +1484,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..10(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1500,7 +1500,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..11(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1524,7 +1524,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META46]]
// CHECK: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META46]]
// CHECK: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META46]]
-// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META47:![0-9]+]]
+// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3]], !inline_history [[META47:![0-9]+]]
// CHECK: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META46]]
// CHECK: [[TMP13:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META46]]
// CHECK: [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
@@ -1535,7 +1535,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z34test_task_firstprivate_with_sharedv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z34test_task_firstprivate_with_sharedv.p, i64 8, i1 false)
@@ -1568,7 +1568,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..13(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1584,7 +1584,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..14(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1608,7 +1608,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META57]]
// CHECK: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META57]]
// CHECK: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META57]]
-// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META58:![0-9]+]]
+// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3]], !inline_history [[META58:![0-9]+]]
// CHECK: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META57]]
// CHECK: [[TMP13:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META57]]
// CHECK: [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
@@ -1622,7 +1622,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z16test_task_dependv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z16test_task_dependv.p, i64 8, i1 false)
@@ -1668,7 +1668,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..16(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1684,7 +1684,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..17(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1708,7 +1708,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META68]]
// CHECK: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META68]]
// CHECK: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META68]]
-// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META69:![0-9]+]]
+// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3]], !inline_history [[META69:![0-9]+]]
// CHECK: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META68]]
// CHECK: [[TMP13:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META68]]
// CHECK: [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
@@ -1719,7 +1719,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z14test_taskloop_v(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z14test_taskloop_v.p, i64 8, i1 false)
@@ -1756,7 +1756,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..19(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1772,7 +1772,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..20(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -1812,7 +1812,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META81]]
// CHECK: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META81]]
// CHECK: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META81]]
-// CHECK: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META82:![0-9]+]]
+// CHECK: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3]], !inline_history [[META82:![0-9]+]]
// CHECK: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META81]]
// CHECK: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META81]]
// CHECK: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META81]]
@@ -1844,7 +1844,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z21instantiate_templatesv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P2:%.*]], ptr align 4 @__const._Z21instantiate_templatesv.p2, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P3:%.*]], ptr align 4 @__const._Z21instantiate_templatesv.p3, i64 12, i1 false)
@@ -1874,7 +1874,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr noundef i32 @_Z17test_template_basI5PointEiT_(
-// CHECK-SAME: i64 [[P_COERCE:%.*]]) #{{[0-9]+}} comdat {
+// CHECK-SAME: i64 [[P_COERCE:%.*]]) #[[ATTR0]] comdat {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i64 [[P_COERCE]], ptr [[P:%.*]], align 4
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1885,7 +1885,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr noundef i32 @_Z20test_template_targetI5PointEiT_(
-// CHECK-SAME: i64 [[P_COERCE:%.*]]) #{{[0-9]+}} comdat {
+// CHECK-SAME: i64 [[P_COERCE:%.*]]) #[[ATTR0]] comdat {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i64 [[P_COERCE]], ptr [[P:%.*]], align 4
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -1914,7 +1914,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr noundef i32 @_Z18test_template_taskI5PointEiT_(
-// CHECK-SAME: i64 [[P_COERCE:%.*]]) #{{[0-9]+}} comdat {
+// CHECK-SAME: i64 [[P_COERCE:%.*]]) #[[ATTR0]] comdat {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: store i64 [[P_COERCE]], ptr [[P:%.*]], align 4
@@ -1945,7 +1945,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr noundef i32 @_Z24test_template_3_bindingsI7Point3DEiT_(
-// CHECK-SAME: i64 [[P_COERCE0:%.*]], i32 [[P_COERCE1:%.*]]) #{{[0-9]+}} comdat {
+// CHECK-SAME: i64 [[P_COERCE0:%.*]], i32 [[P_COERCE1:%.*]]) #[[ATTR0]] comdat {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP1:%.*]] = getelementptr inbounds nuw { i64, i32 }, ptr [[COERCE:%.*]], i32 0, i32 0
// CHECK: store i64 [[P_COERCE0]], ptr [[TMP1]], align 4
@@ -1960,7 +1960,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z17test_template_basI5PointEiT_.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[RESULT:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[RESULT:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2000,7 +2000,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z17test_template_basI5PointEiT_.omp_outlined.omp.reduction.reduction_func(
-// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2018,7 +2018,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z20test_template_targetI5PointEiT__l188(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[RESULT:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[RESULT:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[RESULT]], ptr [[RESULT_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -2039,7 +2039,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..24(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2055,7 +2055,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..25(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2079,7 +2079,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META92]]
// CHECK: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META92]]
// CHECK: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META92]]
-// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META93:![0-9]+]]
+// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3]], !inline_history [[META93:![0-9]+]]
// CHECK: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META92]]
// CHECK: [[TMP13:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META92]]
// CHECK: [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
@@ -2091,7 +2091,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z24test_template_3_bindingsI7Point3DEiT_.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[RESULT:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[RESULT:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(12) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2134,7 +2134,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z24test_template_3_bindingsI7Point3DEiT_.omp_outlined.omp.reduction.reduction_func(
-// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2152,18 +2152,18 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z19test_static_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP0:%.*]] = load atomic i8, ptr @_ZGVZ19test_static_bindingvEDC1a1bE acquire, align 8
// CHECK: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
// CHECK: br i1 [[GUARD_UNINITIALIZED]], label %[[INIT_CHECK:.*]], label %[[INIT_END:.*]], !prof [[PROF94:![0-9]+]]
// CHECK: [[INIT_CHECK]]:
-// CHECK: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ19test_static_bindingvEDC1a1bE) #{{[0-9]+}}
+// CHECK: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ19test_static_bindingvEDC1a1bE) #[[ATTR3]]
// CHECK: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
// CHECK: br i1 [[TOBOOL]], label %[[INIT:.*]], label %[[INIT_END]]
// CHECK: [[INIT]]:
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 @_ZZ19test_static_bindingvEDC1a1bE, ptr align 4 @_ZZ19test_static_bindingvE1p, i64 8, i1 false)
-// CHECK: call void @__cxa_guard_release(ptr @_ZGVZ19test_static_bindingvEDC1a1bE) #{{[0-9]+}}
+// CHECK: call void @__cxa_guard_release(ptr @_ZGVZ19test_static_bindingvEDC1a1bE) #[[ATTR3]]
// CHECK: br label %[[INIT_END]]
// CHECK: [[INIT_END]]:
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @_Z19test_static_bindingv.omp_outlined)
@@ -2171,7 +2171,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z19test_static_bindingv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2183,18 +2183,18 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z26test_static_binding_sharedv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[TMP0:%.*]] = load atomic i8, ptr @_ZGVZ26test_static_binding_sharedvEDC1a1bE acquire, align 8
// CHECK: [[GUARD_UNINITIALIZED:%.*]] = icmp eq i8 [[TMP0]], 0
// CHECK: br i1 [[GUARD_UNINITIALIZED]], label %[[INIT_CHECK:.*]], label %[[INIT_END:.*]], !prof [[PROF94]]
// CHECK: [[INIT_CHECK]]:
-// CHECK: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ26test_static_binding_sharedvEDC1a1bE) #{{[0-9]+}}
+// CHECK: [[TMP1:%.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVZ26test_static_binding_sharedvEDC1a1bE) #[[ATTR3]]
// CHECK: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
// CHECK: br i1 [[TOBOOL]], label %[[INIT:.*]], label %[[INIT_END]]
// CHECK: [[INIT]]:
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 @_ZZ26test_static_binding_sharedvEDC1a1bE, ptr align 4 @_ZZ26test_static_binding_sharedvE1p, i64 8, i1 false)
-// CHECK: call void @__cxa_guard_release(ptr @_ZGVZ26test_static_binding_sharedvEDC1a1bE) #{{[0-9]+}}
+// CHECK: call void @__cxa_guard_release(ptr @_ZGVZ26test_static_binding_sharedvEDC1a1bE) #[[ATTR3]]
// CHECK: br label %[[INIT_END]]
// CHECK: [[INIT_END]]:
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @_Z26test_static_binding_sharedv.omp_outlined)
@@ -2202,7 +2202,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z26test_static_binding_sharedv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2216,7 +2216,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z17test_array_targetv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*]]:
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARR:%.*]], ptr align 4 @__const._Z17test_array_targetv.arr, i64 8, i1 false)
// CHECK: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0:%.*]], i64 0, i64 0
@@ -2249,7 +2249,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17test_array_targetv_l256(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR:%.*]], align 8
@@ -2268,7 +2268,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z15test_array_taskv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*]]:
// CHECK: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARR:%.*]], ptr align 4 @__const._Z15test_array_taskv.arr, i64 8, i1 false)
@@ -2305,7 +2305,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..29(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2321,7 +2321,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..30(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2345,7 +2345,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
// CHECK: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
// CHECK: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #{{[0-9]+}}, !inline_history [[META105:![0-9]+]]
+// CHECK: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]]) #[[ATTR3]], !inline_history [[META105:![0-9]+]]
// CHECK: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
// CHECK: [[TMP13:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META104]]
// CHECK: [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
@@ -2356,7 +2356,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z11test_nestedv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z11test_nestedv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2365,7 +2365,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z11test_nestedv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2393,7 +2393,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..32(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -2425,7 +2425,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z22test_reference_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z22test_reference_bindingv.p, i64 8, i1 false)
// CHECK: store ptr [[P]], ptr [[TMP0:%.*]], align 8
@@ -2435,7 +2435,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z22test_reference_bindingv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2458,7 +2458,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z18test_const_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z18test_const_bindingv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 @__const._Z18test_const_bindingv., i64 8, i1 false)
@@ -2467,7 +2467,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z18test_const_bindingv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2483,7 +2483,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z22test_multiple_bindingsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P1:%.*]], ptr align 4 @__const._Z22test_multiple_bindingsv.p1, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P2:%.*]], ptr align 4 @__const._Z22test_multiple_bindingsv.p2, i64 8, i1 false)
@@ -2494,7 +2494,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z22test_multiple_bindingsv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP1:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2518,7 +2518,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z32test_multiple_bindings_mixed_dsav(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P1:%.*]], ptr align 4 @__const._Z32test_multiple_bindings_mixed_dsav.p1, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P2:%.*]], ptr align 4 @__const._Z32test_multiple_bindings_mixed_dsav.p2, i64 8, i1 false)
@@ -2529,7 +2529,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z32test_multiple_bindings_mixed_dsav.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP1:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[P1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[P1:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2556,7 +2556,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z21test_array_3_elementsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*]]:
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARR:%.*]], ptr align 4 @__const._Z21test_array_3_elementsv.arr, i64 12, i1 false)
// CHECK: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [3 x i32], ptr [[TMP0:%.*]], i64 0, i64 0
@@ -2576,7 +2576,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z21test_array_3_elementsv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(12) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2595,7 +2595,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z11test_singlev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z11test_singlev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2604,7 +2604,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z11test_singlev.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2630,7 +2630,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z13test_sectionsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z13test_sectionsv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2639,7 +2639,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z13test_sectionsv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2699,7 +2699,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z20test_nested_parallelv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z20test_nested_parallelv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2708,7 +2708,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z20test_nested_parallelv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2719,7 +2719,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z20test_nested_parallelv.omp_outlined.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2735,7 +2735,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z10test_simd_v(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z10test_simd_v.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2772,7 +2772,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z23test_simd_write_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z23test_simd_write_bindingv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2804,7 +2804,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z21test_simd_lastprivatev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z21test_simd_lastprivatev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2840,7 +2840,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z32test_private_individual_bindingsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z32test_private_individual_bindingsv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2849,7 +2849,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z32test_private_individual_bindingsv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2858,7 +2858,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z37test_firstprivate_individual_bindingsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z37test_firstprivate_individual_bindingsv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2867,7 +2867,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z37test_firstprivate_individual_bindingsv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2883,14 +2883,14 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z20test_static_bindingsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @_Z20test_static_bindingsv.omp_outlined)
// CHECK: ret void
//
//
// CHECK-LABEL: define internal void @_Z20test_static_bindingsv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2901,7 +2901,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z14test_shadowingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 @__const._Z14test_shadowingv., i64 8, i1 false)
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @_Z14test_shadowingv.omp_outlined)
@@ -2912,7 +2912,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z14test_shadowingv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2928,7 +2928,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z31test_simd_private_then_parallelv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z31test_simd_private_then_parallelv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -2962,7 +2962,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z31test_simd_private_then_parallelv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -2975,7 +2975,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z19test_linear_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z19test_linear_bindingv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3021,7 +3021,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z24test_lastprivate_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z24test_lastprivate_bindingv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3035,7 +3035,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z24test_lastprivate_bindingv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3100,7 +3100,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z27test_binding_name_collisionv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P1:%.*]], ptr align 4 @__const._Z27test_binding_name_collisionv.p1, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P1]], i64 8, i1 false)
@@ -3109,7 +3109,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z27test_binding_name_collisionv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3126,7 +3126,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z31test_firstprivate_nontrivial_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[X]], i32 noundef 10)
@@ -3134,13 +3134,13 @@ void test_target_map_orig_use_binding() {
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[Y]], i32 noundef 20)
// CHECK: call void @_ZN4PairC1ERKS_(ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[P]])
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z31test_firstprivate_nontrivial_sbv.omp_outlined, ptr [[TMP0]])
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[TMP0]]) #{{[0-9]+}}
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[TMP0]]) #[[ATTR3]]
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN14NonTrivialCopyC1Ei(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store i32 [[V]], ptr [[V_ADDR:%.*]], align 4
@@ -3151,7 +3151,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN4PairC1ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -3162,7 +3162,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z31test_firstprivate_nontrivial_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3171,12 +3171,12 @@ void test_target_map_orig_use_binding() {
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[TMP1]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1ERKS_(ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[X]])
// CHECK: [[VALUE:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY:%.*]], ptr [[A]], i32 0, i32 0
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN14NonTrivialCopyC1ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[OTHER]], ptr [[OTHER_ADDR:%.*]], align 8
@@ -3187,25 +3187,25 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN14NonTrivialCopyD1Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK: call void @_ZN14NonTrivialCopyD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN4PairD1Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK: call void @_ZN4PairD2Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[THIS1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD2Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[THIS1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN14NonTrivialCopyC2Ei(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store i32 [[V]], ptr [[V_ADDR:%.*]], align 4
@@ -3219,7 +3219,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN4PairC2ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -3236,7 +3236,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN14NonTrivialCopyC2ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[OTHER]], ptr [[OTHER_ADDR:%.*]], align 8
@@ -3256,7 +3256,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN14NonTrivialCopyD2Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
@@ -3264,19 +3264,19 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN4PairD2Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK: [[Y:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[THIS1]], i32 0, i32 1
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[Y]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[Y]]) #[[ATTR3]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR]], ptr [[THIS1]], i32 0, i32 0
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[X]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[X]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z32test_firstprivate_ref_binding_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[X]], i32 noundef 10)
@@ -3285,12 +3285,12 @@ void test_target_map_orig_use_binding() {
// CHECK: store ptr [[P]], ptr [[TMP0:%.*]], align 8
// CHECK: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8, !nonnull [[META18]], !align [[META19]]
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z32test_firstprivate_ref_binding_sbv.omp_outlined, ptr [[TMP1]])
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define internal void @_Z32test_firstprivate_ref_binding_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3303,12 +3303,12 @@ void test_target_map_orig_use_binding() {
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[TMP3]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1ERKS_(ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[X]])
// CHECK: [[VALUE:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY:%.*]], ptr [[A]], i32 0, i32 0
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z38test_firstprivate_const_ref_binding_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[X]], i32 noundef 10)
@@ -3317,12 +3317,12 @@ void test_target_map_orig_use_binding() {
// CHECK: store ptr [[P]], ptr [[TMP0:%.*]], align 8
// CHECK: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8, !nonnull [[META18]], !align [[META19]]
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z38test_firstprivate_const_ref_binding_sbv.omp_outlined, ptr [[TMP1]])
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define internal void @_Z38test_firstprivate_const_ref_binding_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3335,12 +3335,12 @@ void test_target_map_orig_use_binding() {
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[TMP3]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1ERKS_(ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[X]])
// CHECK: [[VALUE:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY:%.*]], ptr [[A]], i32 0, i32 0
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z38test_firstprivate_multiple_bindings_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[X]], i32 noundef 10)
@@ -3348,13 +3348,13 @@ void test_target_map_orig_use_binding() {
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[Y]], i32 noundef 20)
// CHECK: call void @_ZN4PairC1ERKS_(ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[P]])
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z38test_firstprivate_multiple_bindings_sbv.omp_outlined, ptr [[TMP0]])
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[TMP0]]) #{{[0-9]+}}
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[TMP0]]) #[[ATTR3]]
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define internal void @_Z38test_firstprivate_multiple_bindings_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3369,13 +3369,13 @@ void test_target_map_orig_use_binding() {
// CHECK: [[VALUE1:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY]], ptr [[B]], i32 0, i32 0
// CHECK: [[TMP3:%.*]] = load i32, ptr [[VALUE1]], align 4
// CHECK: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #{{[0-9]+}}
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #[[ATTR3]]
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z36test_firstprivate_with_destructor_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIRWITHDTOR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN8WithDtorC1Ei(ptr noundef nonnull align 8 dereferenceable(8) [[X]], i32 noundef 100)
@@ -3383,13 +3383,13 @@ void test_target_map_orig_use_binding() {
// CHECK: call void @_ZN8WithDtorC1Ei(ptr noundef nonnull align 8 dereferenceable(8) [[Y]], i32 noundef 200)
// CHECK: call void @_ZN12PairWithDtorC1ERKS_(ptr noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[P]])
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z36test_firstprivate_with_destructor_sbv.omp_outlined, ptr [[TMP0]])
-// CHECK: call void @_ZN12PairWithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[TMP0]]) #{{[0-9]+}}
-// CHECK: call void @_ZN12PairWithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN12PairWithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[TMP0]]) #[[ATTR3]]
+// CHECK: call void @_ZN12PairWithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN8WithDtorC1Ei(
-// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store i32 [[V]], ptr [[V_ADDR:%.*]], align 4
@@ -3400,7 +3400,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN12PairWithDtorC1ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -3411,7 +3411,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z36test_firstprivate_with_destructor_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3421,12 +3421,12 @@ void test_target_map_orig_use_binding() {
// CHECK: call void @_ZN8WithDtorC1ERKS_(ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[X]])
// CHECK: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_WITHDTOR:%.*]], ptr [[A]], i32 0, i32 0
// CHECK: [[TMP2:%.*]] = load ptr, ptr [[PTR]], align 8
-// CHECK: call void @_ZN8WithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN8WithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN8WithDtorC1ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[OTHER]], ptr [[OTHER_ADDR:%.*]], align 8
@@ -3437,31 +3437,31 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN8WithDtorD1Ev(
-// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK: call void @_ZN8WithDtorD2Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[THIS1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN8WithDtorD2Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN12PairWithDtorD1Ev(
-// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK: call void @_ZN12PairWithDtorD2Ev(ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[THIS1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN12PairWithDtorD2Ev(ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[THIS1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN8WithDtorC2Ei(
-// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store i32 [[V]], ptr [[V_ADDR:%.*]], align 4
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_WITHDTOR:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK: [[CALL:%.*]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef 4) #{{[0-9]+}}
+// CHECK: [[CALL:%.*]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef 4) #[[ATTR14:[0-9]+]]
// CHECK: [[TMP0:%.*]] = load i32, ptr [[V_ADDR]], align 4
// CHECK: store i32 [[TMP0]], ptr [[CALL]], align 4
// CHECK: store ptr [[CALL]], ptr [[PTR]], align 8
@@ -3469,7 +3469,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN12PairWithDtorC2ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -3486,13 +3486,13 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN8WithDtorC2ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[OTHER:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[OTHER]], ptr [[OTHER_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_WITHDTOR:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK: [[CALL:%.*]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef 4) #{{[0-9]+}}
+// CHECK: [[CALL:%.*]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef 4) #[[ATTR14]]
// CHECK: [[TMP0:%.*]] = load ptr, ptr [[OTHER_ADDR]], align 8, !nonnull [[META18]], !align [[META131]]
// CHECK: [[PTR2:%.*]] = getelementptr inbounds nuw [[STRUCT_WITHDTOR]], ptr [[TMP0]], i32 0, i32 0
// CHECK: [[TMP1:%.*]] = load ptr, ptr [[PTR2]], align 8
@@ -3503,7 +3503,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN8WithDtorD2Ev(
-// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
@@ -3512,26 +3512,26 @@ void test_target_map_orig_use_binding() {
// CHECK: [[ISNULL:%.*]] = icmp eq ptr [[TMP0]], null
// CHECK: br i1 [[ISNULL]], label %[[DELETE_END:.*]], label %[[DELETE_NOTNULL:.*]]
// CHECK: [[DELETE_NOTNULL]]:
-// CHECK: call void @_ZdlPvm(ptr noundef [[TMP0]], i64 noundef 4) #{{[0-9]+}}
+// CHECK: call void @_ZdlPvm(ptr noundef [[TMP0]], i64 noundef 4) #[[ATTR15:[0-9]+]]
// CHECK: br label %[[DELETE_END]]
// CHECK: [[DELETE_END]]:
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN12PairWithDtorD2Ev(
-// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 8 dead_on_return(16) dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK: [[Y:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIRWITHDTOR:%.*]], ptr [[THIS1]], i32 0, i32 1
-// CHECK: call void @_ZN8WithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[Y]]) #{{[0-9]+}}
+// CHECK: call void @_ZN8WithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[Y]]) #[[ATTR3]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIRWITHDTOR]], ptr [[THIS1]], i32 0, i32 0
-// CHECK: call void @_ZN8WithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[X]]) #{{[0-9]+}}
+// CHECK: call void @_ZN8WithDtorD1Ev(ptr noundef nonnull align 8 dead_on_return(8) dereferenceable(8) [[X]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z35test_firstprivate_array_bindings_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*]]:
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[ARR:%.*]], i32 noundef 1)
// CHECK: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_NONTRIVIALCOPY:%.*]], ptr [[ARR]], i64 1
@@ -3556,7 +3556,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[ARRAYDESTROY_BODY]]:
// CHECK: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], %[[ARRAYINIT_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], %[[ARRAYDESTROY_BODY]] ]
// CHECK: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_NONTRIVIALCOPY]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK: br i1 [[ARRAYDESTROY_DONE]], label %[[ARRAYDESTROY_DONE2:.*]], label %[[ARRAYDESTROY_BODY]]
// CHECK: [[ARRAYDESTROY_DONE2]]:
@@ -3566,7 +3566,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[ARRAYDESTROY_BODY4]]:
// CHECK: [[ARRAYDESTROY_ELEMENTPAST5:%.*]] = phi ptr [ [[TMP3]], %[[ARRAYDESTROY_DONE2]] ], [ [[ARRAYDESTROY_ELEMENT6:%.*]], %[[ARRAYDESTROY_BODY4]] ]
// CHECK: [[ARRAYDESTROY_ELEMENT6]] = getelementptr inbounds [[STRUCT_NONTRIVIALCOPY]], ptr [[ARRAYDESTROY_ELEMENTPAST5]], i64 -1
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[ARRAYDESTROY_ELEMENT6]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[ARRAYDESTROY_ELEMENT6]]) #[[ATTR3]]
// CHECK: [[ARRAYDESTROY_DONE7:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT6]], [[ARRAY_BEGIN3]]
// CHECK: br i1 [[ARRAYDESTROY_DONE7]], label %[[ARRAYDESTROY_DONE8:.*]], label %[[ARRAYDESTROY_BODY4]]
// CHECK: [[ARRAYDESTROY_DONE8]]:
@@ -3574,7 +3574,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z35test_firstprivate_array_bindings_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(24) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(24) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3594,14 +3594,14 @@ void test_target_map_orig_use_binding() {
// CHECK: [[VALUE4:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY]], ptr [[C]], i32 0, i32 0
// CHECK: [[TMP4:%.*]] = load i32, ptr [[VALUE4]], align 4
// CHECK: [[ADD5:%.*]] = add nsw i32 [[ADD]], [[TMP4]]
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[C]]) #{{[0-9]+}}
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #{{[0-9]+}}
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[C]]) #[[ATTR3]]
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #[[ATTR3]]
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z34test_firstprivate_nested_struct_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[I1:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER:%.*]], ptr [[O:%.*]], i32 0, i32 0
// CHECK: call void @_ZN5InnerC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[I1]], i32 noundef 5)
@@ -3609,13 +3609,13 @@ void test_target_map_orig_use_binding() {
// CHECK: call void @_ZN5InnerC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[I2]], i32 noundef 10)
// CHECK: call void @_ZN5OuterC1ERKS_(ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[O]])
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z34test_firstprivate_nested_struct_sbv.omp_outlined, ptr [[TMP0]])
-// CHECK: call void @_ZN5OuterD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[TMP0]]) #{{[0-9]+}}
-// CHECK: call void @_ZN5OuterD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[O]]) #{{[0-9]+}}
+// CHECK: call void @_ZN5OuterD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[TMP0]]) #[[ATTR3]]
+// CHECK: call void @_ZN5OuterD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[O]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5InnerC1Ei(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store i32 [[V]], ptr [[V_ADDR:%.*]], align 4
@@ -3626,7 +3626,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5OuterC1ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -3637,7 +3637,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z34test_firstprivate_nested_struct_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3646,12 +3646,12 @@ void test_target_map_orig_use_binding() {
// CHECK: [[I1:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER:%.*]], ptr [[TMP1]], i32 0, i32 0
// CHECK: call void @_ZN5InnerC1ERKS_(ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I1]])
// CHECK: [[VAL:%.*]] = getelementptr inbounds nuw [[STRUCT_INNER:%.*]], ptr [[X]], i32 0, i32 0
-// CHECK: call void @_ZN5InnerD1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[X]]) #{{[0-9]+}}
+// CHECK: call void @_ZN5InnerD1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[X]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5InnerC1ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[O:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[O:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[O]], ptr [[O_ADDR:%.*]], align 8
@@ -3662,25 +3662,25 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5InnerD1Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK: call void @_ZN5InnerD2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN5InnerD2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5OuterD1Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK: call void @_ZN5OuterD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN5OuterD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5InnerC2Ei(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[V:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store i32 [[V]], ptr [[V_ADDR:%.*]], align 4
@@ -3692,7 +3692,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5OuterC2ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
@@ -3709,7 +3709,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5InnerC2ERKS_(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[O:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[O:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: store ptr [[O]], ptr [[O_ADDR:%.*]], align 8
@@ -3724,7 +3724,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5InnerD2Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
@@ -3732,19 +3732,19 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define linkonce_odr void @_ZN5OuterD2Ev(
-// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #{{[0-9]+}} comdat align 2 {
+// CHECK-SAME: ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[THIS]], ptr [[THIS_ADDR:%.*]], align 8
// CHECK: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK: [[I2:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER:%.*]], ptr [[THIS1]], i32 0, i32 1
-// CHECK: call void @_ZN5InnerD1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[I2]]) #{{[0-9]+}}
+// CHECK: call void @_ZN5InnerD1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[I2]]) #[[ATTR3]]
// CHECK: [[I1:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER]], ptr [[THIS1]], i32 0, i32 0
-// CHECK: call void @_ZN5InnerD1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[I1]]) #{{[0-9]+}}
+// CHECK: call void @_ZN5InnerD1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[I1]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z46test_firstprivate_ref_binding_both_bindings_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[X]], i32 noundef 10)
@@ -3753,12 +3753,12 @@ void test_target_map_orig_use_binding() {
// CHECK: store ptr [[P]], ptr [[TMP0:%.*]], align 8
// CHECK: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8, !nonnull [[META18]], !align [[META19]]
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z46test_firstprivate_ref_binding_both_bindings_sbv.omp_outlined, ptr [[TMP1]])
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define internal void @_Z46test_firstprivate_ref_binding_both_bindings_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3780,13 +3780,13 @@ void test_target_map_orig_use_binding() {
// CHECK: [[VALUE2:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY]], ptr [[B]], i32 0, i32 0
// CHECK: [[TMP7:%.*]] = load i32, ptr [[VALUE2]], align 4
// CHECK: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #{{[0-9]+}}
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #[[ATTR3]]
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z52test_firstprivate_const_ref_binding_both_bindings_sbv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_PAIR:%.*]], ptr [[P:%.*]], i32 0, i32 0
// CHECK: call void @_ZN14NonTrivialCopyC1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[X]], i32 noundef 10)
@@ -3795,12 +3795,12 @@ void test_target_map_orig_use_binding() {
// CHECK: store ptr [[P]], ptr [[TMP0:%.*]], align 8
// CHECK: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8, !nonnull [[META18]], !align [[META19]]
// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_Z52test_firstprivate_const_ref_binding_both_bindings_sbv.omp_outlined, ptr [[TMP1]])
-// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #{{[0-9]+}}
+// CHECK: call void @_ZN4PairD1Ev(ptr noundef nonnull align 4 dead_on_return(16) dereferenceable(16) [[P]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define internal void @_Z52test_firstprivate_const_ref_binding_both_bindings_sbv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3822,13 +3822,13 @@ void test_target_map_orig_use_binding() {
// CHECK: [[VALUE2:%.*]] = getelementptr inbounds nuw [[STRUCT_NONTRIVIALCOPY]], ptr [[B]], i32 0, i32 0
// CHECK: [[TMP7:%.*]] = load i32, ptr [[VALUE2]], align 4
// CHECK: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #{{[0-9]+}}
-// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #{{[0-9]+}}
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[B]]) #[[ATTR3]]
+// CHECK: call void @_ZN14NonTrivialCopyD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[A]]) #[[ATTR3]]
// CHECK: ret void
//
//
// CHECK-LABEL: define dso_local void @_Z36test_lambda_capture_binding_by_valuev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z36test_lambda_capture_binding_by_valuev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3842,7 +3842,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z34test_lambda_capture_binding_by_refv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z34test_lambda_capture_binding_by_refv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3854,7 +3854,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z37test_lambda_capture_multiple_bindingsv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z37test_lambda_capture_multiple_bindingsv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3870,7 +3870,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z28test_lambda_implicit_capturev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z28test_lambda_implicit_capturev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3887,7 +3887,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z24test_parallel_for_linearv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z24test_parallel_for_linearv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3896,7 +3896,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z24test_parallel_for_linearv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -3973,7 +3973,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z25test_taskloop_lastprivatev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z25test_taskloop_lastprivatev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -3982,7 +3982,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z25test_taskloop_lastprivatev.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -4014,7 +4014,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_privates_map..34(
-// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR8]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -4026,7 +4026,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..35(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -4066,7 +4066,7 @@ void test_target_map_orig_use_binding() {
// CHECK: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META143]]
// CHECK: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META143]]
// CHECK: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META143]]
-// CHECK: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I:%.*]]) #{{[0-9]+}}, !inline_history [[META144:![0-9]+]]
+// CHECK: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTLASTPRIV_PTR_ADDR_I:%.*]]) #[[ATTR3]], !inline_history [[META144:![0-9]+]]
// CHECK: [[TMP22:%.*]] = load ptr, ptr [[TMP19]], align 8, !nonnull [[META18]], !align [[META19]]
// CHECK: [[TMP23:%.*]] = load ptr, ptr [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias [[META143]]
// CHECK: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META143]]
@@ -4103,7 +4103,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @.omp_task_dup.(
-// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -4118,7 +4118,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z16test_task_sharedv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z16test_task_sharedv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -4127,7 +4127,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z16test_task_sharedv.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -4147,7 +4147,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal noundef i32 @.omp_task_entry..37(
-// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store i32 [[TMP0]], ptr [[DOTADDR:%.*]], align 4
// CHECK: store ptr [[TMP1]], ptr [[DOTADDR1:%.*]], align 8
@@ -4174,7 +4174,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z42test_parallel_for_firstprivate_lastprivatev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z42test_parallel_for_firstprivate_lastprivatev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -4183,7 +4183,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z42test_parallel_for_firstprivate_lastprivatev.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -4252,7 +4252,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z29test_private_plus_lastprivatev(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z29test_private_plus_lastprivatev.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -4263,7 +4263,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @_Z29test_private_plus_lastprivatev.omp_outlined(
-// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]]) #[[ATTR5]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR:%.*]], align 8
// CHECK: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR:%.*]], align 8
@@ -4329,7 +4329,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define dso_local void @_Z32test_target_map_orig_use_bindingv(
-// CHECK-SAME: ) #{{[0-9]+}} {
+// CHECK-SAME: ) #[[ATTR0]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[P:%.*]], ptr align 4 @__const._Z32test_target_map_orig_use_bindingv.p, i64 8, i1 false)
// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0:%.*]], ptr align 4 [[P]], i64 8, i1 false)
@@ -4357,7 +4357,7 @@ void test_target_map_orig_use_binding() {
//
//
// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z32test_target_map_orig_use_bindingv_l732(
-// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[P:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #{{[0-9]+}} {
+// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(8) [[P:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[TMP0:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK: [[ENTRY:.*:]]
// CHECK: store ptr [[P]], ptr [[P_ADDR:%.*]], align 8
// CHECK: store ptr [[TMP0]], ptr [[DOTADDR:%.*]], align 8
diff --git a/clang/test/OpenMP/target_codegen_global_capture.cpp b/clang/test/OpenMP/target_codegen_global_capture.cpp
index 49b425927a24e..dd47b73d405fa 100644
--- a/clang/test/OpenMP/target_codegen_global_capture.cpp
+++ b/clang/test/OpenMP/target_codegen_global_capture.cpp
@@ -424,7 +424,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foossss_l49.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[GD:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[GD:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -436,9 +436,9 @@ int tbar2(short a, short b, short c, short d){
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK1-NEXT: store ptr [[GD]], ptr [[GD_ADDR]], align 8
// CHECK1-NEXT: store ptr [[SD]], ptr [[SD_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[GD_ADDR]], align 8, !nonnull [[META8]], !align [[META10:![0-9]+]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SD_ADDR]], align 8, !nonnull [[META8]], !align [[META11:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META9:![0-9]+]], !align [[META10:![0-9]+]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[GD_ADDR]], align 8, !nonnull [[META9]], !align [[META11:![0-9]+]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SD_ADDR]], align 8, !nonnull [[META9]], !align [[META12:![0-9]+]]
// CHECK1-NEXT: [[TMP3:%.*]] = load i16, ptr [[TMP0]], align 2
// CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1
@@ -494,7 +494,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z3barssss.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -521,10 +521,10 @@ int tbar2(short a, short b, short c, short d){
// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK1-NEXT: store i16 [[TMP4]], ptr [[B_CASTED]], align 2
// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[B_CASTED]], align 8
@@ -736,7 +736,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3barssss_l94.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[GD:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[GD:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -748,9 +748,9 @@ int tbar2(short a, short b, short c, short d){
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK1-NEXT: store ptr [[GD]], ptr [[GD_ADDR]], align 8
// CHECK1-NEXT: store ptr [[SD]], ptr [[SD_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[GD_ADDR]], align 8, !nonnull [[META8]], !align [[META10]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SD_ADDR]], align 8, !nonnull [[META8]], !align [[META11]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[GD_ADDR]], align 8, !nonnull [[META9]], !align [[META11]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SD_ADDR]], align 8, !nonnull [[META9]], !align [[META12]]
// CHECK1-NEXT: [[TMP3:%.*]] = load i16, ptr [[TMP0]], align 2
// CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1
@@ -825,7 +825,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z4tbarIsEiT_S0_S0_S0_.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -852,10 +852,10 @@ int tbar2(short a, short b, short c, short d){
// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK1-NEXT: store i16 [[TMP4]], ptr [[B_CASTED]], align 2
// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[B_CASTED]], align 8
@@ -1067,7 +1067,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z4tbarIsEiT_S0_S0_S0__l145.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[GD:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[GD:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1079,9 +1079,9 @@ int tbar2(short a, short b, short c, short d){
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK1-NEXT: store ptr [[GD]], ptr [[GD_ADDR]], align 8
// CHECK1-NEXT: store ptr [[SD]], ptr [[SD_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META8]], !align [[META9]]
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[GD_ADDR]], align 8, !nonnull [[META8]], !align [[META10]]
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SD_ADDR]], align 8, !nonnull [[META8]], !align [[META11]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META9]], !align [[META10]]
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[GD_ADDR]], align 8, !nonnull [[META9]], !align [[META11]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SD_ADDR]], align 8, !nonnull [[META9]], !align [[META12]]
// CHECK1-NEXT: [[TMP3:%.*]] = load i16, ptr [[TMP0]], align 2
// CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1
@@ -1356,7 +1356,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foossss_l49.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[GD:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[GD:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1426,7 +1426,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z3barssss.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1668,7 +1668,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3barssss_l94.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[GD:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[GD:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1757,7 +1757,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z4tbarIsEiT_S0_S0_S0_.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[A:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[B:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1999,7 +1999,7 @@ int tbar2(short a, short b, short c, short d){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z4tbarIsEiT_S0_S0_S0__l145.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[GD:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[GD:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SD:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
diff --git a/clang/test/OpenMP/target_in_reduction_codegen.cpp b/clang/test/OpenMP/target_in_reduction_codegen.cpp
index fe1068782f5c7..71edf4af52ee6 100644
--- a/clang/test/OpenMP/target_in_reduction_codegen.cpp
+++ b/clang/test/OpenMP/target_in_reduction_codegen.cpp
@@ -1,3 +1,4 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals none --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+_main_l[0-9]+" --prefix-filecheck-ir-name _ --version 6
// RUN: %clang_cc1 -no-enable-noundef-analysis -verify -Wno-vla -triple x86_64-apple-darwin10 -fopenmp -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
// RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s
// RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
@@ -34,35 +35,35 @@ int main(int argc, char **argv) {
}
#endif
-// CHECK1-LABEL: define {{[^@]+}}@main
-// CHECK1-SAME: (i32 [[ARGC:%.*]], ptr [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define i32 @main(
+// CHECK1-SAME: i32 [[ARGC:%.*]], ptr [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK1-NEXT: [[ENTRY:.*]]:
// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[B:%.*]] = alloca float, align 4
-// CHECK1-NEXT: [[C:%.*]] = alloca [5 x %struct.S], align 16
+// CHECK1-NEXT: [[C:%.*]] = alloca [5 x [[STRUCT_S:%.*]]], align 16
// CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
-// CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [3 x %struct.kmp_taskred_input_t], align 8
+// CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [3 x [[STRUCT_KMP_TASKRED_INPUT_T:%.*]]], align 8
// CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 8
-// CHECK1-NEXT: [[DOTRD_INPUT_3:%.*]] = alloca [2 x %struct.kmp_taskred_input_t.0], align 8
+// CHECK1-NEXT: [[DOTRD_INPUT_3:%.*]] = alloca [2 x [[STRUCT_KMP_TASKRED_INPUT_T_0:%.*]]], align 8
// CHECK1-NEXT: [[DOTTASK_RED_6:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4
// CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
-// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0
-// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5
-// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
-// CHECK1: arrayctor.loop:
-// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
+// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x [[STRUCT_S]]], ptr [[C]], i32 0, i32 0
+// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 5
+// CHECK1-NEXT: br label %[[ARRAYCTOR_LOOP:.*]]
+// CHECK1: [[ARRAYCTOR_LOOP]]:
+// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], %[[ENTRY]] ], [ [[ARRAYCTOR_NEXT:%.*]], %[[ARRAYCTOR_LOOP]] ]
// CHECK1-NEXT: call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
-// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
-// CHECK1: arrayctor.cont:
+// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label %[[ARRAYCTOR_CONT:.*]], label %[[ARRAYCTOR_LOOP]]
+// CHECK1: [[ARRAYCTOR_CONT]]:
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
// CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
// CHECK1-NEXT: [[TMP3:%.*]] = call ptr @llvm.stacksave.p0()
@@ -70,111 +71,111 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP2]], align 16
// CHECK1-NEXT: store i64 [[TMP2]], ptr [[__VLA_EXPR0]], align 8
// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
-// CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0
+// CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [3 x [[STRUCT_KMP_TASKRED_INPUT_T]]], ptr [[DOTRD_INPUT_]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0
// CHECK1-NEXT: store ptr [[A]], ptr [[TMP4]], align 8
-// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[A]], ptr [[TMP6]], align 8
-// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2
-// CHECK1-NEXT: store i64 4, ptr [[TMP8]], align 8
-// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init., ptr [[TMP9]], align 8
-// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4
-// CHECK1-NEXT: store ptr null, ptr [[TMP10]], align 8
-// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP11]], align 8
-// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6
-// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP12]], i8 0, i64 4, i1 false)
-// CHECK1-NEXT: [[DOTRD_INPUT_GEP_1:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 0
-// CHECK1-NEXT: store ptr [[B]], ptr [[TMP14]], align 8
-// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[B]], ptr [[TMP16]], align 8
-// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 2
-// CHECK1-NEXT: store i64 4, ptr [[TMP18]], align 8
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP19]], align 8
-// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 4
-// CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP21]], align 8
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 6
-// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP22]], i8 0, i64 4, i1 false)
-// CHECK1-NEXT: [[DOTRD_INPUT_GEP_2:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 2
-// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 0
-// CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP24]], align 8
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP26]], align 8
-// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 2
-// CHECK1-NEXT: store i64 4, ptr [[TMP28]], align 8
-// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init..3, ptr [[TMP29]], align 8
-// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 4
-// CHECK1-NEXT: store ptr null, ptr [[TMP30]], align 8
-// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb..4, ptr [[TMP31]], align 8
-// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 6
-// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP32]], i8 0, i64 4, i1 false)
-// CHECK1-NEXT: [[TMP35:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 3, ptr [[DOTRD_INPUT_]])
-// CHECK1-NEXT: store ptr [[TMP35]], ptr [[DOTTASK_RED_]], align 8
+// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[A]], ptr [[TMP5]], align 8
+// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2
+// CHECK1-NEXT: store i64 4, ptr [[TMP6]], align 8
+// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init., ptr [[TMP7]], align 8
+// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4
+// CHECK1-NEXT: store ptr null, ptr [[TMP8]], align 8
+// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP9]], align 8
+// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6
+// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP10]], i8 0, i64 4, i1 false)
+// CHECK1-NEXT: [[DOTRD_INPUT_GEP_1:%.*]] = getelementptr inbounds nuw [3 x [[STRUCT_KMP_TASKRED_INPUT_T]]], ptr [[DOTRD_INPUT_]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 0
+// CHECK1-NEXT: store ptr [[B]], ptr [[TMP11]], align 8
+// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[B]], ptr [[TMP12]], align 8
+// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 2
+// CHECK1-NEXT: store i64 4, ptr [[TMP13]], align 8
+// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP14]], align 8
+// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 4
+// CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8
+// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP16]], align 8
+// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 6
+// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP17]], i8 0, i64 4, i1 false)
+// CHECK1-NEXT: [[DOTRD_INPUT_GEP_2:%.*]] = getelementptr inbounds nuw [3 x [[STRUCT_KMP_TASKRED_INPUT_T]]], ptr [[DOTRD_INPUT_]], i64 0, i64 2
+// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 0
+// CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP18]], align 8
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP19]], align 8
+// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 2
+// CHECK1-NEXT: store i64 4, ptr [[TMP20]], align 8
+// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init..3, ptr [[TMP21]], align 8
+// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 4
+// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb..4, ptr [[TMP23]], align 8
+// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 6
+// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP24]], i8 0, i64 4, i1 false)
+// CHECK1-NEXT: [[TMP25:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 3, ptr [[DOTRD_INPUT_]])
+// CHECK1-NEXT: store ptr [[TMP25]], ptr [[DOTTASK_RED_]], align 8
// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
-// CHECK1-NEXT: [[DOTRD_INPUT_GEP_4:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0:%.*]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 0
-// CHECK1-NEXT: store ptr [[C]], ptr [[TMP36]], align 8
-// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[C]], ptr [[TMP38]], align 8
-// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 2
-// CHECK1-NEXT: store i64 20, ptr [[TMP40]], align 8
-// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init..5, ptr [[TMP41]], align 8
-// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 4
-// CHECK1-NEXT: store ptr @.red_fini., ptr [[TMP42]], align 8
-// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb..6, ptr [[TMP43]], align 8
-// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 6
-// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP44]], i8 0, i64 4, i1 false)
-// CHECK1-NEXT: [[DOTRD_INPUT_GEP_5:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 0
-// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP46]], align 8
-// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8
-// CHECK1-NEXT: [[TMP50:%.*]] = mul nuw i64 [[TMP2]], 2
-// CHECK1-NEXT: [[TMP51:%.*]] = udiv exact i64 [[TMP50]], 2
-// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 2
-// CHECK1-NEXT: store i64 [[TMP50]], ptr [[TMP52]], align 8
-// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init..7, ptr [[TMP53]], align 8
-// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 4
-// CHECK1-NEXT: store ptr null, ptr [[TMP54]], align 8
-// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb..8, ptr [[TMP55]], align 8
-// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 6
-// CHECK1-NEXT: store i32 1, ptr [[TMP56]], align 8
-// CHECK1-NEXT: [[TMP58:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 2, ptr [[DOTRD_INPUT_3]])
-// CHECK1-NEXT: store ptr [[TMP58]], ptr [[DOTTASK_RED_6]], align 8
+// CHECK1-NEXT: [[DOTRD_INPUT_GEP_4:%.*]] = getelementptr inbounds nuw [2 x [[STRUCT_KMP_TASKRED_INPUT_T_0]]], ptr [[DOTRD_INPUT_3]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 0
+// CHECK1-NEXT: store ptr [[C]], ptr [[TMP26]], align 8
+// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[C]], ptr [[TMP27]], align 8
+// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 2
+// CHECK1-NEXT: store i64 20, ptr [[TMP28]], align 8
+// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init..5, ptr [[TMP29]], align 8
+// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 4
+// CHECK1-NEXT: store ptr @.red_fini., ptr [[TMP30]], align 8
+// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb..6, ptr [[TMP31]], align 8
+// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 6
+// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP32]], i8 0, i64 4, i1 false)
+// CHECK1-NEXT: [[DOTRD_INPUT_GEP_5:%.*]] = getelementptr inbounds nuw [2 x [[STRUCT_KMP_TASKRED_INPUT_T_0]]], ptr [[DOTRD_INPUT_3]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 0
+// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP33]], align 8
+// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP34]], align 8
+// CHECK1-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP2]], 2
+// CHECK1-NEXT: [[TMP36:%.*]] = udiv exact i64 [[TMP35]], 2
+// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 2
+// CHECK1-NEXT: store i64 [[TMP35]], ptr [[TMP37]], align 8
+// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init..7, ptr [[TMP38]], align 8
+// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 4
+// CHECK1-NEXT: store ptr null, ptr [[TMP39]], align 8
+// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb..8, ptr [[TMP40]], align 8
+// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 6
+// CHECK1-NEXT: store i32 1, ptr [[TMP41]], align 8
+// CHECK1-NEXT: [[TMP42:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 2, ptr [[DOTRD_INPUT_3]])
+// CHECK1-NEXT: store ptr [[TMP42]], ptr [[DOTTASK_RED_6]], align 8
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @main.omp_outlined, ptr [[A]], i64 [[TMP2]], ptr [[VLA]], ptr [[DOTTASK_RED_]])
// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4
-// CHECK1-NEXT: [[TMP59:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
-// CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP59]])
-// CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 5
-// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
-// CHECK1: arraydestroy.body:
-// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP60]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
+// CHECK1-NEXT: [[TMP43:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
+// CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP43]])
+// CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [5 x [[STRUCT_S]]], ptr [[C]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 5
+// CHECK1-NEXT: br label %[[ARRAYDESTROY_BODY:.*]]
+// CHECK1: [[ARRAYDESTROY_BODY]]:
+// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP44]], %[[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], %[[ARRAYDESTROY_BODY]] ]
// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3:[0-9]+]]
// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
-// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
-// CHECK1: arraydestroy.done8:
-// CHECK1-NEXT: [[TMP61:%.*]] = load i32, ptr [[RETVAL]], align 4
-// CHECK1-NEXT: ret i32 [[TMP61]]
+// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label %[[ARRAYDESTROY_DONE8:.*]], label %[[ARRAYDESTROY_BODY]]
+// CHECK1: [[ARRAYDESTROY_DONE8]]:
+// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[RETVAL]], align 4
+// CHECK1-NEXT: ret i32 [[TMP45]]
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ev
-// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZN1SC1Ev(
+// CHECK1-SAME: ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
@@ -182,185 +183,185 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_init.
-// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_init.(
+// CHECK1-SAME: ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: store i32 0, ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_comb.
-// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_comb.(
+// CHECK1-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP3]], align 4
-// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
-// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4
+// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]]
+// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_init..1
-// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_init..1(
+// CHECK1-SAME: ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: store float 0.000000e+00, ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: store float 0.000000e+00, ptr [[TMP2]], align 4
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_comb..2
-// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_comb..2(
+// CHECK1-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP6:%.*]] = load float, ptr [[TMP3]], align 4
-// CHECK1-NEXT: [[TMP7:%.*]] = load float, ptr [[TMP5]], align 4
-// CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: store float [[ADD]], ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP2]], align 4
+// CHECK1-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP4]], [[TMP5]]
+// CHECK1-NEXT: store float [[ADD]], ptr [[TMP2]], align 4
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_init..3
-// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_init..3(
+// CHECK1-SAME: ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: store i32 0, ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_comb..4
-// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_comb..4(
+// CHECK1-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP3]], align 4
-// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
-// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4
+// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4
+// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]]
+// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_init..5
-// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_init..5(
+// CHECK1-SAME: ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*]]:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP3]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5
-// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP4]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
-// CHECK1: omp.arrayinit.body:
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x [[STRUCT_S:%.*]]], ptr [[TMP2]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 5
+// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP3]]
+// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label %[[OMP_ARRAYINIT_DONE:.*]], label %[[OMP_ARRAYINIT_BODY:.*]]
+// CHECK1: [[OMP_ARRAYINIT_BODY]]:
+// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], %[[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], %[[OMP_ARRAYINIT_BODY]] ]
// CHECK1-NEXT: call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]])
// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
-// CHECK1: omp.arrayinit.done:
+// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
+// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label %[[OMP_ARRAYINIT_DONE]], label %[[OMP_ARRAYINIT_BODY]]
+// CHECK1: [[OMP_ARRAYINIT_DONE]]:
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_fini.
-// CHECK1-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_fini.(
+// CHECK1-SAME: ptr [[TMP0:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*]]:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP1]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5
-// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
-// CHECK1: arraydestroy.body:
-// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
+// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x [[STRUCT_S:%.*]]], ptr [[TMP1]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 5
+// CHECK1-NEXT: br label %[[ARRAYDESTROY_BODY:.*]]
+// CHECK1: [[ARRAYDESTROY_BODY]]:
+// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], %[[ENTRY]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], %[[ARRAYDESTROY_BODY]] ]
// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #3
+// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
-// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
-// CHECK1: arraydestroy.done1:
+// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label %[[ARRAYDESTROY_DONE1:.*]], label %[[ARRAYDESTROY_BODY]]
+// CHECK1: [[ARRAYDESTROY_DONE1]]:
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
-// CHECK1-SAME: (ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZN1SD1Ev(
+// CHECK1-SAME: ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK1-NEXT: call void @_ZN1SD2Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #3
+// CHECK1-NEXT: call void @_ZN1SD2Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_comb..6
-// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.red_comb..6(
+// CHECK1-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*]]:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S]], ptr [[TMP3]], i64 5
-// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP3]], [[TMP6]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
-// CHECK1: omp.arraycpy.body:
-// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S]], ptr [[TMP2]], i64 5
+// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP4]]
+// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label %[[OMP_ARRAYCPY_DONE2:.*]], label %[[OMP_ARRAYCPY_BODY:.*]]
+// CHECK1: [[OMP_ARRAYCPY_BODY]]:
+// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], %[[ENTRY]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], %[[OMP_ARRAYCPY_BODY]] ]
+// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], %[[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], %[[OMP_ARRAYCPY_BODY]] ]
// CHECK1-NEXT: call void @_ZplRK1SS1_(ptr dead_on_unwind writable sret([[STRUCT_S]]) align 4 [[REF_TMP]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
// CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) ptr @_ZN1SaSERKS_(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[REF_TMP]])
-// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[REF_TMP]]) #3
+// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[REF_TMP]]) #[[ATTR3]]
// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]]
-// CHECK1: omp.arraycpy.done2:
+// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]]
+// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label %[[OMP_ARRAYCPY_DONE2]], label %[[OMP_ARRAYCPY_BODY]]
+// CHECK1: [[OMP_ARRAYCPY_DONE2]]:
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZplRK1SS1_
-// CHECK1-SAME: (ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR7:[0-9]+]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZplRK1SS1_(
+// CHECK1-SAME: ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
-// CHECK1-NEXT: call void @_ZN1SC1ERKS_(ptr nonnull align 4 dereferenceable(4) [[AGG_RESULT]], ptr nonnull align 4 dereferenceable(4) [[TMP1]])
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
+// CHECK1-NEXT: call void @_ZN1SC1ERKS_(ptr nonnull align 4 dereferenceable(4) [[AGG_RESULT]], ptr nonnull align 4 dereferenceable(4) [[TMP0]])
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SaSERKS_
-// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR7]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr nonnull align 4 dereferenceable(4) ptr @_ZN1SaSERKS_(
+// CHECK1-SAME: ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR1]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -369,66 +370,11 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: ret ptr [[THIS1]]
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_init..7
-// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
-// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
-// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
-// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP5:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}})
-// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 8
-// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr i16, ptr [[TMP4]], i64 [[TMP7]]
-// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP4]], [[TMP8]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
-// CHECK1: omp.arrayinit.body:
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP4]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
-// CHECK1-NEXT: store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
-// CHECK1: omp.arrayinit.done:
-// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.red_comb..8
-// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
-// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
-// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
-// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}})
-// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP3]], align 8
-// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
-// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP5]]
-// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP10]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
-// CHECK1: omp.arraycpy.body:
-// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
-// CHECK1-NEXT: [[TMP11:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
-// CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP11]] to i32
-// CHECK1-NEXT: [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
-// CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP12]] to i32
-// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
-// CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
-// CHECK1-NEXT: store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
-// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
-// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
-// CHECK1: omp.arraycpy.done4:
-// CHECK1-NEXT: ret void
-//
-//
-// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]]) #[[ATTR8:[0-9]+]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @main.omp_outlined(
+// CHECK1-SAME: ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nofreeobj nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
@@ -442,10 +388,10 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED__ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR]], align 8
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR]], align 8, !nonnull [[META2]], !align [[META5:![0-9]+]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8
@@ -459,23 +405,23 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
// CHECK1-NEXT: [[TMP12:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP11]], i32 1, i64 48, i64 32, ptr @.omp_task_entry.)
-// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP12]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP14]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
-// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP16]], ptr align 8 [[AGG_CAPTURED]], i64 32, i1 false)
-// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP12]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP18]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP3]], align 8
-// CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 8
+// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP12]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP13]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
+// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[AGG_CAPTURED]], i64 32, i1 false)
+// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP12]], i32 0, i32 1
+// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP16]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8
+// CHECK1-NEXT: store ptr [[TMP18]], ptr [[TMP17]], align 8
// CHECK1-NEXT: call void @__kmpc_omp_task_begin_if0(ptr @[[GLOB1]], i32 [[TMP11]], ptr [[TMP12]])
-// CHECK1-NEXT: [[TMP22:%.*]] = call i32 @.omp_task_entry.(i32 [[TMP11]], ptr [[TMP12]]) #[[ATTR3]]
+// CHECK1-NEXT: [[TMP19:%.*]] = call i32 @.omp_task_entry.(i32 [[TMP11]], ptr [[TMP12]]) #[[ATTR3]]
// CHECK1-NEXT: call void @__kmpc_omp_task_complete_if0(ptr @[[GLOB1]], i32 [[TMP11]], ptr [[TMP12]])
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@__omp_offloading_{{.*}}_main_l{{[0-9]+}}
-// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr [[DOTTASK_RED_:%.*]], ptr noalias [[DYN_PTR:%.*]]) #[[ATTR9:[0-9]+]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+_main_l[0-9]+}}(
+// CHECK1-SAME: ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr [[DOTTASK_RED_:%.*]], ptr noalias [[DYN_PTR:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
@@ -487,37 +433,37 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META2]], !align [[META3]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !nonnull [[META2]], !align [[META4]]
// CHECK1-NEXT: store i32 0, ptr [[I]], align 4
-// CHECK1-NEXT: br label [[FOR_COND:%.*]]
-// CHECK1: for.cond:
+// CHECK1-NEXT: br label %[[FOR_COND:.*]]
+// CHECK1: [[FOR_COND]]:
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], 5
-// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
-// CHECK1: for.body:
+// CHECK1-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
+// CHECK1: [[FOR_BODY]]:
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4
-// CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP4]] to i64
-// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i16, ptr [[TMP2]], i64 [[IDXPROM_I]]
-// CHECK1-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX_I]], align 2
+// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
+// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[TMP2]], i64 [[IDXPROM]]
+// CHECK1-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX]], align 2
// CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP5]] to i32
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[CONV]]
// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP0]], align 4
-// CHECK1-NEXT: br label [[FOR_INC:%.*]]
-// CHECK1: for.inc:
+// CHECK1-NEXT: br label %[[FOR_INC:.*]]
+// CHECK1: [[FOR_INC]]:
// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
// CHECK1-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
-// CHECK1: for.end
+// CHECK1-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
+// CHECK1: [[FOR_END]]:
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map.
-// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal void @.omp_task_privates_map.(
+// CHECK1-SAME: ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
@@ -529,9 +475,9 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.
-// CHECK1-SAME: (i32 [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define internal i32 @.omp_task_entry.(
+// CHECK1-SAME: i32 [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
@@ -549,39 +495,39 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
+// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: store ptr [[TMP9]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP12]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
-// CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: call void [[TMP15]](ptr [[TMP16]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR3]]
-// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP12]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP18]], align 8
-// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !{{[0-9]+}}
-// CHECK1-NEXT: [[TMP24:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP22]], ptr [[TMP21]], ptr [[TMP20]])
-// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP12]], align 8
-// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP12]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8
-// CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP18]], align 8
-// CHECK1-NEXT: call void @__omp_offloading_{{.*}}_main_l{{[0-9]+}}(ptr [[TMP26]], i64 [[TMP14]], ptr [[TMP28]], ptr [[TMP29]], ptr null) #[[ATTR3]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META11:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP9]], i32 0, i32 1
+// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8
+// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: call void [[TMP12]](ptr [[TMP13]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR3]], !inline_history [[META18:![0-9]+]]
+// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP14]], align 8
+// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META17]]
+// CHECK1-NEXT: [[TMP18:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP17]], ptr [[TMP16]], ptr [[TMP15]])
+// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META2]], !align [[META3]]
+// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2
+// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8, !nonnull [[META2]], !align [[META4]]
+// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP14]], align 8
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+_main_l[0-9]+}}(ptr [[TMP19]], i64 [[TMP11]], ptr [[TMP21]], ptr [[TMP22]], ptr null) #[[ATTR3]]
// CHECK1-NEXT: ret i32 0
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ev
-// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZN1SC2Ev(
+// CHECK1-SAME: ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
@@ -590,18 +536,18 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
-// CHECK1-SAME: (ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZN1SD2Ev(
+// CHECK1-SAME: ptr nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1ERKS_
-// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZN1SC1ERKS_(
+// CHECK1-SAME: ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -612,9 +558,9 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: ret void
//
//
-// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2ERKS_
-// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
-// CHECK1-NEXT: entry:
+// CHECK1-LABEL: define linkonce_odr void @_ZN1SC2ERKS_(
+// CHECK1-SAME: ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
+// CHECK1-NEXT: [[ENTRY:.*:]]
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -622,3 +568,5 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: ret void
//
+//
+//
diff --git a/clang/test/OpenMP/target_map_codegen_03.cpp b/clang/test/OpenMP/target_map_codegen_03.cpp
index 44775536d2009..990522e22853c 100644
--- a/clang/test/OpenMP/target_map_codegen_03.cpp
+++ b/clang/test/OpenMP/target_map_codegen_03.cpp
@@ -70,7 +70,7 @@ void implicit_maps_nested_integer (int a){
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z28implicit_maps_nested_integeri.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -83,7 +83,7 @@ void implicit_maps_nested_integer (int a){
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[I_CASTED]], align 4
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[I_CASTED]], align 8
@@ -149,7 +149,7 @@ void implicit_maps_nested_integer (int a){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z28implicit_maps_nested_integeri_l48.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -157,7 +157,7 @@ void implicit_maps_nested_integer (int a){
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META4]], !align [[META5]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP0]], align 4
@@ -177,7 +177,7 @@ void implicit_maps_nested_integer (int a){
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z28implicit_maps_nested_integeri.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -256,7 +256,7 @@ void implicit_maps_nested_integer (int a){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z28implicit_maps_nested_integeri_l48.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
diff --git a/clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp b/clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
index 9499b87b84760..0eaaa2c60fcba 100644
--- a/clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
+++ b/clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
@@ -476,7 +476,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -577,7 +577,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i.omp_outlined.8
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -966,7 +966,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1067,7 +1067,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i.omp_outlined.8
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR3]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nofreeobj noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
diff --git a/clang/test/OpenMP/target_teams_codegen.cpp b/clang/test/OpenMP/target_teams_codegen.cpp
index aa03a0d7251e5..46655d990df1e 100644
--- a/clang/test/OpenMP/target_teams_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_codegen.cpp
@@ -1180,7 +1180,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l111
-// CHECK1-SAME: (i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
@@ -1212,7 +1212,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l118
-// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
@@ -1255,7 +1255,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l124
-// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
@@ -1300,7 +1300,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l130
-// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
@@ -1345,7 +1345,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l136
-// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
@@ -1390,7 +1390,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l160
-// CHECK1-SAME: (i64 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], ptr noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[D:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], ptr noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[D:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
@@ -1501,7 +1501,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172
-// CHECK1-SAME: (i64 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[NN_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
@@ -1533,7 +1533,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[NN:%.*]]) #[[ATTR9:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[NN:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1545,7 +1545,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175
-// CHECK1-SAME: (i64 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[NN_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
@@ -1573,7 +1573,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR9]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR8]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1649,7 +1649,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6bazzzziPi_l200
-// CHECK1-SAME: (i64 noundef [[VLA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[VLA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
@@ -2036,7 +2036,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l245
-// CHECK1-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
@@ -2101,7 +2101,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l227
-// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
@@ -2167,7 +2167,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l210
-// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
@@ -3079,7 +3079,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l111
-// CHECK3-SAME: (i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK3-SAME: (i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
@@ -3111,7 +3111,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l118
-// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
@@ -3154,7 +3154,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l124
-// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
@@ -3199,7 +3199,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l130
-// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
@@ -3244,7 +3244,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l136
-// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR8]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
@@ -3289,7 +3289,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l160
-// CHECK3-SAME: (i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[D:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], ptr noundef nonnull align 4 dereferenceable(12) [[D:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
@@ -3400,7 +3400,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172
-// CHECK3-SAME: (i32 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[NN_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
@@ -3432,7 +3432,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[NN:%.*]]) #[[ATTR9:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[NN:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3444,7 +3444,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175
-// CHECK3-SAME: (i32 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[NN:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[NN_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
@@ -3472,7 +3472,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR9]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR8]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3547,7 +3547,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6bazzzziPi_l200
-// CHECK3-SAME: (i32 noundef [[VLA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[VLA:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
@@ -3934,7 +3934,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l245
-// CHECK3-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[C:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
@@ -3999,7 +3999,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l227
-// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
@@ -4065,7 +4065,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l210
-// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
@@ -4168,7 +4168,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l111
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[AA:%.*]] = alloca i16, align 2
@@ -4209,7 +4209,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l118
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4264,7 +4264,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l124
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4321,7 +4321,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l130
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4378,7 +4378,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l136
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4435,7 +4435,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l160
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4555,7 +4555,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[NN:%.*]] = alloca i32, align 4
@@ -4596,7 +4596,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[NN:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[NN:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4608,7 +4608,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[NN:%.*]] = alloca i32, align 4
@@ -4645,7 +4645,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR4]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4658,7 +4658,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6bazzzziPi_l200
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DYN_PTR1:%.*]] = alloca ptr, align 8
@@ -4690,7 +4690,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l227
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4771,7 +4771,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l245
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[B:%.*]] = alloca i32, align 4
@@ -4845,7 +4845,7 @@ int bar(int n){
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l210
-// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK9-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -4960,7 +4960,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l111
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[AA:%.*]] = alloca i16, align 2
@@ -5001,7 +5001,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l118
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -5056,7 +5056,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l124
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -5113,7 +5113,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l130
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -5170,7 +5170,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l136
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -5227,7 +5227,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l160
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -5347,7 +5347,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[NN:%.*]] = alloca i32, align 4
@@ -5388,7 +5388,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l172.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[NN:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[NN:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -5400,7 +5400,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[NN:%.*]] = alloca i32, align 4
@@ -5437,7 +5437,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l175.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[NN:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -5450,7 +5450,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6bazzzziPi_l200
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DYN_PTR1:%.*]] = alloca ptr, align 4
@@ -5482,7 +5482,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l227
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
@@ -5563,7 +5563,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l245
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4
@@ -5637,7 +5637,7 @@ int bar(int n){
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l210
-// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] {
+// CHECK11-SAME: (ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
index 317cd2f341b22..77c68ec0ce50c 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
@@ -437,7 +437,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -592,7 +592,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -931,7 +931,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1066,7 +1066,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1514,7 +1514,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1667,7 +1667,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2002,7 +2002,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2135,7 +2135,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2496,7 +2496,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2577,7 +2577,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2719,7 +2719,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR0]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2766,7 +2766,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4:[0-9]+]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3:[0-9]+]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -2774,7 +2774,7 @@ int main() {
// CHECK13: omp.arraycpy.done3:
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP5]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP5]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR3]]
// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -2824,14 +2824,14 @@ int main() {
// CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR2]], i32 0, i32 0
// CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done8:
@@ -2839,7 +2839,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StC1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -2849,7 +2849,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -2864,17 +2864,17 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StD1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK13-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK13-NEXT: ret void
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2929,7 +2929,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -2937,7 +2937,7 @@ int main() {
// CHECK13: omp.arraycpy.done4:
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -2994,14 +2994,14 @@ int main() {
// CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done13:
@@ -3009,12 +3009,12 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK13-NEXT: ret void
//
//
@@ -3055,7 +3055,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR0]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3102,7 +3102,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -3111,7 +3111,7 @@ int main() {
// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META8]], !align [[META9]]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP7]], align 8
// CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
@@ -3160,14 +3160,14 @@ int main() {
// CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done10:
@@ -3175,7 +3175,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -3190,7 +3190,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3246,7 +3246,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -3255,7 +3255,7 @@ int main() {
// CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META8]], !align [[META9]]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP7]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP6]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP7]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP7]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP7]]) #[[ATTR3]]
// CHECK13-NEXT: store ptr [[VAR6]], ptr [[_TMP8]], align 8
// CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
@@ -3310,14 +3310,14 @@ int main() {
// CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done14:
@@ -3325,17 +3325,17 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK13-NEXT: ret void
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StC2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3348,7 +3348,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StD2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3357,7 +3357,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3366,7 +3366,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -3388,7 +3388,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3397,7 +3397,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -3460,7 +3460,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR0]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3507,7 +3507,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4:[0-9]+]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3:[0-9]+]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -3515,7 +3515,7 @@ int main() {
// CHECK15: omp.arraycpy.done3:
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP5]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP5]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR3]]
// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -3563,14 +3563,14 @@ int main() {
// CHECK15-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR2]], i32 0, i32 0
// CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP21]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done8:
@@ -3578,7 +3578,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StC1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -3588,7 +3588,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -3603,17 +3603,17 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StD1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK15-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK15-NEXT: ret void
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3666,7 +3666,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -3674,7 +3674,7 @@ int main() {
// CHECK15: omp.arraycpy.done3:
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP5]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP5]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR3]]
// CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -3729,14 +3729,14 @@ int main() {
// CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR2]], i32 0, i32 0
// CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done11:
@@ -3744,12 +3744,12 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK15-NEXT: ret void
//
//
@@ -3790,7 +3790,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR0]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3837,7 +3837,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -3846,7 +3846,7 @@ int main() {
// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP7]], align 4
// CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
@@ -3893,14 +3893,14 @@ int main() {
// CHECK15-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP21]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done10:
@@ -3908,7 +3908,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -3923,7 +3923,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3977,7 +3977,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -3986,7 +3986,7 @@ int main() {
// CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP6]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP7]], align 4
// CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
@@ -4039,14 +4039,14 @@ int main() {
// CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP21]])
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done12:
@@ -4054,17 +4054,17 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK15-NEXT: ret void
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StC2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4077,7 +4077,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StD2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4086,7 +4086,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4095,7 +4095,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -4117,7 +4117,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4126,7 +4126,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -4192,7 +4192,7 @@ int main() {
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR0]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4273,7 +4273,7 @@ int main() {
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
index a873242b10d0f..77ee09c0c2c11 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
@@ -224,7 +224,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -333,7 +333,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -498,7 +498,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -599,7 +599,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -821,7 +821,7 @@ int main() {
// CHECK5-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
// CHECK5-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK5: omp_offload.failed:
-// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK5: omp_offload.cont:
// CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -832,11 +832,11 @@ int main() {
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP41]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done2:
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK5-NEXT: [[TMP42:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK5-NEXT: ret i32 [[TMP42]]
//
@@ -898,7 +898,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1027,14 +1027,14 @@ int main() {
// CHECK5-NEXT: store i32 [[TMP29]], ptr [[SVAR_ADDR]], align 4
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done12:
@@ -1042,7 +1042,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1182,14 +1182,14 @@ int main() {
// CHECK5-NEXT: store i32 [[TMP26]], ptr [[SVAR_ADDR]], align 4
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done16:
@@ -1202,7 +1202,7 @@ int main() {
// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK5-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK5-NEXT: ret void
//
//
@@ -1297,7 +1297,7 @@ int main() {
// CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
// CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK5: omp_offload.failed:
-// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK5: omp_offload.cont:
// CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1307,11 +1307,11 @@ int main() {
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done2:
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK5-NEXT: [[TMP37:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK5-NEXT: ret i32 [[TMP37]]
//
@@ -1401,7 +1401,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1521,14 +1521,14 @@ int main() {
// CHECK5-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP26]], i64 4, i1 false)
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done11:
@@ -1536,7 +1536,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1671,14 +1671,14 @@ int main() {
// CHECK5-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP25]], i64 4, i1 false)
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done15:
@@ -1691,7 +1691,7 @@ int main() {
// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK5-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK5-NEXT: ret void
//
//
@@ -1835,7 +1835,7 @@ int main() {
// CHECK7-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
// CHECK7-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK7: omp_offload.failed:
-// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK7: omp_offload.cont:
// CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1846,11 +1846,11 @@ int main() {
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP41]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done2:
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK7-NEXT: [[TMP42:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK7-NEXT: ret i32 [[TMP42]]
//
@@ -1912,7 +1912,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2039,14 +2039,14 @@ int main() {
// CHECK7-NEXT: store i32 [[TMP27]], ptr [[SVAR_ADDR]], align 4
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done12:
@@ -2054,7 +2054,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2190,14 +2190,14 @@ int main() {
// CHECK7-NEXT: store i32 [[TMP26]], ptr [[SVAR_ADDR]], align 4
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done14:
@@ -2210,7 +2210,7 @@ int main() {
// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK7-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK7-NEXT: ret void
//
//
@@ -2305,7 +2305,7 @@ int main() {
// CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
// CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK7: omp_offload.failed:
-// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK7: omp_offload.cont:
// CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2315,11 +2315,11 @@ int main() {
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done2:
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK7-NEXT: [[TMP37:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK7-NEXT: ret i32 [[TMP37]]
//
@@ -2409,7 +2409,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2527,14 +2527,14 @@ int main() {
// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP24]], i32 4, i1 false)
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done11:
@@ -2542,7 +2542,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2673,14 +2673,14 @@ int main() {
// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP25]], i32 4, i1 false)
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done13:
@@ -2693,7 +2693,7 @@ int main() {
// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK7-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK7-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
index 42d82fb955f17..e56c0884fa328 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
@@ -144,7 +144,7 @@ int main() {
// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK1-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR3:[0-9]+]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -164,7 +164,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -249,7 +249,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -348,7 +348,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -368,7 +368,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -388,7 +388,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -443,7 +443,7 @@ int main() {
// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK1-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR3]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: ret i32 0
@@ -462,7 +462,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -547,7 +547,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -646,7 +646,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -666,7 +666,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -739,7 +739,7 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK3-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR3:[0-9]+]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR2:[0-9]+]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -759,7 +759,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -842,7 +842,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -939,7 +939,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -959,7 +959,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -979,7 +979,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK3-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -1034,7 +1034,7 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK3-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR3]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: ret i32 0
@@ -1053,7 +1053,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1136,7 +1136,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1233,7 +1233,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1253,7 +1253,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1295,7 +1295,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1380,7 +1380,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1483,7 +1483,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1503,7 +1503,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp.reduction.reduction_func
-// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
+// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
index ff113accabd12..f4f49793f4fa6 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
@@ -389,7 +389,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
index 7e9945b4c82d8..77337d23b170d 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
@@ -435,7 +435,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -597,7 +597,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -943,7 +943,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1085,7 +1085,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1540,7 +1540,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1700,7 +1700,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2042,7 +2042,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2182,7 +2182,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2550,7 +2550,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2638,7 +2638,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3559,7 +3559,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR0]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3606,7 +3606,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4:[0-9]+]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3:[0-9]+]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -3614,7 +3614,7 @@ int main() {
// CHECK13: omp.arraycpy.done3:
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP5]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP5]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR3]]
// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -3671,14 +3671,14 @@ int main() {
// CHECK13-NEXT: store i32 2, ptr [[I]], align 4
// CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK13: .omp.final.done:
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR2]], i32 0, i32 0
// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done8:
@@ -3686,7 +3686,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StC1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3696,7 +3696,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -3711,17 +3711,17 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StD1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK13-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK13-NEXT: ret void
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3776,7 +3776,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -3784,7 +3784,7 @@ int main() {
// CHECK13: omp.arraycpy.done4:
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK13-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -3848,14 +3848,14 @@ int main() {
// CHECK13-NEXT: store i32 2, ptr [[I]], align 4
// CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK13: .omp.final.done:
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done13:
@@ -3863,12 +3863,12 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK13-NEXT: ret void
//
//
@@ -3909,7 +3909,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR0]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3956,7 +3956,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -3965,7 +3965,7 @@ int main() {
// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META8]], !align [[META9]]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP7]], align 8
// CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
@@ -4021,14 +4021,14 @@ int main() {
// CHECK13-NEXT: store i32 2, ptr [[I]], align 4
// CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK13: .omp.final.done:
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done10:
@@ -4036,7 +4036,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -4051,7 +4051,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4107,7 +4107,7 @@ int main() {
// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -4116,7 +4116,7 @@ int main() {
// CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META8]], !align [[META9]]
// CHECK13-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP7]])
// CHECK13-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP6]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP7]])
-// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP7]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP7]]) #[[ATTR3]]
// CHECK13-NEXT: store ptr [[VAR6]], ptr [[_TMP8]], align 8
// CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
@@ -4178,14 +4178,14 @@ int main() {
// CHECK13-NEXT: store i32 2, ptr [[I]], align 4
// CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK13: .omp.final.done:
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2
// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK13: arraydestroy.body:
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK13: arraydestroy.done14:
@@ -4193,17 +4193,17 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK13-NEXT: ret void
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StC2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4216,7 +4216,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN2StD2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4225,7 +4225,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4234,7 +4234,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -4256,7 +4256,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
-// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4265,7 +4265,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St
-// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat {
+// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -4328,7 +4328,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR0]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4375,7 +4375,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4:[0-9]+]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3:[0-9]+]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -4383,7 +4383,7 @@ int main() {
// CHECK15: omp.arraycpy.done3:
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP5]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP5]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR3]]
// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -4438,14 +4438,14 @@ int main() {
// CHECK15-NEXT: store i32 2, ptr [[I]], align 4
// CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK15: .omp.final.done:
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR2]], i32 0, i32 0
// CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done8:
@@ -4453,7 +4453,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StC1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4463,7 +4463,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -4478,17 +4478,17 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StD1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK15-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS1]]) #[[ATTR3]]
// CHECK15-NEXT: ret void
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4541,7 +4541,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -4549,7 +4549,7 @@ int main() {
// CHECK15: omp.arraycpy.done3:
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP5]])
// CHECK15-NEXT: call void @_ZN1SIfEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP5]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP5]]) #[[ATTR3]]
// CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
@@ -4611,14 +4611,14 @@ int main() {
// CHECK15-NEXT: store i32 2, ptr [[I]], align 4
// CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK15: .omp.final.done:
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR4]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR2]], i32 0, i32 0
// CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done11:
@@ -4626,12 +4626,12 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK15-NEXT: ret void
//
//
@@ -4672,7 +4672,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR1]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR0]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4719,7 +4719,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]
@@ -4728,7 +4728,7 @@ int main() {
// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP7]], align 4
// CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
@@ -4782,14 +4782,14 @@ int main() {
// CHECK15-NEXT: store i32 2, ptr [[I]], align 4
// CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK15: .omp.final.done:
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done10:
@@ -4797,7 +4797,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -4812,7 +4812,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l81.omp_outlined.omp_outlined
-// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4866,7 +4866,7 @@ int main() {
// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP]]) #[[ATTR3]]
// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
@@ -4875,7 +4875,7 @@ int main() {
// CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]
// CHECK15-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[AGG_TMP6]])
// CHECK15-NEXT: call void @_ZN1SIiEC1ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP6]], ptr nofreeobj noundef align 4 dereferenceable(8) [[AGG_TMP6]])
-// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[AGG_TMP6]]) #[[ATTR3]]
// CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP7]], align 4
// CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
@@ -4935,14 +4935,14 @@ int main() {
// CHECK15-NEXT: store i32 2, ptr [[I]], align 4
// CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
// CHECK15: .omp.final.done:
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR3]], i32 0, i32 0
// CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK15: arraydestroy.body:
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK15: arraydestroy.done12:
@@ -4950,17 +4950,17 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
+// CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR3]]
// CHECK15-NEXT: ret void
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StC2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4973,7 +4973,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN2StD2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4982,7 +4982,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -4991,7 +4991,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -5013,7 +5013,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
-// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
@@ -5022,7 +5022,7 @@ int main() {
//
//
// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St
-// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 {
+// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], ptr nofreeobj noundef align 4 dereferenceable(8) [[T:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 {
// CHECK15-NEXT: entry:
// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
@@ -5088,7 +5088,7 @@ int main() {
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR0]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -5176,7 +5176,7 @@ int main() {
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
index 1fb8105e57663..1432d4f1a1993 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
@@ -224,7 +224,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -340,7 +340,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -512,7 +512,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -620,7 +620,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -849,7 +849,7 @@ int main() {
// CHECK5-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
// CHECK5-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK5: omp_offload.failed:
-// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK5: omp_offload.cont:
// CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -860,11 +860,11 @@ int main() {
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP41]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done2:
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK5-NEXT: [[TMP42:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK5-NEXT: ret i32 [[TMP42]]
//
@@ -926,7 +926,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1062,14 +1062,14 @@ int main() {
// CHECK5-NEXT: store i32 [[TMP31]], ptr [[SVAR_ADDR]], align 4
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP32]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done12:
@@ -1077,7 +1077,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1224,14 +1224,14 @@ int main() {
// CHECK5-NEXT: store i32 [[TMP28]], ptr [[SVAR_ADDR]], align 4
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done16:
@@ -1244,7 +1244,7 @@ int main() {
// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK5-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK5-NEXT: ret void
//
//
@@ -1339,7 +1339,7 @@ int main() {
// CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
// CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK5: omp_offload.failed:
-// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK5: omp_offload.cont:
// CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1349,11 +1349,11 @@ int main() {
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done2:
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK5-NEXT: [[TMP37:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK5-NEXT: ret i32 [[TMP37]]
//
@@ -1443,7 +1443,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1570,14 +1570,14 @@ int main() {
// CHECK5-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP28]], i64 4, i1 false)
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done11:
@@ -1585,7 +1585,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1727,14 +1727,14 @@ int main() {
// CHECK5-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i64 4, i1 false)
// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
// CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK5: arraydestroy.body:
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
// CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK5: arraydestroy.done15:
@@ -1747,7 +1747,7 @@ int main() {
// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK5-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK5-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK5-NEXT: ret void
//
//
@@ -1891,7 +1891,7 @@ int main() {
// CHECK7-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
// CHECK7-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK7: omp_offload.failed:
-// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK7: omp_offload.cont:
// CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1902,11 +1902,11 @@ int main() {
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP41]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done2:
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK7-NEXT: [[TMP42:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK7-NEXT: ret i32 [[TMP42]]
//
@@ -1968,7 +1968,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2102,14 +2102,14 @@ int main() {
// CHECK7-NEXT: store i32 [[TMP29]], ptr [[SVAR_ADDR]], align 4
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done12:
@@ -2117,7 +2117,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2260,14 +2260,14 @@ int main() {
// CHECK7-NEXT: store i32 [[TMP28]], ptr [[SVAR_ADDR]], align 4
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done14:
@@ -2280,7 +2280,7 @@ int main() {
// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK7-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK7-NEXT: ret void
//
//
@@ -2375,7 +2375,7 @@ int main() {
// CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
// CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK7: omp_offload.failed:
-// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK7: omp_offload.cont:
// CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2385,11 +2385,11 @@ int main() {
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done2:
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK7-NEXT: [[TMP37:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK7-NEXT: ret i32 [[TMP37]]
//
@@ -2479,7 +2479,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2604,14 +2604,14 @@ int main() {
// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP26]], i32 4, i1 false)
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done11:
@@ -2619,7 +2619,7 @@ int main() {
//
//
// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined
-// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK7-NEXT: entry:
// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2757,14 +2757,14 @@ int main() {
// CHECK7-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i32 4, i1 false)
// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK7: arraydestroy.body:
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK7: arraydestroy.done13:
@@ -2777,7 +2777,7 @@ int main() {
// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK7-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK7-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK7-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
index 5ea9026101a25..a0cda2379c4c1 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
@@ -144,7 +144,7 @@ int main() {
// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK1-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR3:[0-9]+]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -164,7 +164,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -256,7 +256,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -362,7 +362,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -382,7 +382,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -402,7 +402,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -457,7 +457,7 @@ int main() {
// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK1-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR3]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: ret i32 0
@@ -476,7 +476,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -568,7 +568,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -674,7 +674,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -694,7 +694,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -767,7 +767,7 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK3-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR3:[0-9]+]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR2:[0-9]+]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -787,7 +787,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -877,7 +877,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -981,7 +981,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1001,7 +1001,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1021,7 +1021,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK3-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -1076,7 +1076,7 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK3-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR3]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: ret i32 0
@@ -1095,7 +1095,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1185,7 +1185,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1289,7 +1289,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1309,7 +1309,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1351,7 +1351,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1443,7 +1443,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1553,7 +1553,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1573,7 +1573,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp.reduction.reduction_func
-// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
+// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
index 42d82fb955f17..e56c0884fa328 100644
--- a/clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
@@ -144,7 +144,7 @@ int main() {
// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK1-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR3:[0-9]+]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -164,7 +164,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -249,7 +249,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -348,7 +348,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -368,7 +368,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -388,7 +388,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -443,7 +443,7 @@ int main() {
// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK1-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR3]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: ret i32 0
@@ -462,7 +462,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -547,7 +547,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -646,7 +646,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -666,7 +666,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -739,7 +739,7 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK3-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR3:[0-9]+]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar, ptr null) #[[ATTR2:[0-9]+]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -759,7 +759,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -842,7 +842,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -939,7 +939,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -959,7 +959,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -979,7 +979,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK3-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -1034,7 +1034,7 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
// CHECK3-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR3]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]], ptr null) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: ret i32 0
@@ -1053,7 +1053,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1136,7 +1136,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1233,7 +1233,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1253,7 +1253,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1295,7 +1295,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1380,7 +1380,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined
-// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1483,7 +1483,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1503,7 +1503,7 @@ int main() {
//
//
// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp.reduction.reduction_func
-// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
+// CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
// CHECK5-NEXT: entry:
// CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/task_codegen.cpp b/clang/test/OpenMP/task_codegen.cpp
index 6690559764ab7..4523b406e3b54 100644
--- a/clang/test/OpenMP/task_codegen.cpp
+++ b/clang/test/OpenMP/task_codegen.cpp
@@ -581,24 +581,24 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK1-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK1-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK1-NEXT: ret i32 0
//
@@ -622,19 +622,19 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK1-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK1-NEXT: ret i32 0
@@ -660,42 +660,42 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK1-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK1-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK1-NEXT: ]
// CHECK1: .untied.done..i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK1-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK1: .untied.jmp..i:
-// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK1-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
-// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
+// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK1: .untied.jmp.1.i:
-// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
+// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
// CHECK1-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK1-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK1-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK1-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK1-NEXT: br label [[CLEANUP_I]]
// CHECK1: cleanup.i:
-// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK1: .omp_outlined..3.exit:
// CHECK1-NEXT: ret i32 0
@@ -721,39 +721,39 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK1-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK1-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK1-NEXT: ]
// CHECK1: .untied.done..i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK1-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK1: .untied.jmp..i:
-// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK1-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44]]
-// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43]]
+// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK1: .untied.jmp.1.i:
-// CHECK1-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK1-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK1-NEXT: br label [[CLEANUP_I]]
// CHECK1: cleanup.i:
-// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK1: .omp_outlined..5.exit:
// CHECK1-NEXT: ret i32 0
@@ -779,39 +779,39 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK1-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK1-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK1-NEXT: ]
// CHECK1: .untied.done..i:
-// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK1-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK1: .untied.jmp..i:
-// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK1-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54]]
-// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53]]
+// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK1: .untied.jmp.1.i:
-// CHECK1-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK1-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK1-NEXT: br label [[CLEANUP_I]]
// CHECK1: cleanup.i:
-// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK1: .omp_outlined..7.exit:
// CHECK1-NEXT: ret i32 0
@@ -836,18 +836,18 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -870,18 +870,18 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -904,18 +904,18 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-NEXT: store i32 3, ptr @a, align 4, !noalias [[META84]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-NEXT: store i32 3, ptr @a, align 4, !noalias [[META83]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -938,19 +938,19 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-NEXT: store i32 4, ptr @a, align 4, !noalias [[META94]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-NEXT: store i32 4, ptr @a, align 4, !noalias [[META93]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK1-NEXT: ret i32 0
//
@@ -990,23 +990,23 @@ void test_transparent()
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_18]], ptr [[TMP3]], i32 0, i32 2
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META104:![0-9]+]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META103]]
// CHECK1-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK1-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
+// CHECK1-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
// CHECK1-NEXT: ret i32 0
//
//
@@ -1082,7 +1082,7 @@ void test_transparent()
// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META115:![0-9]+]]
// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META114]]
@@ -1255,17 +1255,17 @@ void test_transparent()
// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META115:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META118:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META120:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META122:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META124:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
-// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META116:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META119:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META121:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META123:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META125:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
+// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK1-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK1-NEXT: ret i32 0
@@ -1287,7 +1287,7 @@ void test_transparent()
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z6foobarIvEvv.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1297,7 +1297,7 @@ void test_transparent()
// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_single(ptr @[[GLOB1]], i32 [[TMP2]])
@@ -1358,23 +1358,23 @@ void test_transparent()
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_25]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META125:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META128:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META130:![0-9]+]])
-// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META132:![0-9]+]])
-// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META134:![0-9]+]]
-// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: store ptr @.omp_task_privates_map..25, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META134]]
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META126:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META129:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META131:![0-9]+]])
+// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META133:![0-9]+]])
+// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META135:![0-9]+]]
+// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: store ptr @.omp_task_privates_map..25, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META136:![0-9]+]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META135]]
// CHECK1-NEXT: [[TMP13:%.*]] = load double, ptr [[TMP12]], align 8
-// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-NEXT: [[TMP15:%.*]] = load float, ptr [[TMP14]], align 4
// CHECK1-NEXT: [[CONV_I:%.*]] = fpext float [[TMP15]] to double
// CHECK1-NEXT: [[ADD_I:%.*]] = fadd double [[CONV_I]], [[TMP13]]
@@ -1749,24 +1749,24 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK1-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK1-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK1-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK1-51-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK1-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK1-51-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK1-51-NEXT: ret i32 0
//
@@ -1790,19 +1790,19 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK1-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK1-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK1-51-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK1-51-NEXT: ret i32 0
@@ -1828,42 +1828,42 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK1-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK1-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK1-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK1-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK1-51-NEXT: ]
// CHECK1-51: .untied.done..i:
-// CHECK1-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK1-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK1-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK1-51: .untied.jmp..i:
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK1-51-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
-// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
+// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK1-51-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK1-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK1-51: .untied.jmp.1.i:
-// CHECK1-51-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
+// CHECK1-51-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
// CHECK1-51-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK1-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK1-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK1-51-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK1-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK1-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK1-51-NEXT: br label [[CLEANUP_I]]
// CHECK1-51: cleanup.i:
-// CHECK1-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK1-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK1-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK1-51: .omp_outlined..3.exit:
// CHECK1-51-NEXT: ret i32 0
@@ -1889,39 +1889,39 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK1-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK1-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK1-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK1-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK1-51-NEXT: ]
// CHECK1-51: .untied.done..i:
-// CHECK1-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK1-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK1-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK1-51: .untied.jmp..i:
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK1-51-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44]]
-// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43]]
+// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK1-51-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK1-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK1-51: .untied.jmp.1.i:
-// CHECK1-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK1-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK1-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK1-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK1-51-NEXT: br label [[CLEANUP_I]]
// CHECK1-51: cleanup.i:
-// CHECK1-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK1-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK1-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK1-51: .omp_outlined..5.exit:
// CHECK1-51-NEXT: ret i32 0
@@ -1947,39 +1947,39 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK1-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK1-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK1-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK1-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK1-51-NEXT: ]
// CHECK1-51: .untied.done..i:
-// CHECK1-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK1-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK1-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK1-51: .untied.jmp..i:
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK1-51-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54]]
-// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53]]
+// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK1-51-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK1-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK1-51: .untied.jmp.1.i:
-// CHECK1-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK1-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK1-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK1-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK1-51-NEXT: br label [[CLEANUP_I]]
// CHECK1-51: cleanup.i:
-// CHECK1-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK1-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK1-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK1-51: .omp_outlined..7.exit:
// CHECK1-51-NEXT: ret i32 0
@@ -2004,18 +2004,18 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK1-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK1-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK1-51-NEXT: ret i32 0
//
//
@@ -2038,18 +2038,18 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK1-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK1-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK1-51-NEXT: ret i32 0
//
//
@@ -2072,18 +2072,18 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK1-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META84]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK1-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META83]]
// CHECK1-51-NEXT: ret i32 0
//
//
@@ -2106,18 +2106,18 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK1-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META94]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK1-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META93]]
// CHECK1-51-NEXT: ret i32 0
//
//
@@ -2140,19 +2140,19 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK1-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK1-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-51-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK1-51-NEXT: ret i32 0
//
@@ -2192,23 +2192,23 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_20]], ptr [[TMP3]], i32 0, i32 2
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META105:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META108:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META110:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META112:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META114:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META104:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META107:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META109:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META111:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META113:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META114:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META113]]
// CHECK1-51-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK1-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META114]]
+// CHECK1-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META113]]
// CHECK1-51-NEXT: ret i32 0
//
//
@@ -2284,7 +2284,7 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META125:![0-9]+]]
// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META124]]
// CHECK1-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META124]]
// CHECK1-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META124]]
@@ -2457,17 +2457,17 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META125:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META128:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META130:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META132:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META134:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META126:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META129:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META131:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META133:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META135:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK1-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK1-51-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK1-51-NEXT: ret i32 0
@@ -2489,7 +2489,7 @@ void test_transparent()
//
//
// CHECK1-51-LABEL: define {{[^@]+}}@_Z6foobarIvEvv.omp_outlined
-// CHECK1-51-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK1-51-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK1-51-NEXT: entry:
// CHECK1-51-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-51-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2499,7 +2499,7 @@ void test_transparent()
// CHECK1-51-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-51-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-51-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK1-51-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-51-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-51-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-51-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK1-51-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_single(ptr @[[GLOB1]], i32 [[TMP2]])
@@ -2560,23 +2560,23 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_27]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META135:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META138:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META140:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META142:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META144:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..27, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META144]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META136:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META139:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META141:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META143:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META145:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..27, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META146:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META145]]
// CHECK1-51-NEXT: [[TMP13:%.*]] = load double, ptr [[TMP12]], align 8
-// CHECK1-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK1-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK1-51-NEXT: [[TMP15:%.*]] = load float, ptr [[TMP14]], align 4
// CHECK1-51-NEXT: [[CONV_I:%.*]] = fpext float [[TMP15]] to double
// CHECK1-51-NEXT: [[ADD_I:%.*]] = fadd double [[CONV_I]], [[TMP13]]
@@ -2759,21 +2759,21 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_30]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META147:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META150:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META149:![0-9]+]])
// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META152:![0-9]+]])
// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META154:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META156:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..30, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META156]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META156:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META158:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..30, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META159:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META158]]
// CHECK1-51-NEXT: store i32 13, ptr [[TMP12]], align 4
// CHECK1-51-NEXT: ret i32 0
//
@@ -2813,21 +2813,21 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_33]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META157:![0-9]+]])
// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META160:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META162:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META164:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META166:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..33, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META166]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META163:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META165:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META167:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META169:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..33, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META170:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META169]]
// CHECK1-51-NEXT: store i32 14, ptr [[TMP12]], align 4
// CHECK1-51-NEXT: ret i32 0
//
@@ -2867,21 +2867,21 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_36]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META167:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META170:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META172:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META171:![0-9]+]])
// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META174:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META176:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..36, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META176]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META176:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META178:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META180:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..36, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META181:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META180]]
// CHECK1-51-NEXT: store i32 15, ptr [[TMP12]], align 4
// CHECK1-51-NEXT: ret i32 0
//
@@ -2921,21 +2921,21 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_39]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META177:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META180:![0-9]+]])
// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META182:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META184:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META186:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..39, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META186]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META185:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META187:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META189:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META191:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..39, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META192:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META191]]
// CHECK1-51-NEXT: store i32 16, ptr [[TMP12]], align 4
// CHECK1-51-NEXT: ret i32 0
//
@@ -2975,21 +2975,21 @@ void test_transparent()
// CHECK1-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK1-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_42]], ptr [[TMP3]], i32 0, i32 1
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META187:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META190:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META192:![0-9]+]])
-// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META194:![0-9]+]])
-// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META196:![0-9]+]]
-// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..42, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META196]]
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META193:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META196:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META198:![0-9]+]])
+// CHECK1-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META200:![0-9]+]])
+// CHECK1-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META202:![0-9]+]]
+// CHECK1-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: store ptr @.omp_task_privates_map..42, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK1-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META203:![0-9]+]]
+// CHECK1-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META202]]
// CHECK1-51-NEXT: store i32 17, ptr [[TMP12]], align 4
// CHECK1-51-NEXT: ret i32 0
//
@@ -3312,24 +3312,24 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK2-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK2-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK2-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK2-NEXT: ret i32 0
//
@@ -3353,19 +3353,19 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK2-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK2-NEXT: ret i32 0
@@ -3391,42 +3391,42 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK2-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK2-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK2-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK2-NEXT: ]
// CHECK2: .untied.done..i:
-// CHECK2-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK2-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK2-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK2: .untied.jmp..i:
-// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK2-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
-// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
+// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK2: .untied.jmp.1.i:
-// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
+// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
// CHECK2-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK2-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK2-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK2-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK2-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK2-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK2-NEXT: br label [[CLEANUP_I]]
// CHECK2: cleanup.i:
-// CHECK2-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK2-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK2: .omp_outlined..3.exit:
// CHECK2-NEXT: ret i32 0
@@ -3452,39 +3452,39 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK2-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK2-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK2-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK2-NEXT: ]
// CHECK2: .untied.done..i:
-// CHECK2-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK2-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK2-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK2: .untied.jmp..i:
-// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK2-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44]]
-// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43]]
+// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK2: .untied.jmp.1.i:
-// CHECK2-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK2-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK2-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK2-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK2-NEXT: br label [[CLEANUP_I]]
// CHECK2: cleanup.i:
-// CHECK2-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK2-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK2: .omp_outlined..5.exit:
// CHECK2-NEXT: ret i32 0
@@ -3510,39 +3510,39 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK2-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK2-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK2-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK2-NEXT: ]
// CHECK2: .untied.done..i:
-// CHECK2-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK2-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK2-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK2: .untied.jmp..i:
-// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK2-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54]]
-// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53]]
+// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK2: .untied.jmp.1.i:
-// CHECK2-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK2-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK2-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK2-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK2-NEXT: br label [[CLEANUP_I]]
// CHECK2: cleanup.i:
-// CHECK2-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK2-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK2-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK2: .omp_outlined..7.exit:
// CHECK2-NEXT: ret i32 0
@@ -3567,18 +3567,18 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK2-NEXT: ret i32 0
//
//
@@ -3601,18 +3601,18 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK2-NEXT: ret i32 0
//
//
@@ -3635,18 +3635,18 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-NEXT: store i32 3, ptr @a, align 4, !noalias [[META84]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-NEXT: store i32 3, ptr @a, align 4, !noalias [[META83]]
// CHECK2-NEXT: ret i32 0
//
//
@@ -3669,19 +3669,19 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-NEXT: store i32 4, ptr @a, align 4, !noalias [[META94]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-NEXT: store i32 4, ptr @a, align 4, !noalias [[META93]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK2-NEXT: ret i32 0
//
@@ -3721,23 +3721,23 @@ void test_transparent()
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_18]], ptr [[TMP3]], i32 0, i32 2
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META104:![0-9]+]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META103]]
// CHECK2-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK2-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
+// CHECK2-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
// CHECK2-NEXT: ret i32 0
//
//
@@ -3813,7 +3813,7 @@ void test_transparent()
// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK2-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META115:![0-9]+]]
// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK2-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META114]]
@@ -3986,17 +3986,17 @@ void test_transparent()
// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META115:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META118:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META120:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META122:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META124:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
-// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META116:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META119:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META121:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META123:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META125:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK2-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
+// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK2-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK2-NEXT: ret i32 0
@@ -4018,7 +4018,7 @@ void test_transparent()
//
//
// CHECK2-LABEL: define {{[^@]+}}@_Z6foobarIvEvv.omp_outlined
-// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4028,7 +4028,7 @@ void test_transparent()
// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_single(ptr @[[GLOB1]], i32 [[TMP2]])
@@ -4089,23 +4089,23 @@ void test_transparent()
// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_25]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META125:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META128:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META130:![0-9]+]])
-// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META132:![0-9]+]])
-// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META134:![0-9]+]]
-// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: store ptr @.omp_task_privates_map..25, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META134]]
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META126:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META129:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META131:![0-9]+]])
+// CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META133:![0-9]+]])
+// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META135:![0-9]+]]
+// CHECK2-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: store ptr @.omp_task_privates_map..25, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META136:![0-9]+]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META135]]
// CHECK2-NEXT: [[TMP13:%.*]] = load double, ptr [[TMP12]], align 8
-// CHECK2-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-NEXT: [[TMP15:%.*]] = load float, ptr [[TMP14]], align 4
// CHECK2-NEXT: [[CONV_I:%.*]] = fpext float [[TMP15]] to double
// CHECK2-NEXT: [[ADD_I:%.*]] = fadd double [[CONV_I]], [[TMP13]]
@@ -4480,24 +4480,24 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK2-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK2-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK2-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK2-51-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK2-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK2-51-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK2-51-NEXT: ret i32 0
//
@@ -4521,19 +4521,19 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK2-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK2-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK2-51-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK2-51-NEXT: ret i32 0
@@ -4559,42 +4559,42 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK2-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK2-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK2-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK2-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK2-51-NEXT: ]
// CHECK2-51: .untied.done..i:
-// CHECK2-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK2-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK2-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK2-51: .untied.jmp..i:
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK2-51-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
-// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
+// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK2-51-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK2-51: .untied.jmp.1.i:
-// CHECK2-51-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34]]
+// CHECK2-51-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33]]
// CHECK2-51-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK2-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK2-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK2-51-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.var)
-// CHECK2-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK2-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK2-51-NEXT: br label [[CLEANUP_I]]
// CHECK2-51: cleanup.i:
-// CHECK2-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK2-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK2-51: .omp_outlined..3.exit:
// CHECK2-51-NEXT: ret i32 0
@@ -4620,39 +4620,39 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK2-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK2-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK2-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK2-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK2-51-NEXT: ]
// CHECK2-51: .untied.done..i:
-// CHECK2-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK2-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK2-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK2-51: .untied.jmp..i:
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK2-51-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44]]
-// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43]]
+// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK2-51-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK2-51: .untied.jmp.1.i:
-// CHECK2-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK2-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK2-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK2-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK2-51-NEXT: br label [[CLEANUP_I]]
// CHECK2-51: cleanup.i:
-// CHECK2-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK2-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK2-51: .omp_outlined..5.exit:
// CHECK2-51-NEXT: ret i32 0
@@ -4678,39 +4678,39 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK2-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK2-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK2-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK2-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK2-51-NEXT: ]
// CHECK2-51: .untied.done..i:
-// CHECK2-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK2-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK2-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK2-51: .untied.jmp..i:
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK2-51-NEXT: store i32 1, ptr [[TMP11]], align 4
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54]]
-// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53]]
+// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK2-51-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP12]], ptr [[TMP13]])
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK2-51: .untied.jmp.1.i:
-// CHECK2-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK2-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK2-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK2-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK2-51-NEXT: br label [[CLEANUP_I]]
// CHECK2-51: cleanup.i:
-// CHECK2-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK2-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK2-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK2-51: .omp_outlined..7.exit:
// CHECK2-51-NEXT: ret i32 0
@@ -4735,18 +4735,18 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK2-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK2-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK2-51-NEXT: ret i32 0
//
//
@@ -4769,18 +4769,18 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK2-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK2-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK2-51-NEXT: ret i32 0
//
//
@@ -4803,18 +4803,18 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK2-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META84]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK2-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META83]]
// CHECK2-51-NEXT: ret i32 0
//
//
@@ -4837,18 +4837,18 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK2-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META94]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK2-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META93]]
// CHECK2-51-NEXT: ret i32 0
//
//
@@ -4871,19 +4871,19 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK2-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK2-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-51-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK2-51-NEXT: ret i32 0
//
@@ -4923,23 +4923,23 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_20]], ptr [[TMP3]], i32 0, i32 2
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META105:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META108:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META110:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META112:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META114:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META104:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META107:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META109:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META111:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META113:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META114:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META113]]
// CHECK2-51-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK2-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META114]]
+// CHECK2-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META113]]
// CHECK2-51-NEXT: ret i32 0
//
//
@@ -5015,7 +5015,7 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META125:![0-9]+]]
// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META124]]
// CHECK2-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META124]]
// CHECK2-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META124]]
@@ -5188,17 +5188,17 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META125:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META128:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META130:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META132:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META134:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META126:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META129:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META131:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META133:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META135:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK2-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK2-51-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK2-51-NEXT: ret i32 0
@@ -5220,7 +5220,7 @@ void test_transparent()
//
//
// CHECK2-51-LABEL: define {{[^@]+}}@_Z6foobarIvEvv.omp_outlined
-// CHECK2-51-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
+// CHECK2-51-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
// CHECK2-51-NEXT: entry:
// CHECK2-51-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK2-51-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -5230,7 +5230,7 @@ void test_transparent()
// CHECK2-51-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK2-51-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK2-51-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
-// CHECK2-51-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-51-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-51-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK2-51-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK2-51-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_single(ptr @[[GLOB1]], i32 [[TMP2]])
@@ -5291,23 +5291,23 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_27]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META135:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META138:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META140:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META142:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META144:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..27, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META144]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META136:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META139:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META141:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META143:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META145:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..27, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META146:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META145]]
// CHECK2-51-NEXT: [[TMP13:%.*]] = load double, ptr [[TMP12]], align 8
-// CHECK2-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK2-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP9]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK2-51-NEXT: [[TMP15:%.*]] = load float, ptr [[TMP14]], align 4
// CHECK2-51-NEXT: [[CONV_I:%.*]] = fpext float [[TMP15]] to double
// CHECK2-51-NEXT: [[ADD_I:%.*]] = fadd double [[CONV_I]], [[TMP13]]
@@ -5490,21 +5490,21 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_30]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META147:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META150:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META149:![0-9]+]])
// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META152:![0-9]+]])
// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META154:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META156:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..30, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META156]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META156]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META156:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META158:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..30, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META158]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META159:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META158]]
// CHECK2-51-NEXT: store i32 13, ptr [[TMP12]], align 4
// CHECK2-51-NEXT: ret i32 0
//
@@ -5544,21 +5544,21 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_33]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META157:![0-9]+]])
// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META160:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META162:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META164:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META166:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..33, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META166]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META166]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META163:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META165:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META167:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META169:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..33, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META169]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META170:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META169]]
// CHECK2-51-NEXT: store i32 14, ptr [[TMP12]], align 4
// CHECK2-51-NEXT: ret i32 0
//
@@ -5598,21 +5598,21 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_36]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META167:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META170:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META172:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META171:![0-9]+]])
// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META174:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META176:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..36, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META176]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META176]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META176:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META178:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META180:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..36, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META180]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META181:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META180]]
// CHECK2-51-NEXT: store i32 15, ptr [[TMP12]], align 4
// CHECK2-51-NEXT: ret i32 0
//
@@ -5652,21 +5652,21 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_39]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META177:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META180:![0-9]+]])
// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META182:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META184:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META186:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..39, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META186]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META186]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META185:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META187:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META189:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META191:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..39, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META191]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META192:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META191]]
// CHECK2-51-NEXT: store i32 16, ptr [[TMP12]], align 4
// CHECK2-51-NEXT: ret i32 0
//
@@ -5706,21 +5706,21 @@ void test_transparent()
// CHECK2-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK2-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK2-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_42]], ptr [[TMP3]], i32 0, i32 1
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META187:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META190:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META192:![0-9]+]])
-// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META194:![0-9]+]])
-// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META196:![0-9]+]]
-// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..42, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META196]]
-// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META196]]
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META193:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META196:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META198:![0-9]+]])
+// CHECK2-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META200:![0-9]+]])
+// CHECK2-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META202:![0-9]+]]
+// CHECK2-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: store ptr @.omp_task_privates_map..42, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META202]]
+// CHECK2-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META203:![0-9]+]]
+// CHECK2-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META202]]
// CHECK2-51-NEXT: store i32 17, ptr [[TMP12]], align 4
// CHECK2-51-NEXT: ret i32 0
//
@@ -6062,24 +6062,24 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK3-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK3-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK3-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK3-NEXT: ret i32 0
//
@@ -6103,19 +6103,19 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK3-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK3-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK3-NEXT: ret i32 0
@@ -6141,42 +6141,42 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK3-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK3-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK3-NEXT: ]
// CHECK3: .untied.done..i:
-// CHECK3-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK3-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK3-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK3: .untied.jmp..i:
-// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK3-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK3-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB7]])
-// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK3: .untied.jmp.1.i:
// CHECK3-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK3-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK3-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK3-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK3-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK3-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK3-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK3-NEXT: br label [[CLEANUP_I]]
// CHECK3: cleanup.i:
-// CHECK3-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK3-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK3: .omp_outlined..3.exit:
// CHECK3-NEXT: ret i32 0
@@ -6202,39 +6202,39 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK3-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK3-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK3-NEXT: ]
// CHECK3: .untied.done..i:
-// CHECK3-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK3-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK3-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK3: .untied.jmp..i:
-// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK3-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK3-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB9]])
-// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK3: .untied.jmp.1.i:
-// CHECK3-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK3-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK3-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK3-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK3-NEXT: br label [[CLEANUP_I]]
// CHECK3: cleanup.i:
-// CHECK3-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK3-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK3: .omp_outlined..5.exit:
// CHECK3-NEXT: ret i32 0
@@ -6260,39 +6260,39 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK3-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK3-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK3-NEXT: ]
// CHECK3: .untied.done..i:
-// CHECK3-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK3-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK3-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK3: .untied.jmp..i:
-// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK3-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK3-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB11]])
-// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK3: .untied.jmp.1.i:
-// CHECK3-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK3-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK3-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK3-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK3-NEXT: br label [[CLEANUP_I]]
// CHECK3: cleanup.i:
-// CHECK3-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK3-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK3-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK3: .omp_outlined..7.exit:
// CHECK3-NEXT: ret i32 0
@@ -6317,18 +6317,18 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK3-NEXT: ret i32 0
//
//
@@ -6351,18 +6351,18 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK3-NEXT: ret i32 0
//
//
@@ -6385,18 +6385,18 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-NEXT: store i32 3, ptr @a, align 4, !noalias [[META84]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-NEXT: store i32 3, ptr @a, align 4, !noalias [[META83]]
// CHECK3-NEXT: ret i32 0
//
//
@@ -6419,19 +6419,19 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-NEXT: store i32 4, ptr @a, align 4, !noalias [[META94]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-NEXT: store i32 4, ptr @a, align 4, !noalias [[META93]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK3-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK3-NEXT: ret i32 0
//
@@ -6471,23 +6471,23 @@ void test_transparent()
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_18]], ptr [[TMP3]], i32 0, i32 2
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META104:![0-9]+]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META103]]
// CHECK3-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK3-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
+// CHECK3-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
// CHECK3-NEXT: ret i32 0
//
//
@@ -6565,7 +6565,7 @@ void test_transparent()
// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK3-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META115:![0-9]+]]
// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META114]]
@@ -6725,17 +6725,17 @@ void test_transparent()
// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META115:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META118:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META120:![0-9]+]])
-// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META122:![0-9]+]])
-// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META124:![0-9]+]]
-// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
-// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META116:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META119:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META121:![0-9]+]])
+// CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META123:![0-9]+]])
+// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META125:![0-9]+]]
+// CHECK3-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK3-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK3-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK3-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
+// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK3-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK3-NEXT: ret i32 0
@@ -7078,24 +7078,24 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK4-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK4-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK4-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK4-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK4-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK4-NEXT: ret i32 0
//
@@ -7119,19 +7119,19 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK4-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK4-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK4-NEXT: ret i32 0
@@ -7157,42 +7157,42 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK4-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK4-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK4-NEXT: ]
// CHECK4: .untied.done..i:
-// CHECK4-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK4-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK4-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK4: .untied.jmp..i:
-// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK4-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK4-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB7]])
-// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK4-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK4: .untied.jmp.1.i:
// CHECK4-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK4-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK4-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK4-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK4-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK4-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK4-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK4-NEXT: br label [[CLEANUP_I]]
// CHECK4: cleanup.i:
-// CHECK4-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK4-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK4: .omp_outlined..3.exit:
// CHECK4-NEXT: ret i32 0
@@ -7218,39 +7218,39 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK4-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK4-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK4-NEXT: ]
// CHECK4: .untied.done..i:
-// CHECK4-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK4-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK4-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK4: .untied.jmp..i:
-// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK4-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK4-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB9]])
-// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK4-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK4: .untied.jmp.1.i:
-// CHECK4-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK4-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK4-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK4-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK4-NEXT: br label [[CLEANUP_I]]
// CHECK4: cleanup.i:
-// CHECK4-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK4-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK4: .omp_outlined..5.exit:
// CHECK4-NEXT: ret i32 0
@@ -7276,39 +7276,39 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK4-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK4-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK4-NEXT: ]
// CHECK4: .untied.done..i:
-// CHECK4-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK4-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK4-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK4: .untied.jmp..i:
-// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK4-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK4-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB11]])
-// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK4-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK4: .untied.jmp.1.i:
-// CHECK4-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK4-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK4-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK4-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK4-NEXT: br label [[CLEANUP_I]]
// CHECK4: cleanup.i:
-// CHECK4-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK4-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK4-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK4: .omp_outlined..7.exit:
// CHECK4-NEXT: ret i32 0
@@ -7333,18 +7333,18 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK4-NEXT: ret i32 0
//
//
@@ -7367,18 +7367,18 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK4-NEXT: ret i32 0
//
//
@@ -7401,18 +7401,18 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-NEXT: store i32 3, ptr @a, align 4, !noalias [[META84]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-NEXT: store i32 3, ptr @a, align 4, !noalias [[META83]]
// CHECK4-NEXT: ret i32 0
//
//
@@ -7435,19 +7435,19 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-NEXT: store i32 4, ptr @a, align 4, !noalias [[META94]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-NEXT: store i32 4, ptr @a, align 4, !noalias [[META93]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK4-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK4-NEXT: ret i32 0
//
@@ -7487,23 +7487,23 @@ void test_transparent()
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_18]], ptr [[TMP3]], i32 0, i32 2
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META104:![0-9]+]]
+// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META103]]
// CHECK4-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK4-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
+// CHECK4-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
// CHECK4-NEXT: ret i32 0
//
//
@@ -7581,7 +7581,7 @@ void test_transparent()
// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK4-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK4-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META115:![0-9]+]]
// CHECK4-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META114]]
@@ -7741,17 +7741,17 @@ void test_transparent()
// CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META115:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META118:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META120:![0-9]+]])
-// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META122:![0-9]+]])
-// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META124:![0-9]+]]
-// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META116:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META119:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META121:![0-9]+]])
+// CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META123:![0-9]+]])
+// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META125:![0-9]+]]
+// CHECK4-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK4-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK4-NEXT: ret i32 0
@@ -8144,24 +8144,24 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK3-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK3-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK3-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK3-51-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK3-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK3-51-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK3-51-NEXT: ret i32 0
//
@@ -8185,19 +8185,19 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK3-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK3-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK3-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK3-51-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK3-51-NEXT: ret i32 0
@@ -8223,42 +8223,42 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK3-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK3-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK3-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK3-51-NEXT: ]
// CHECK3-51: .untied.done..i:
-// CHECK3-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK3-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK3-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK3-51: .untied.jmp..i:
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK3-51-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK3-51-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB7]])
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK3-51-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK3-51: .untied.jmp.1.i:
// CHECK3-51-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK3-51-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK3-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK3-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK3-51-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK3-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK3-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK3-51-NEXT: br label [[CLEANUP_I]]
// CHECK3-51: cleanup.i:
-// CHECK3-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK3-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK3-51: .omp_outlined..3.exit:
// CHECK3-51-NEXT: ret i32 0
@@ -8284,39 +8284,39 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK3-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK3-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK3-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK3-51-NEXT: ]
// CHECK3-51: .untied.done..i:
-// CHECK3-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK3-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK3-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK3-51: .untied.jmp..i:
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK3-51-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK3-51-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB9]])
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK3-51-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK3-51: .untied.jmp.1.i:
-// CHECK3-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK3-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK3-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK3-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK3-51-NEXT: br label [[CLEANUP_I]]
// CHECK3-51: cleanup.i:
-// CHECK3-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK3-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK3-51: .omp_outlined..5.exit:
// CHECK3-51-NEXT: ret i32 0
@@ -8342,39 +8342,39 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK3-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK3-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK3-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK3-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK3-51-NEXT: ]
// CHECK3-51: .untied.done..i:
-// CHECK3-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK3-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK3-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK3-51: .untied.jmp..i:
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK3-51-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK3-51-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB11]])
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK3-51-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK3-51: .untied.jmp.1.i:
-// CHECK3-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK3-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK3-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK3-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK3-51-NEXT: br label [[CLEANUP_I]]
// CHECK3-51: cleanup.i:
-// CHECK3-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK3-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK3-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK3-51: .omp_outlined..7.exit:
// CHECK3-51-NEXT: ret i32 0
@@ -8399,18 +8399,18 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK3-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK3-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK3-51-NEXT: ret i32 0
//
//
@@ -8433,18 +8433,18 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK3-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK3-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK3-51-NEXT: ret i32 0
//
//
@@ -8467,18 +8467,18 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK3-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META84]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK3-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META83]]
// CHECK3-51-NEXT: ret i32 0
//
//
@@ -8501,18 +8501,18 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK3-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META94]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK3-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META93]]
// CHECK3-51-NEXT: ret i32 0
//
//
@@ -8535,19 +8535,19 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK3-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK3-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK3-51-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK3-51-NEXT: ret i32 0
//
@@ -8587,23 +8587,23 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK3-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_20]], ptr [[TMP3]], i32 0, i32 2
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META105:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META108:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META110:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META112:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META114:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META104:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META107:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META109:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META111:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META113:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META113]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META114:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META113]]
// CHECK3-51-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK3-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META114]]
+// CHECK3-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META113]]
// CHECK3-51-NEXT: ret i32 0
//
//
@@ -8681,7 +8681,7 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META125:![0-9]+]]
// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META124]]
// CHECK3-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META124]]
// CHECK3-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META124]]
@@ -8841,17 +8841,17 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META125:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META128:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META130:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META132:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META134:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META126:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META129:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META131:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META133:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META135:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK3-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK3-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK3-51-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK3-51-NEXT: ret i32 0
@@ -9040,21 +9040,21 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK3-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_27]], ptr [[TMP3]], i32 0, i32 1
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META135:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META138:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META140:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META142:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META144:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..27, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META144]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META136:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META139:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META141:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META143:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META145:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..27, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META146:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META145]]
// CHECK3-51-NEXT: store i32 13, ptr [[TMP12]], align 4
// CHECK3-51-NEXT: ret i32 0
//
@@ -9094,21 +9094,21 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK3-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_30]], ptr [[TMP3]], i32 0, i32 1
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META145:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META148:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META147:![0-9]+]])
// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META150:![0-9]+]])
// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META152:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META154:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..30, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META154]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META154:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META156:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..30, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META156]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META157:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META156]]
// CHECK3-51-NEXT: store i32 14, ptr [[TMP12]], align 4
// CHECK3-51-NEXT: ret i32 0
//
@@ -9148,21 +9148,21 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK3-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_33]], ptr [[TMP3]], i32 0, i32 1
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META155:![0-9]+]])
// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META158:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META160:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META162:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META164:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..33, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META164]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META161:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META163:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META165:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META167:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..33, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META167]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META168:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META167]]
// CHECK3-51-NEXT: store i32 15, ptr [[TMP12]], align 4
// CHECK3-51-NEXT: ret i32 0
//
@@ -9202,21 +9202,21 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK3-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_36]], ptr [[TMP3]], i32 0, i32 1
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META165:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META168:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META170:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META169:![0-9]+]])
// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META172:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META174:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..36, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META174]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META174:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META176:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META178:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..36, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META178]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META179:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META178]]
// CHECK3-51-NEXT: store i32 16, ptr [[TMP12]], align 4
// CHECK3-51-NEXT: ret i32 0
//
@@ -9256,21 +9256,21 @@ void test_transparent()
// CHECK3-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK3-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK3-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_39]], ptr [[TMP3]], i32 0, i32 1
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META175:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META178:![0-9]+]])
// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META180:![0-9]+]])
-// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META182:![0-9]+]])
-// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META184:![0-9]+]]
-// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..39, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META184]]
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META183:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META185:![0-9]+]])
+// CHECK3-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META187:![0-9]+]])
+// CHECK3-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META189:![0-9]+]]
+// CHECK3-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: store ptr @.omp_task_privates_map..39, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META189]]
+// CHECK3-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META190:![0-9]+]]
+// CHECK3-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META189]]
// CHECK3-51-NEXT: store i32 17, ptr [[TMP12]], align 4
// CHECK3-51-NEXT: ret i32 0
//
@@ -9612,24 +9612,24 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK4-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK4-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK4-51-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK4-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK4-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK4-51-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK4-51-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK4-51-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK4-51-NEXT: ret i32 0
//
@@ -9653,19 +9653,19 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK4-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK4-51-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK4-51-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK4-51-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK4-51-NEXT: ret i32 0
@@ -9691,42 +9691,42 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK4-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK4-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK4-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK4-51-NEXT: ]
// CHECK4-51: .untied.done..i:
-// CHECK4-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK4-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK4-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK4-51: .untied.jmp..i:
-// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK4-51-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK4-51-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB7]])
-// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK4-51-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK4-51: .untied.jmp.1.i:
// CHECK4-51-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK4-51-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK4-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK4-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK4-51-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK4-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK4-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK4-51-NEXT: br label [[CLEANUP_I]]
// CHECK4-51: cleanup.i:
-// CHECK4-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK4-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK4-51: .omp_outlined..3.exit:
// CHECK4-51-NEXT: ret i32 0
@@ -9752,39 +9752,39 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK4-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK4-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK4-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK4-51-NEXT: ]
// CHECK4-51: .untied.done..i:
-// CHECK4-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK4-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK4-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK4-51: .untied.jmp..i:
-// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK4-51-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK4-51-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB9]])
-// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK4-51-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK4-51: .untied.jmp.1.i:
-// CHECK4-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK4-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK4-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK4-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK4-51-NEXT: br label [[CLEANUP_I]]
// CHECK4-51: cleanup.i:
-// CHECK4-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK4-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK4-51: .omp_outlined..5.exit:
// CHECK4-51-NEXT: ret i32 0
@@ -9810,39 +9810,39 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK4-51-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK4-51-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK4-51-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK4-51-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK4-51-NEXT: ]
// CHECK4-51: .untied.done..i:
-// CHECK4-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK4-51-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK4-51-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK4-51: .untied.jmp..i:
-// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK4-51-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK4-51-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB11]])
-// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK4-51-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK4-51: .untied.jmp.1.i:
-// CHECK4-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK4-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK4-51-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK4-51-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK4-51-NEXT: br label [[CLEANUP_I]]
// CHECK4-51: cleanup.i:
-// CHECK4-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK4-51-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK4-51-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK4-51: .omp_outlined..7.exit:
// CHECK4-51-NEXT: ret i32 0
@@ -9867,18 +9867,18 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK4-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK4-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK4-51-NEXT: ret i32 0
//
//
@@ -9901,18 +9901,18 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK4-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK4-51-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK4-51-NEXT: ret i32 0
//
//
@@ -9935,18 +9935,18 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK4-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META84]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK4-51-NEXT: store i32 3, ptr @a, align 4, !noalias [[META83]]
// CHECK4-51-NEXT: ret i32 0
//
//
@@ -9969,19 +9969,19 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK4-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META94]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK4-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META93]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK4-51-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK4-51-NEXT: ret i32 0
//
@@ -10021,23 +10021,23 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK4-51-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_18]], ptr [[TMP3]], i32 0, i32 2
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK4-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK4-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META104:![0-9]+]]
+// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META103]]
// CHECK4-51-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK4-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
+// CHECK4-51-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
// CHECK4-51-NEXT: ret i32 0
//
//
@@ -10115,7 +10115,7 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-51-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK4-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK4-51-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META115:![0-9]+]]
// CHECK4-51-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK4-51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META114]]
@@ -10275,17 +10275,17 @@ void test_transparent()
// CHECK4-51-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK4-51-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK4-51-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META115:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META118:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META120:![0-9]+]])
-// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META122:![0-9]+]])
-// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META124:![0-9]+]]
-// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
-// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META116:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META119:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META121:![0-9]+]])
+// CHECK4-51-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META123:![0-9]+]])
+// CHECK4-51-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META125:![0-9]+]]
+// CHECK4-51-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-51-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-51-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-51-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
+// CHECK4-51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
// CHECK4-51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK4-51-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK4-51-NEXT: ret i32 0
@@ -10628,24 +10628,24 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]
-// CHECK6-NEXT: store i32 15, ptr @a, align 4, !noalias [[META12]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META12]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META5:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META7:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META9:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META11:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META11]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META11]]
+// CHECK6-NEXT: store i32 15, ptr @a, align 4, !noalias [[META11]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load i32, ptr @a, align 4, !noalias [[META11]]
// CHECK6-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP9]] to i8
-// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13:![0-9]+]]
+// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12:![0-9]+]]
// CHECK6-NEXT: store i8 [[CONV_I]], ptr [[TMP10]], align 1
// CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP8]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META13]], !align [[META14:![0-9]+]]
+// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8, !nonnull [[META12]], !align [[META13:![0-9]+]]
// CHECK6-NEXT: store i32 10, ptr [[TMP12]], align 4
// CHECK6-NEXT: ret i32 0
//
@@ -10669,19 +10669,19 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]]
-// CHECK6-NEXT: store i32 15, ptr @a, align 4, !noalias [[META24]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META14:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META21:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META23:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META23]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META23]]
+// CHECK6-NEXT: store i32 15, ptr @a, align 4, !noalias [[META23]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK6-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds [2 x [[STRUCT_S:%.*]]], ptr [[TMP9]], i64 0, i64 1
// CHECK6-NEXT: store i32 10, ptr [[ARRAYIDX_I]], align 4
// CHECK6-NEXT: ret i32 0
@@ -10707,42 +10707,42 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META28:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META30:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META34:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META34]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META31:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META33:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META33]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK6-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK6-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK6-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK6-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK6-NEXT: ]
// CHECK6: .untied.done..i:
-// CHECK6-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK6-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK6-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK6: .untied.jmp..i:
-// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META33]]
// CHECK6-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK6-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB7]])
-// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META34]]
+// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META33]]
// CHECK6-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT:%.*]]
// CHECK6: .untied.jmp.1.i:
// CHECK6-NEXT: [[OMP_GLOBAL_THREAD_NUM2_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK6-NEXT: call void @__kmpc_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK6-NEXT: store i32 1, ptr @a, align 4, !noalias [[META34]]
+// CHECK6-NEXT: store i32 1, ptr @a, align 4, !noalias [[META33]]
// CHECK6-NEXT: call void @__kmpc_end_critical(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM2_I]], ptr @.gomp_critical_user_.var)
-// CHECK6-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK6-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK6-NEXT: br label [[CLEANUP_I]]
// CHECK6: cleanup.i:
-// CHECK6-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META34]]
+// CHECK6-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META33]]
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__3_EXIT]]
// CHECK6: .omp_outlined..3.exit:
// CHECK6-NEXT: ret i32 0
@@ -10768,39 +10768,39 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META35:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META40:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META42:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META44:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META44]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META37:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META43:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META43]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK6-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK6-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK6-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK6-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK6-NEXT: ]
// CHECK6: .untied.done..i:
-// CHECK6-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK6-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK6-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK6: .untied.jmp..i:
-// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META43]]
// CHECK6-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK6-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB9]])
-// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META44]]
+// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META43]]
// CHECK6-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT:%.*]]
// CHECK6: .untied.jmp.1.i:
-// CHECK6-NEXT: store i32 1, ptr @a, align 4, !noalias [[META44]]
-// CHECK6-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK6-NEXT: store i32 1, ptr @a, align 4, !noalias [[META43]]
+// CHECK6-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK6-NEXT: br label [[CLEANUP_I]]
// CHECK6: cleanup.i:
-// CHECK6-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META44]]
+// CHECK6-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META43]]
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]
// CHECK6: .omp_outlined..5.exit:
// CHECK6-NEXT: ret i32 0
@@ -10826,39 +10826,39 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META52:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META54:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META54]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META47:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META49:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META53:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META53]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK6-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK6-NEXT: switch i32 [[TMP10]], label [[DOTUNTIED_DONE__I:%.*]] [
// CHECK6-NEXT: i32 0, label [[DOTUNTIED_JMP__I:%.*]]
// CHECK6-NEXT: i32 1, label [[DOTUNTIED_JMP_1_I:%.*]]
// CHECK6-NEXT: ]
// CHECK6: .untied.done..i:
-// CHECK6-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK6-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK6-NEXT: br label [[CLEANUP_I:%.*]]
// CHECK6: .untied.jmp..i:
-// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META53]]
// CHECK6-NEXT: store i32 1, ptr [[TMP11]], align 4
// CHECK6-NEXT: [[OMP_GLOBAL_THREAD_NUM_I:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB11]])
-// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META54]]
+// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META53]]
// CHECK6-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM_I]], ptr [[TMP12]])
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT:%.*]]
// CHECK6: .untied.jmp.1.i:
-// CHECK6-NEXT: store i32 1, ptr @a, align 4, !noalias [[META54]]
-// CHECK6-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK6-NEXT: store i32 1, ptr @a, align 4, !noalias [[META53]]
+// CHECK6-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK6-NEXT: br label [[CLEANUP_I]]
// CHECK6: cleanup.i:
-// CHECK6-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META54]]
+// CHECK6-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META53]]
// CHECK6-NEXT: br label [[DOTOMP_OUTLINED__7_EXIT]]
// CHECK6: .omp_outlined..7.exit:
// CHECK6-NEXT: ret i32 0
@@ -10883,18 +10883,18 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META55:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]
-// CHECK6-NEXT: store i32 2, ptr @a, align 4, !noalias [[META64]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META57:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META59:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META61:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META63:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META63]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META63]]
+// CHECK6-NEXT: store i32 2, ptr @a, align 4, !noalias [[META63]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -10917,18 +10917,18 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META65:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META68:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META70:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META72:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META74:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META74]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META74]]
-// CHECK6-NEXT: store i32 2, ptr @a, align 4, !noalias [[META74]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META64:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META67:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META69:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META71:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META73:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META73]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META73]]
+// CHECK6-NEXT: store i32 2, ptr @a, align 4, !noalias [[META73]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -10951,18 +10951,18 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META75:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META78:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META80:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META82:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META84:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META84]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META84]]
-// CHECK6-NEXT: store i32 3, ptr @a, align 4, !noalias [[META84]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META74:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META77:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META79:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META81:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META83:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META83]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META83]]
+// CHECK6-NEXT: store i32 3, ptr @a, align 4, !noalias [[META83]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -10985,19 +10985,19 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META85:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META88:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META90:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META92:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META94:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META94]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META94]]
-// CHECK6-NEXT: store i32 4, ptr @a, align 4, !noalias [[META94]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META13]], !align [[META14]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META84:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META87:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META89:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META91:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META93:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META93]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META93]]
+// CHECK6-NEXT: store i32 4, ptr @a, align 4, !noalias [[META93]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8, !nonnull [[META12]], !align [[META13]]
// CHECK6-NEXT: store i32 5, ptr [[TMP9]], align 128
// CHECK6-NEXT: ret i32 0
//
@@ -11037,23 +11037,23 @@ void test_transparent()
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
// CHECK6-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_18]], ptr [[TMP3]], i32 0, i32 2
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META95:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META98:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META100:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META102:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META104:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META104]]
-// CHECK6-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]]
-// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META104]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META94:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META97:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META99:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META101:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META103:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META103]]
+// CHECK6-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR4]], !inline_history [[META104:![0-9]+]]
+// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META103]]
// CHECK6-NEXT: store i32 4, ptr [[TMP12]], align 128
-// CHECK6-NEXT: store i32 4, ptr @a, align 4, !noalias [[META104]]
+// CHECK6-NEXT: store i32 4, ptr @a, align 4, !noalias [[META103]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11131,7 +11131,7 @@ void test_transparent()
// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META114]]
// CHECK6-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META114]]
// CHECK6-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META114]]
-// CHECK6-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]]
+// CHECK6-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR_I]], ptr [[DOTLOCAL_PTR_ADDR1_I]]) #[[ATTR4]], !inline_history [[META115:![0-9]+]]
// CHECK6-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK6-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR_I]], align 8, !noalias [[META114]]
// CHECK6-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLOCAL_PTR_ADDR1_I]], align 8, !noalias [[META114]]
@@ -11291,17 +11291,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META115:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META118:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META120:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META122:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META124:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META124]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META124]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META116:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META119:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META121:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META123:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META125:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META125]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META125]]
// CHECK6-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK6-NEXT: store i32 0, ptr [[TMP9]], align 4
// CHECK6-NEXT: ret i32 0
@@ -11344,17 +11344,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META125:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META128:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META130:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META132:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META134:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META134]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META134]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META126:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META129:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META131:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META133:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META135:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META135]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META135]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11377,17 +11377,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META135:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META138:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META140:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META142:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META144:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META144]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META144]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META136:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META139:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META141:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META143:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META145:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META145]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META145]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11478,17 +11478,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META145:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META148:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META150:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META152:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META154:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META154]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META154]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META154]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META146:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META149:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META151:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META153:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META155:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META155]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META155]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META155]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META155]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META155]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META155]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11511,17 +11511,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META155:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META158:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META160:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META162:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META164:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META164]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META164]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META164]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META156:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META159:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META161:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META163:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META165:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META165]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META165]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META165]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META165]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META165]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META165]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11544,17 +11544,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META165:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META168:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META170:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META172:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META174:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META174]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META174]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META174]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META166:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META169:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META171:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META173:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META175:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META175]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META175]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META175]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META175]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META175]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META175]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11577,17 +11577,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META175:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META178:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META180:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META182:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META184:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META184]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META184]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META184]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META176:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META179:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META181:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META183:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META185:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META185]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META185]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META185]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META185]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META185]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META185]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11610,17 +11610,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META185:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META188:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META190:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META192:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META194:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META194]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META194]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META194]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META194]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META194]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META194]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META186:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META189:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META191:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META193:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META195:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META195]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META195]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META195]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META195]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META195]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META195]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11643,17 +11643,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META195:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META198:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META200:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META202:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META204:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META204]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META204]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META204]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META204]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META204]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META204]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META196:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META199:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META201:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META203:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META205:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META205]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META205]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META205]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META205]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META205]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META205]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11676,17 +11676,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META205:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META208:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META210:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META212:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META214:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META214]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META214]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META214]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META214]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META214]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META214]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META206:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META209:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META211:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META213:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META215:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META215]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META215]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META215]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META215]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META215]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META215]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11709,17 +11709,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META215:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META218:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META220:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META222:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META224:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META224]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META224]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META224]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META224]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META224]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META224]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META216:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META219:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META221:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META223:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META225:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META225]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META225]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META225]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META225]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META225]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META225]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11742,17 +11742,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META225:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META228:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META230:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META232:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META234:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META234]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META234]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META234]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META234]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META234]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META234]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META226:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META229:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META231:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META233:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META235:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META235]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META235]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META235]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META235]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META235]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META235]]
// CHECK6-NEXT: ret i32 0
//
//
@@ -11775,17 +11775,17 @@ void test_transparent()
// CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
// CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
// CHECK6-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META235:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META238:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META240:![0-9]+]])
-// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META242:![0-9]+]])
-// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META244:![0-9]+]]
-// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META244]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META244]]
-// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META244]]
-// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META244]]
-// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META244]]
-// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META244]]
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META236:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META239:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META241:![0-9]+]])
+// CHECK6-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META243:![0-9]+]])
+// CHECK6-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META245:![0-9]+]]
+// CHECK6-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META245]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META245]]
+// CHECK6-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META245]]
+// CHECK6-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META245]]
+// CHECK6-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META245]]
+// CHECK6-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META245]]
// CHECK6-NEXT: ret i32 0
//
//
diff --git a/clang/test/OpenMP/task_in_reduction_codegen.cpp b/clang/test/OpenMP/task_in_reduction_codegen.cpp
index 0ba8b6e504491..cf67bf532bce6 100644
--- a/clang/test/OpenMP/task_in_reduction_codegen.cpp
+++ b/clang/test/OpenMP/task_in_reduction_codegen.cpp
@@ -455,7 +455,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nofreeobj nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/taskloop_in_reduction_codegen.cpp b/clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
index c6c2931cf7472..b400bd79d5fbe 100644
--- a/clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
+++ b/clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
@@ -433,7 +433,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nofreeobj nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp b/clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
index 2670de75aa356..40aff24237d8d 100644
--- a/clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
+++ b/clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
@@ -433,7 +433,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
-// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nofreeobj nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nofreeobj nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nofreeobj nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
index ff6b016775fd7..da58c643c9e3a 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
@@ -413,7 +413,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -568,7 +568,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -909,7 +909,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1044,7 +1044,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1492,7 +1492,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1645,7 +1645,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1982,7 +1982,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2115,7 +2115,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2476,7 +2476,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2557,7 +2557,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
index 79836a98a6488..21e5a6a0c3aab 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
@@ -214,7 +214,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -311,7 +311,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -482,7 +482,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -577,7 +577,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -804,7 +804,7 @@ int main() {
// CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -815,11 +815,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP44]]
//
@@ -873,7 +873,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -996,14 +996,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP27]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done12:
@@ -1011,7 +1011,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1153,14 +1153,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done16:
@@ -1173,7 +1173,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1270,7 +1270,7 @@ int main() {
// CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1280,11 +1280,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP39]]
//
@@ -1370,7 +1370,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1487,14 +1487,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP25]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done11:
@@ -1502,7 +1502,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1638,14 +1638,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP26]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done15:
@@ -1658,7 +1658,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1804,7 +1804,7 @@ int main() {
// CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1815,11 +1815,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP44]]
//
@@ -1873,7 +1873,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1994,14 +1994,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP25]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done12:
@@ -2009,7 +2009,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2147,14 +2147,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done14:
@@ -2167,7 +2167,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
@@ -2264,7 +2264,7 @@ int main() {
// CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2274,11 +2274,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP39]]
//
@@ -2364,7 +2364,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2479,14 +2479,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP23]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done11:
@@ -2494,7 +2494,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2626,14 +2626,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP26]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done13:
@@ -2646,7 +2646,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
index f69c509fd2d94..75b81d94fa781 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
@@ -151,7 +151,7 @@ int main() {
// CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]], ptr null) #[[ATTR3:[0-9]+]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]], ptr null) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -170,7 +170,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -255,7 +255,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -354,7 +354,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -374,7 +374,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -394,7 +394,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -453,7 +453,7 @@ int main() {
// CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]], ptr null) #[[ATTR3]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]], ptr null) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: ret i32 0
@@ -471,7 +471,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -556,7 +556,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -655,7 +655,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -675,7 +675,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -752,7 +752,7 @@ int main() {
// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK3-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]], ptr null) #[[ATTR3:[0-9]+]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]], ptr null) #[[ATTR2:[0-9]+]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -771,7 +771,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -854,7 +854,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -951,7 +951,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -971,7 +971,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -991,7 +991,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK3-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -1050,7 +1050,7 @@ int main() {
// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK3-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]], ptr null) #[[ATTR3]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]], ptr null) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: ret i32 0
@@ -1068,7 +1068,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1151,7 +1151,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1248,7 +1248,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1268,7 +1268,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1309,7 +1309,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1394,7 +1394,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1497,7 +1497,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1517,7 +1517,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func
-// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
+// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
index a53426bf068ea..2ff5a32f10b07 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
@@ -398,7 +398,7 @@ int main(int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l16.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR7:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
index 19c26ff419b0f..eddb0aa043ac8 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
@@ -616,7 +616,7 @@ int main (int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
-// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
@@ -737,7 +737,7 @@ int main (int argc, char **argv) {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR3]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1298,7 +1298,7 @@ int main (int argc, char **argv) {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
-// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
@@ -1417,7 +1417,7 @@ int main (int argc, char **argv) {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR3]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1920,7 +1920,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
// CHECK9-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 0
@@ -1950,7 +1950,7 @@ int main (int argc, char **argv) {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2057,7 +2057,7 @@ int main (int argc, char **argv) {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2297,7 +2297,7 @@ int main (int argc, char **argv) {
// CHECK11-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
// CHECK11-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 0
@@ -2327,7 +2327,7 @@ int main (int argc, char **argv) {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2432,7 +2432,7 @@ int main (int argc, char **argv) {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2801,7 +2801,7 @@ int main (int argc, char **argv) {
// CHECK17-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
// CHECK17-NEXT: br i1 [[TMP27]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK17: omp_offload.failed:
-// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i64 [[TMP1]], ptr null) #[[ATTR4:[0-9]+]]
+// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i64 [[TMP1]], ptr null) #[[ATTR3:[0-9]+]]
// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK17: omp_offload.cont:
// CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
@@ -2825,7 +2825,7 @@ int main (int argc, char **argv) {
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -2901,7 +2901,7 @@ int main (int argc, char **argv) {
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined
-// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3077,7 +3077,7 @@ int main (int argc, char **argv) {
// CHECK19-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
// CHECK19-NEXT: br i1 [[TMP27]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK19: omp_offload.failed:
-// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i32 [[TMP1]], ptr null) #[[ATTR4:[0-9]+]]
+// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i32 [[TMP1]], ptr null) #[[ATTR3:[0-9]+]]
// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK19: omp_offload.cont:
// CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
@@ -3101,7 +3101,7 @@ int main (int argc, char **argv) {
//
//
// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined
-// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3175,7 +3175,7 @@ int main (int argc, char **argv) {
//
//
// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined
-// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3511,7 +3511,7 @@ int main (int argc, char **argv) {
// CHECK25-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
// CHECK25-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK25: omp_offload.failed:
-// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK25: omp_offload.cont:
// CHECK25-NEXT: [[TMP46:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -3543,7 +3543,7 @@ int main (int argc, char **argv) {
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined
-// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3650,7 +3650,7 @@ int main (int argc, char **argv) {
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined
-// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3784,7 +3784,7 @@ int main (int argc, char **argv) {
//
//
// CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
-// CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR9:[0-9]+]] comdat {
+// CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR8:[0-9]+]] comdat {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
@@ -3866,14 +3866,14 @@ int main (int argc, char **argv) {
// CHECK25-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
// CHECK25-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK25: omp_offload.failed:
-// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], ptr [[A]], ptr null) #[[ATTR5]]
+// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], ptr [[A]], ptr null) #[[ATTR4]]
// CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK25: omp_offload.cont:
// CHECK25-NEXT: ret i32 0
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155
-// CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR3]] {
+// CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
// CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
@@ -3893,7 +3893,7 @@ int main (int argc, char **argv) {
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined
-// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
+// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3963,7 +3963,7 @@ int main (int argc, char **argv) {
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined
-// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR6]] {
+// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR5]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -4159,7 +4159,7 @@ int main (int argc, char **argv) {
// CHECK27-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
// CHECK27-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK27: omp_offload.failed:
-// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK27: omp_offload.cont:
// CHECK27-NEXT: [[TMP46:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
@@ -4191,7 +4191,7 @@ int main (int argc, char **argv) {
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined
-// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4296,7 +4296,7 @@ int main (int argc, char **argv) {
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined
-// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4427,7 +4427,7 @@ int main (int argc, char **argv) {
//
//
// CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
-// CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR9:[0-9]+]] comdat {
+// CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR8:[0-9]+]] comdat {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
@@ -4509,14 +4509,14 @@ int main (int argc, char **argv) {
// CHECK27-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
// CHECK27-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK27: omp_offload.failed:
-// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], ptr [[A]], ptr null) #[[ATTR5]]
+// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], ptr [[A]], ptr null) #[[ATTR4]]
// CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK27: omp_offload.cont:
// CHECK27-NEXT: ret i32 0
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155
-// CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR3]] {
+// CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR2]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
// CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
@@ -4536,7 +4536,7 @@ int main (int argc, char **argv) {
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined
-// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
+// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -4604,7 +4604,7 @@ int main (int argc, char **argv) {
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined
-// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR6]] {
+// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR5]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
index c336bc208f283..d6fb195990939 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
@@ -416,7 +416,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l101.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -578,7 +578,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l101.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -926,7 +926,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1068,7 +1068,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1523,7 +1523,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l101.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1683,7 +1683,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l101.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR7:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2027,7 +2027,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2167,7 +2167,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR7]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -3179,7 +3179,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR4]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -3267,7 +3267,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
index a60283826765b..9e822662fa02d 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
@@ -223,7 +223,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -327,7 +327,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -505,7 +505,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -607,7 +607,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -877,7 +877,7 @@ int main() {
// CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -888,11 +888,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP44]]
//
@@ -946,7 +946,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1076,14 +1076,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP29]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done12:
@@ -1091,7 +1091,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1240,14 +1240,14 @@ int main() {
// CHECK9-NEXT: store i32 [[TMP30]], ptr [[TMP4]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done16:
@@ -1260,7 +1260,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1357,7 +1357,7 @@ int main() {
// CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
-// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -1367,11 +1367,11 @@ int main() {
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done2:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK9-NEXT: ret i32 [[TMP39]]
//
@@ -1457,7 +1457,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1581,14 +1581,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP27]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done11:
@@ -1596,7 +1596,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1739,14 +1739,14 @@ int main() {
// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR6]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK9: arraydestroy.body:
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
-// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK9: arraydestroy.done15:
@@ -1759,7 +1759,7 @@ int main() {
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK9-NEXT: ret void
//
//
@@ -1905,7 +1905,7 @@ int main() {
// CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
// CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR5:[0-9]+]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]], ptr null) #[[ATTR4:[0-9]+]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -1916,11 +1916,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP43]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP44:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP44]]
//
@@ -1974,7 +1974,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2102,14 +2102,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP27]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done12:
@@ -2117,7 +2117,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2262,14 +2262,14 @@ int main() {
// CHECK11-NEXT: store i32 [[TMP30]], ptr [[TMP4]], align 4
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x [[STRUCT_S]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done14:
@@ -2282,7 +2282,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
@@ -2379,7 +2379,7 @@ int main() {
// CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
// CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
-// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR5]]
+// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], ptr null) #[[ATTR4]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
@@ -2389,11 +2389,11 @@ int main() {
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done2:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[TEST]]) #[[ATTR4]]
// CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
// CHECK11-NEXT: ret i32 [[TMP39]]
//
@@ -2479,7 +2479,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2601,14 +2601,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP25]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done11:
@@ -2616,7 +2616,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
-// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR6]] {
+// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR5]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -2755,14 +2755,14 @@ int main() {
// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)
// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[VAR5]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x [[STRUCT_S_0]]], ptr [[S_ARR4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
// CHECK11: arraydestroy.body:
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
-// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
// CHECK11: arraydestroy.done13:
@@ -2775,7 +2775,7 @@ int main() {
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR5]]
+// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dead_on_return(4) dereferenceable(4) [[THIS1]]) #[[ATTR4]]
// CHECK11-NEXT: ret void
//
//
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
index 9da47fce7a0ac..79afc234ea17e 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
@@ -155,7 +155,7 @@ int main() {
// CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i64 [[TMP1]], ptr null) #[[ATTR3:[0-9]+]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i64 [[TMP1]], ptr null) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
@@ -174,7 +174,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -266,7 +266,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -372,7 +372,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -392,7 +392,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -412,7 +412,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -471,7 +471,7 @@ int main() {
// CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
-// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]], ptr null) #[[ATTR3]]
+// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]], ptr null) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: ret i32 0
@@ -489,7 +489,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -581,7 +581,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -687,7 +687,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -707,7 +707,7 @@ int main() {
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -784,7 +784,7 @@ int main() {
// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK3-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i32 [[TMP1]], ptr null) #[[ATTR3:[0-9]+]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i32 [[TMP1]], ptr null) #[[ATTR2:[0-9]+]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
@@ -803,7 +803,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -893,7 +893,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -997,7 +997,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1017,7 +1017,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1037,7 +1037,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
-// CHECK3-SAME: () #[[ATTR7:[0-9]+]] comdat {
+// CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
@@ -1096,7 +1096,7 @@ int main() {
// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
// CHECK3-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
-// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]], ptr null) #[[ATTR3]]
+// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]], ptr null) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: ret i32 0
@@ -1114,7 +1114,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR2]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1204,7 +1204,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined
-// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR4]] {
+// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR3]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
@@ -1308,7 +1308,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1328,7 +1328,7 @@ int main() {
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
-// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
+// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4
@@ -1567,7 +1567,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1659,7 +1659,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined
-// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr nofreeobj noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR4:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -1769,7 +1769,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined.omp.reduction.reduction_func
-// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
+// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
@@ -1789,7 +1789,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func
-// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR6]] {
+// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR5]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
diff --git a/clang/test/OpenMP/vla_crash.c b/clang/test/OpenMP/vla_crash.c
index 31cf097523f19..cafdff6de908e 100644
--- a/clang/test/OpenMP/vla_crash.c
+++ b/clang/test/OpenMP/vla_crash.c
@@ -37,13 +37,13 @@ void bar(int n, int *a) {
// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
-// CHECK1-NEXT: call void @foo.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]], ptr [[B]], i64 [[TMP4]], ptr [[C]]) #[[ATTR2:[0-9]+]]
+// CHECK1-NEXT: call void @foo.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]], ptr [[B]], i64 [[TMP4]], ptr [[C]]) #[[ATTR1:[0-9]+]]
// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@foo.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1:[0-9]+]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i64 noundef [[VLA1:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR0]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -58,9 +58,9 @@ void bar(int n, int *a) {
// CHECK1-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8
// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8
-// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP4]], i64 0
// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
@@ -99,13 +99,13 @@ void bar(int n, int *a) {
// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])
// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4
// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
-// CHECK1-NEXT: call void @bar.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]], ptr [[P]], ptr [[A_ADDR]]) #[[ATTR2]]
+// CHECK1-NEXT: call void @bar.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]], ptr [[P]], ptr [[A_ADDR]]) #[[ATTR1]]
// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@bar.omp_outlined
-// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[P:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] {
+// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[P:%.*]], ptr nofreeobj noundef nonnull align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR0]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
@@ -118,8 +118,8 @@ void bar(int n, int *a) {
// CHECK1-NEXT: store ptr [[P]], ptr [[P_ADDR]], align 8
// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
-// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[P_ADDR]], align 8
-// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
+// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[P_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nonnull [[META3]], !align [[META4]]
// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP1]], align 8
// CHECK1-NEXT: [[CMP:%.*]] = icmp eq ptr [[TMP3]], [[TMP2]]
// CHECK1-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
diff --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
index a2d186f9008c3..b2b5263c3162e 100644
--- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
@@ -1897,6 +1897,16 @@ hostParallelCallback(OpenMPIRBuilder *OMPIRBuilder, Function &OutlinedFn,
"Expected at least tid and bounded tid as arguments");
unsigned NumCapturedVars = OutlinedFn.arg_size() - /* tid & bounded tid */ 2;
+ // CodeExtractor packs all captures into a fresh structure owned by the
+ // caller. Only this argument exposes the structure to the outlined function,
+ // and the synchronous fork keeps it alive until all callbacks return. These
+ // attributes describe the structure, not the objects its fields point to.
+ if (NumCapturedVars) {
+ assert(NumCapturedVars == 1 && "Expected an aggregate capture argument");
+ OutlinedFn.addParamAttr(2, Attribute::NoAlias);
+ OutlinedFn.addParamAttr(2, Attribute::NoFreeObj);
+ }
+
CallInst *CI = cast<CallInst>(OutlinedFn.user_back());
CI->getParent()->setName("omp_parallel");
Builder.SetInsertPoint(CI);
diff --git a/llvm/test/Transforms/OpenMP/parallel_region_merging.ll b/llvm/test/Transforms/OpenMP/parallel_region_merging.ll
index 6d3e5935d2e11..2822aa58e633e 100644
--- a/llvm/test/Transforms/OpenMP/parallel_region_merging.ll
+++ b/llvm/test/Transforms/OpenMP/parallel_region_merging.ll
@@ -4689,7 +4689,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META2:![0-9]+]]
@@ -4838,7 +4838,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_seq..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META2]]
@@ -4931,7 +4931,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_float..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_F_RELOADED:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_F_RELOADED:%.*]] = load ptr, ptr [[GEP_F_RELOADED]], align 8, !align [[META2]]
@@ -5029,7 +5029,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_firstprivate..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META2]]
@@ -5121,7 +5121,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_sink_lt..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
@@ -5215,7 +5215,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_par_use..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4
; CHECK2-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
@@ -5313,7 +5313,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_cancellable_regions..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_CANCEL1_ADDR:%.*]] = load ptr, ptr [[GEP_CANCEL1_ADDR]], align 8, !align [[META2]]
@@ -5399,7 +5399,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_cancellable_regions_seq..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_CANCEL1_RELOADED:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_CANCEL1_RELOADED:%.*]] = load ptr, ptr [[GEP_CANCEL1_RELOADED]], align 8, !align [[META2]]
@@ -5503,7 +5503,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_3..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META2]]
@@ -5590,7 +5590,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_3_seq..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { ptr, ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_A_RELOADED:%.*]] = load ptr, ptr [[GEP_A_RELOADED]], align 8, !align [[META2]]
@@ -5830,7 +5830,7 @@ entry:
;
;
; CHECK2-LABEL: define {{[^@]+}}@merge_2_unmergable_1..omp_par
-; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0]] {
+; CHECK2-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
; CHECK2-NEXT: omp.par.entry:
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load ptr, ptr [[GEP_A_ADDR]], align 8, !align [[META2]]
diff --git a/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp b/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
index 901d7e46d5d3e..6f0e5acd49e97 100644
--- a/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+++ b/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
@@ -853,6 +853,8 @@ TEST_F(OpenMPIRBuilderTest, ParallelSimple) {
EXPECT_TRUE(OutlinedFn->hasInternalLinkage());
EXPECT_EQ(OutlinedFn->arg_size(), 3U);
+ EXPECT_TRUE(OutlinedFn->hasParamAttribute(2, Attribute::NoAlias));
+ EXPECT_TRUE(OutlinedFn->hasParamAttribute(2, Attribute::NoFreeObj));
EXPECT_EQ(&OutlinedFn->getEntryBlock(), PrivAI->getParent());
EXPECT_TRUE(OutlinedFn->hasOneUse());
diff --git a/mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir b/mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir
index a44ee6cc8c055..ae6a357b2baa5 100644
--- a/mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir
+++ b/mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir
@@ -1,4 +1,5 @@
-// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+// NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool mlir-translate --check-globals none --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+_omp_target_region__l[0-9]+" --version 6
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s --enable-var-scope=false
module attributes {omp.is_target_device = false} {
llvm.func @omp_target_region_() {
@@ -28,28 +29,76 @@ module attributes {omp.is_target_device = false} {
llvm.return
}
}
-
-// CHECK: call void @__omp_offloading_[[DEV:.*]]_[[FIL:.*]]_omp_target_region__l[[LINE:.*]](ptr %{{.*}}, ptr %{{.*}}, ptr %{{.*}}, ptr null)
-// CHECK: define internal void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_region__l[[LINE]](ptr %[[ADDR_A:.*]], ptr %[[ADDR_B:.*]], ptr %[[ADDR_C:.*]], ptr %{{.*}})
-// CHECK: %[[STRUCTARG:.*]] = alloca { ptr, ptr, ptr }, align 8
-// CHECK: %[[GEP1:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[STRUCTARG]], i32 0, i32 0
-// CHECK: store ptr %[[ADDR_A]], ptr %[[GEP1]], align 8
-// CHECK: %[[GEP2:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[STRUCTARG]], i32 0, i32 1
-// CHECK: store ptr %[[ADDR_B]], ptr %[[GEP2]], align 8
-// CHECK: %[[GEP3:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[STRUCTARG]], i32 0, i32 2
-// CHECK: store ptr %[[ADDR_C]], ptr %[[GEP3]], align 8
-// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @{{.*}}, i32 1, ptr @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_region__l[[LINE]]..omp_par, ptr %[[STRUCTARG]])
-
-
-// CHECK: define internal void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_region__l[[LINE]]..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %[[STRUCTARG2:.*]]) #0 {
-// CHECK: %[[GEP4:.*]] = getelementptr { ptr, ptr, ptr }, ptr %[[STRUCTARG2]], i32 0, i32 0
-// CHECK: %[[LOADGEP1:.*]] = load ptr, ptr %[[GEP4]], align 8
-// CHECK: %[[GEP5:.*]] = getelementptr { ptr, ptr, ptr }, ptr %0, i32 0, i32 1
-// CHECK: %[[LOADGEP2:.*]] = load ptr, ptr %[[GEP5]], align 8
-// CHECK: %[[GEP6:.*]] = getelementptr { ptr, ptr, ptr }, ptr %0, i32 0, i32 2
-// CHECK: %[[LOADGEP3:.*]] = load ptr, ptr %[[GEP6]], align 8
-
-// CHECK: %[[VAL_A:.*]] = load i32, ptr %[[LOADGEP1]], align 4
-// CHECK: %[[VAL_B:.*]] = load i32, ptr %[[LOADGEP2]], align 4
-// CHECK: %[[SUM:.*]] = add i32 %[[VAL_A]], %[[VAL_B]]
-// CHECK: store i32 %[[SUM]], ptr %[[LOADGEP3]], align 4
+// CHECK-LABEL: define void @omp_target_region_() {
+// CHECK-NEXT: [[TMP1:%.*]] = alloca i32, i64 1, align 4
+// CHECK-NEXT: [[TMP2:%.*]] = alloca i32, i64 1, align 4
+// CHECK-NEXT: [[TMP3:%.*]] = alloca i32, i64 1, align 4
+// CHECK-NEXT: store i32 10, ptr [[TMP1]], align 4
+// CHECK-NEXT: store i32 20, ptr [[TMP2]], align 4
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+_omp_target_region__l[0-9]+}}(ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr null)
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+_omp_target_region__l[0-9]+}}(
+// CHECK-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]], ptr [[TMP2:%.*]], ptr [[TMP3:%.*]]) {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr, ptr, ptr }, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OUTLINED_BODY:.*]]
+// CHECK: [[OUTLINED_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TARGET:.*]]
+// CHECK: [[OMP_TARGET]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: [[GEP_4:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 1
+// CHECK-NEXT: store ptr [[TMP1]], ptr [[GEP_4]], align 8
+// CHECK-NEXT: [[GEP_5:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 2
+// CHECK-NEXT: store ptr [[TMP2]], ptr [[GEP_5]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+_omp_target_region__l[0-9]+}}..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TARGET_EXIT:.*]]
+// CHECK: [[TARGET_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+_omp_target_region__l[0-9]+}}..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1:![0-9]+]]
+// CHECK-NEXT: [[GEP_1:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 1
+// CHECK-NEXT: [[LOADGEP_2:%.*]] = load ptr, ptr [[GEP_1]], align 8, !align [[META1]]
+// CHECK-NEXT: [[GEP_3:%.*]] = getelementptr { ptr, ptr, ptr }, ptr [[TMP0]], i32 0, i32 2
+// CHECK-NEXT: [[LOADGEP_4:%.*]] = load ptr, ptr [[GEP_3]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA1:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION3:.*]]
+// CHECK: [[OMP_PAR_REGION3]]:
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOADGEP_2]], align 4
+// CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], [[TMP3]]
+// CHECK-NEXT: store i32 [[TMP4]], ptr [[LOADGEP_4]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT2:.*]]
+// CHECK: [[OMP_REGION_CONT2]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
diff --git a/mlir/test/Target/LLVMIR/openmp-capture-lifetime.mlir b/mlir/test/Target/LLVMIR/openmp-capture-lifetime.mlir
new file mode 100644
index 0000000000000..79df28a02ffd5
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/openmp-capture-lifetime.mlir
@@ -0,0 +1,113 @@
+// NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool mlir-translate --check-globals none --include-generated-funcs --version 6
+// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s --enable-var-scope=false
+
+// Flang uses this translation path. Only the newly created capture structure
+// is noalias/nofreeobj; the captured addresses may alias and name heap objects.
+llvm.func @opaque()
+llvm.func @consume(i64, i64)
+llvm.func @capture_lifetime(%first: !llvm.ptr, %second: !llvm.ptr) {
+ omp.parallel {
+ llvm.call @opaque() : () -> ()
+ %a = llvm.load %first : !llvm.ptr -> i64
+ %b = llvm.load %second : !llvm.ptr -> i64
+ llvm.call @consume(%a, %b) : (i64, i64) -> ()
+ omp.terminator
+ }
+ llvm.return
+}
+
+// -----
+
+// No third parameter exists when the region has no captures.
+llvm.func @opaque()
+llvm.func @no_captures() {
+ omp.parallel {
+ llvm.call @opaque() : () -> ()
+ omp.terminator
+ }
+ llvm.return
+}
+// CHECK-LABEL: define void @capture_lifetime(
+// CHECK-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr, ptr }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: [[GEP_2:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 1
+// CHECK-NEXT: store ptr [[TMP1]], ptr [[GEP_2]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @capture_lifetime..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @capture_lifetime..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1:![0-9]+]]
+// CHECK-NEXT: [[GEP_1:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 1
+// CHECK-NEXT: [[LOADGEP_2:%.*]] = load ptr, ptr [[GEP_1]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: call void @opaque()
+// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[LOADGEP_2]], align 4
+// CHECK-NEXT: call void @consume(i64 [[TMP2]], i64 [[TMP3]])
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @no_captures() {
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @no_captures..omp_par)
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @no_captures..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: call void @opaque()
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
diff --git a/mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir b/mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
index 90b937276e49b..489bd6d720d7f 100644
--- a/mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
@@ -1,6 +1,7 @@
+// NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool mlir-translate --check-globals none --include-generated-funcs --version 6
// Test that dist_schedule gets correctly translated with the correct schedule type and chunk size where appropriate while using workshare loops.
-// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s
+// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s --enable-var-scope=false
llvm.func @distribute_wsloop_dist_schedule_chunked_schedule_chunked(%n: i32, %teams: i32, %threads: i32, %dcs: i32) {
%0 = llvm.mlir.constant(0 : i32) : i32
@@ -22,9 +23,6 @@ llvm.func @distribute_wsloop_dist_schedule_chunked_schedule_chunked(%n: i32, %te
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_dist_schedule_chunked_schedule_chunked..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 33, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i32 1, i32 64)
-// CHECK: call void @__kmpc_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 91, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i32 1, i32 %3)
llvm.func @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64(%n: i32, %teams: i32, %threads: i32) {
%0 = llvm.mlir.constant(0 : i64) : i64
@@ -48,8 +46,6 @@ llvm.func @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64(%n: i32,
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 33, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i64 1, i64 64)
// call void @__kmpc_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 91, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i64 1, i64 1024)
// -----
@@ -74,9 +70,6 @@ llvm.func @distribute_wsloop_dist_schedule_chunked(%n: i32, %teams: i32, %thread
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_dist_schedule_chunked..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 34, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i32 1, i32 0)
-// CHECK: call void @__kmpc_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 91, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i32 1, i32 1024)
llvm.func @distribute_wsloop_dist_schedule_chunked_i64(%n: i32, %teams: i32, %threads: i32) {
%0 = llvm.mlir.constant(0 : i64) : i64
@@ -99,9 +92,6 @@ llvm.func @distribute_wsloop_dist_schedule_chunked_i64(%n: i32, %teams: i32, %th
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_dist_schedule_chunked_i64..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 34, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i64 1, i64 0)
-// CHECK: call void @__kmpc_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 91, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i64 1, i64 1024)
// -----
@@ -125,9 +115,6 @@ llvm.func @distribute_wsloop_schedule_chunked(%n: i32, %teams: i32, %threads: i3
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_schedule_chunked..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 33, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i32 1, i32 64)
-// CHECK: call void @__kmpc_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 92, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i32 1, i32 0)
llvm.func @distribute_wsloop_schedule_chunked_i64(%n: i32, %teams: i32, %threads: i32) {
%0 = llvm.mlir.constant(0 : i64) : i64
@@ -151,10 +138,6 @@ llvm.func @distribute_wsloop_schedule_chunked_i64(%n: i32, %teams: i32, %threads
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_schedule_chunked_i64..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 33, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i64 1, i64 64)
-// CHECK: call void @__kmpc_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 92, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.stride, i64 1, i64 0)
-
// -----
llvm.func @distribute_wsloop_no_chunks(%n: i32, %teams: i32, %threads: i32) {
@@ -176,9 +159,6 @@ llvm.func @distribute_wsloop_no_chunks(%n: i32, %teams: i32, %threads: i32) {
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_no_chunks..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_dist_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 34, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.distupperbound, ptr %p.stride, i32 1, i32 0)
-// CHECK: call void @__kmpc_dist_for_static_init_4u(ptr @2, i32 %omp_global_thread_num8, i32 92, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.distupperbound9, ptr %p.stride, i32 1, i32 0)
llvm.func @distribute_wsloop_no_chunks_i64(%n: i32, %teams: i32, %threads: i32) {
%0 = llvm.mlir.constant(0 : i64) : i64
@@ -200,6 +180,1357 @@ llvm.func @distribute_wsloop_no_chunks_i64(%n: i32, %teams: i32, %threads: i32)
}
llvm.return
}
-// CHECK: define internal void @distribute_wsloop_no_chunks_i64..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr %0) #0 {
-// CHECK: call void @__kmpc_dist_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 34, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.distupperbound, ptr %p.stride, i64 1, i64 0)
-// CHECK: call void @__kmpc_dist_for_static_init_8u(ptr @2, i32 %omp_global_thread_num8, i32 92, ptr %p.lastiter, ptr %p.lowerbound, ptr %p.upperbound, ptr %p.distupperbound9, ptr %p.stride, i64 1, i64 0)
\ No newline at end of file
+// CHECK-LABEL: define void @distribute_wsloop_dist_schedule_chunked_schedule_chunked(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 [[TMP3:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i32, i32 }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32, i32 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[GEP_]], align 4
+// CHECK-NEXT: [[GEP_13:%.*]] = getelementptr { i32, i32 }, ptr [[STRUCTARG]], i32 0, i32 1
+// CHECK-NEXT: store i32 [[TMP3]], ptr [[GEP_13]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked_schedule_chunked..omp_par.1, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked_schedule_chunked..omp_par.1(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32, i32 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i32, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[GEP_1:%.*]] = getelementptr { i32, i32 }, ptr [[DATA]], i32 0, i32 1
+// CHECK-NEXT: [[LOADGEP_2:%.*]] = load i32, ptr [[GEP_1]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr, ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[DOTRELOADED11:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i32 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: store i32 [[LOADGEP_2]], ptr [[DOTRELOADED11]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: [[GEP__RELOADED11:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 1
+// CHECK-NEXT: store ptr [[DOTRELOADED11]], ptr [[GEP__RELOADED11]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked_schedule_chunked..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked_schedule_chunked..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META1:![0-9]+]]
+// CHECK-NEXT: [[GEP__RELOADED11:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 1
+// CHECK-NEXT: [[LOADGEP__RELOADED11:%.*]] = load ptr, ptr [[GEP__RELOADED11]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOADGEP__RELOADED11]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i32 [[TMP2]], i32 0
+// CHECK-NEXT: [[TMP5:%.*]] = select i1 false, i32 0, i32 [[TMP2]]
+// CHECK-NEXT: [[TMP6:%.*]] = sub nsw i32 [[TMP5]], [[TMP4]]
+// CHECK-NEXT: [[TMP7:%.*]] = icmp sle i32 [[TMP5]], [[TMP4]]
+// CHECK-NEXT: [[TMP8:%.*]] = sub i32 [[TMP6]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = udiv i32 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = icmp ule i32 [[TMP6]], 1
+// CHECK-NEXT: [[TMP12:%.*]] = select i1 [[TMP11]], i32 1, i32 [[TMP10]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP7]], i32 0, i32 [[TMP12]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i32 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP13:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[OMP_LOOP_TRIPCOUNT]], 0
+// CHECK-NEXT: [[TMP15:%.*]] = select i1 [[TMP14]], i32 0, i32 [[TMP13]]
+// CHECK-NEXT: store i32 [[TMP15]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB2:[0-9]+]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 33, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 64)
+// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 91, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 [[TMP3]])
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP16:%.*]] = add i32 [[OMP_FIRSTCHUNK_UB]], 1
+// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i32 [[TMP16]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i32, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[TMP17:%.*]] = sub nuw i32 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP18:%.*]] = icmp ule i32 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP19:%.*]] = sub i32 [[TMP17]], 1
+// CHECK-NEXT: [[TMP20:%.*]] = udiv i32 [[TMP19]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP21:%.*]] = add i32 [[TMP20]], 1
+// CHECK-NEXT: [[TMP22:%.*]] = icmp ule i32 [[TMP17]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP23:%.*]] = select i1 [[TMP22]], i32 1, i32 [[TMP21]]
+// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP18]], i32 0, i32 [[TMP23]]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_PREHEADER:.*]]
+// CHECK: [[OMP_DISPATCH_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER:.*]]
+// CHECK: [[OMP_DISPATCH_HEADER]]:
+// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i32 [ 0, %[[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], %[[OMP_DISPATCH_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_COND:.*]]
+// CHECK: [[OMP_DISPATCH_COND]]:
+// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label %[[OMP_DISPATCH_BODY:.*]], label %[[OMP_DISPATCH_EXIT:.*]]
+// CHECK: [[OMP_DISPATCH_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_DISPATCH_AFTER:.*]]
+// CHECK: [[OMP_DISPATCH_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_DISPATCH_BODY]]:
+// CHECK-NEXT: [[TMP24:%.*]] = mul i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP25:%.*]] = add i32 [[TMP24]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER9:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER9]]:
+// CHECK-NEXT: [[TMP26:%.*]] = add i32 [[TMP25]], [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i32 [[TMP26]], [[OMP_LOOP_TRIPCOUNT]]
+// CHECK-NEXT: [[TMP27:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], [[TMP25]]
+// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i32 [[TMP27]], i32 [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, %[[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_INC]]
+// CHECK: [[OMP_DISPATCH_INC]]:
+// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i32 [[OMP_DISPATCH_IV]], 1
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP28:%.*]] = add i32 [[OMP_LOOP_IV]], [[TMP25]]
+// CHECK-NEXT: [[TMP29:%.*]] = mul i32 [[TMP28]], 1
+// CHECK-NEXT: [[TMP30:%.*]] = add i32 [[TMP29]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP2:![0-9]+]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i64 }, align 8
+// CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP0]] to i64
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i64 [[TMP4]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64..omp_par.2, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64..omp_par.2(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i64, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i64 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked_schedule_chunked_i64..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META5:![0-9]+]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i64 [[TMP2]], i64 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i64 0, i64 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i64 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i64 1, i64 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i64 0, i64 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i64 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[OMP_LOOP_TRIPCOUNT]], 0
+// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i64 0, i64 [[TMP12]]
+// CHECK-NEXT: store i64 [[TMP14]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i64 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 33, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 64)
+// CHECK-NEXT: call void @__kmpc_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 91, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 1024)
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i64, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i64, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = add i64 [[OMP_FIRSTCHUNK_UB]], 1
+// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i64 [[TMP15]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i64, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[TMP16:%.*]] = sub nuw i64 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP17:%.*]] = icmp ule i64 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP18:%.*]] = sub i64 [[TMP16]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = udiv i64 [[TMP18]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 1
+// CHECK-NEXT: [[TMP21:%.*]] = icmp ule i64 [[TMP16]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP21]], i64 1, i64 [[TMP20]]
+// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP17]], i64 0, i64 [[TMP22]]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_PREHEADER:.*]]
+// CHECK: [[OMP_DISPATCH_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER:.*]]
+// CHECK: [[OMP_DISPATCH_HEADER]]:
+// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i64 [ 0, %[[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], %[[OMP_DISPATCH_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_COND:.*]]
+// CHECK: [[OMP_DISPATCH_COND]]:
+// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i64 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label %[[OMP_DISPATCH_BODY:.*]], label %[[OMP_DISPATCH_EXIT:.*]]
+// CHECK: [[OMP_DISPATCH_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_DISPATCH_AFTER:.*]]
+// CHECK: [[OMP_DISPATCH_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_DISPATCH_BODY]]:
+// CHECK-NEXT: [[TMP23:%.*]] = mul i64 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP23]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER9:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER9]]:
+// CHECK-NEXT: [[TMP25:%.*]] = add i64 [[TMP24]], [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i64 [[TMP25]], [[OMP_LOOP_TRIPCOUNT]]
+// CHECK-NEXT: [[TMP26:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], [[TMP24]]
+// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i64 [[TMP26]], i64 [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i64 [ 0, %[[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i64 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_INC]]
+// CHECK: [[OMP_DISPATCH_INC]]:
+// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i64 [[OMP_DISPATCH_IV]], 1
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OMP_LOOP_IV]], [[TMP24]]
+// CHECK-NEXT: [[TMP28:%.*]] = mul i64 [[TMP27]], 1
+// CHECK-NEXT: [[TMP29:%.*]] = add i64 [[TMP28]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i64 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP6:![0-9]+]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_dist_schedule_chunked(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i32 }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked..omp_par.1, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked..omp_par.1(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i32, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i32 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i32 [[TMP2]], i32 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i32 0, i32 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i32 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i32 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 1, i32 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i32 0, i32 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i32 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[OMP_LOOP_TRIPCOUNT]], 0
+// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i32 0, i32 [[TMP12]]
+// CHECK-NEXT: store i32 [[TMP14]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 34, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 0)
+// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 91, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 1024)
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = add i32 [[OMP_FIRSTCHUNK_UB]], 1
+// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i32 [[TMP15]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i32, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[TMP16:%.*]] = sub nuw i32 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP17:%.*]] = icmp ule i32 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP18:%.*]] = sub i32 [[TMP16]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = udiv i32 [[TMP18]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], 1
+// CHECK-NEXT: [[TMP21:%.*]] = icmp ule i32 [[TMP16]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP21]], i32 1, i32 [[TMP20]]
+// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP17]], i32 0, i32 [[TMP22]]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_PREHEADER:.*]]
+// CHECK: [[OMP_DISPATCH_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER:.*]]
+// CHECK: [[OMP_DISPATCH_HEADER]]:
+// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i32 [ 0, %[[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], %[[OMP_DISPATCH_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_COND:.*]]
+// CHECK: [[OMP_DISPATCH_COND]]:
+// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label %[[OMP_DISPATCH_BODY:.*]], label %[[OMP_DISPATCH_EXIT:.*]]
+// CHECK: [[OMP_DISPATCH_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_DISPATCH_AFTER:.*]]
+// CHECK: [[OMP_DISPATCH_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_DISPATCH_BODY]]:
+// CHECK-NEXT: [[TMP23:%.*]] = mul i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP24:%.*]] = add i32 [[TMP23]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER9:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER9]]:
+// CHECK-NEXT: [[TMP25:%.*]] = add i32 [[TMP24]], [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i32 [[TMP25]], [[OMP_LOOP_TRIPCOUNT]]
+// CHECK-NEXT: [[TMP26:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], [[TMP24]]
+// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i32 [[TMP26]], i32 [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, %[[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_INC]]
+// CHECK: [[OMP_DISPATCH_INC]]:
+// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i32 [[OMP_DISPATCH_IV]], 1
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP27:%.*]] = add i32 [[OMP_LOOP_IV]], [[TMP24]]
+// CHECK-NEXT: [[TMP28:%.*]] = mul i32 [[TMP27]], 1
+// CHECK-NEXT: [[TMP29:%.*]] = add i32 [[TMP28]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP2]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_dist_schedule_chunked_i64(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i64 }, align 8
+// CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP0]] to i64
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i64 [[TMP4]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked_i64..omp_par.2, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked_i64..omp_par.2(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i64, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i64 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_dist_schedule_chunked_i64..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_dist_schedule_chunked_i64..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META5]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i64 [[TMP2]], i64 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i64 0, i64 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i64 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i64 1, i64 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i64 0, i64 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i64 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[OMP_LOOP_TRIPCOUNT]], 0
+// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i64 0, i64 [[TMP12]]
+// CHECK-NEXT: store i64 [[TMP14]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i64 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 34, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 0)
+// CHECK-NEXT: call void @__kmpc_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 91, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 1024)
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i64, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i64, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = add i64 [[OMP_FIRSTCHUNK_UB]], 1
+// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i64 [[TMP15]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i64, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[TMP16:%.*]] = sub nuw i64 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP17:%.*]] = icmp ule i64 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP18:%.*]] = sub i64 [[TMP16]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = udiv i64 [[TMP18]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 1
+// CHECK-NEXT: [[TMP21:%.*]] = icmp ule i64 [[TMP16]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP21]], i64 1, i64 [[TMP20]]
+// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP17]], i64 0, i64 [[TMP22]]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_PREHEADER:.*]]
+// CHECK: [[OMP_DISPATCH_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER:.*]]
+// CHECK: [[OMP_DISPATCH_HEADER]]:
+// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i64 [ 0, %[[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], %[[OMP_DISPATCH_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_COND:.*]]
+// CHECK: [[OMP_DISPATCH_COND]]:
+// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i64 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label %[[OMP_DISPATCH_BODY:.*]], label %[[OMP_DISPATCH_EXIT:.*]]
+// CHECK: [[OMP_DISPATCH_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_DISPATCH_AFTER:.*]]
+// CHECK: [[OMP_DISPATCH_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_DISPATCH_BODY]]:
+// CHECK-NEXT: [[TMP23:%.*]] = mul i64 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP23]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER9:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER9]]:
+// CHECK-NEXT: [[TMP25:%.*]] = add i64 [[TMP24]], [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i64 [[TMP25]], [[OMP_LOOP_TRIPCOUNT]]
+// CHECK-NEXT: [[TMP26:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], [[TMP24]]
+// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i64 [[TMP26]], i64 [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i64 [ 0, %[[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i64 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_INC]]
+// CHECK: [[OMP_DISPATCH_INC]]:
+// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i64 [[OMP_DISPATCH_IV]], 1
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OMP_LOOP_IV]], [[TMP24]]
+// CHECK-NEXT: [[TMP28:%.*]] = mul i64 [[TMP27]], 1
+// CHECK-NEXT: [[TMP29:%.*]] = add i64 [[TMP28]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i64 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP6]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_schedule_chunked(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i32 }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_schedule_chunked..omp_par.1, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_schedule_chunked..omp_par.1(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i32, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i32 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_schedule_chunked..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_schedule_chunked..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i32 [[TMP2]], i32 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i32 0, i32 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i32 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i32 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 1, i32 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i32 0, i32 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i32 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[OMP_LOOP_TRIPCOUNT]], 0
+// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i32 0, i32 [[TMP12]]
+// CHECK-NEXT: store i32 [[TMP14]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 33, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 64)
+// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 92, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 0)
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = add i32 [[OMP_FIRSTCHUNK_UB]], 1
+// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i32 [[TMP15]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i32, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[TMP16:%.*]] = sub nuw i32 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP17:%.*]] = icmp ule i32 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP18:%.*]] = sub i32 [[TMP16]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = udiv i32 [[TMP18]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], 1
+// CHECK-NEXT: [[TMP21:%.*]] = icmp ule i32 [[TMP16]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP21]], i32 1, i32 [[TMP20]]
+// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP17]], i32 0, i32 [[TMP22]]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_PREHEADER:.*]]
+// CHECK: [[OMP_DISPATCH_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER:.*]]
+// CHECK: [[OMP_DISPATCH_HEADER]]:
+// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i32 [ 0, %[[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], %[[OMP_DISPATCH_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_COND:.*]]
+// CHECK: [[OMP_DISPATCH_COND]]:
+// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label %[[OMP_DISPATCH_BODY:.*]], label %[[OMP_DISPATCH_EXIT:.*]]
+// CHECK: [[OMP_DISPATCH_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_DISPATCH_AFTER:.*]]
+// CHECK: [[OMP_DISPATCH_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_DISPATCH_BODY]]:
+// CHECK-NEXT: [[TMP23:%.*]] = mul i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP24:%.*]] = add i32 [[TMP23]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER9:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER9]]:
+// CHECK-NEXT: [[TMP25:%.*]] = add i32 [[TMP24]], [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i32 [[TMP25]], [[OMP_LOOP_TRIPCOUNT]]
+// CHECK-NEXT: [[TMP26:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], [[TMP24]]
+// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i32 [[TMP26]], i32 [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, %[[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_INC]]
+// CHECK: [[OMP_DISPATCH_INC]]:
+// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i32 [[OMP_DISPATCH_IV]], 1
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP27:%.*]] = add i32 [[OMP_LOOP_IV]], [[TMP24]]
+// CHECK-NEXT: [[TMP28:%.*]] = mul i32 [[TMP27]], 1
+// CHECK-NEXT: [[TMP29:%.*]] = add i32 [[TMP28]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP2]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_schedule_chunked_i64(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i64 }, align 8
+// CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP0]] to i64
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i64 [[TMP4]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_schedule_chunked_i64..omp_par.2, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_schedule_chunked_i64..omp_par.2(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i64, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i64 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_schedule_chunked_i64..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_schedule_chunked_i64..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META5]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i64 [[TMP2]], i64 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i64 0, i64 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i64 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i64 1, i64 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i64 0, i64 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i64 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[OMP_LOOP_TRIPCOUNT]], 0
+// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i64 0, i64 [[TMP12]]
+// CHECK-NEXT: store i64 [[TMP14]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i64 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 33, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 64)
+// CHECK-NEXT: call void @__kmpc_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 92, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 0)
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i64, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i64, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = add i64 [[OMP_FIRSTCHUNK_UB]], 1
+// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i64 [[TMP15]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i64, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[TMP16:%.*]] = sub nuw i64 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP17:%.*]] = icmp ule i64 [[OMP_LOOP_TRIPCOUNT]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: [[TMP18:%.*]] = sub i64 [[TMP16]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = udiv i64 [[TMP18]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 1
+// CHECK-NEXT: [[TMP21:%.*]] = icmp ule i64 [[TMP16]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP21]], i64 1, i64 [[TMP20]]
+// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP17]], i64 0, i64 [[TMP22]]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_PREHEADER:.*]]
+// CHECK: [[OMP_DISPATCH_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER:.*]]
+// CHECK: [[OMP_DISPATCH_HEADER]]:
+// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i64 [ 0, %[[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], %[[OMP_DISPATCH_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_DISPATCH_COND:.*]]
+// CHECK: [[OMP_DISPATCH_COND]]:
+// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i64 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label %[[OMP_DISPATCH_BODY:.*]], label %[[OMP_DISPATCH_EXIT:.*]]
+// CHECK: [[OMP_DISPATCH_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_DISPATCH_AFTER:.*]]
+// CHECK: [[OMP_DISPATCH_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_DISPATCH_BODY]]:
+// CHECK-NEXT: [[TMP23:%.*]] = mul i64 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]
+// CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP23]], [[OMP_FIRSTCHUNK_LB]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER9:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER9]]:
+// CHECK-NEXT: [[TMP25:%.*]] = add i64 [[TMP24]], [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i64 [[TMP25]], [[OMP_LOOP_TRIPCOUNT]]
+// CHECK-NEXT: [[TMP26:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], [[TMP24]]
+// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i64 [[TMP26]], i64 [[OMP_CHUNK_RANGE]]
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i64 [ 0, %[[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i64 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_DISPATCH_INC]]
+// CHECK: [[OMP_DISPATCH_INC]]:
+// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i64 [[OMP_DISPATCH_IV]], 1
+// CHECK-NEXT: br label %[[OMP_DISPATCH_HEADER]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OMP_LOOP_IV]], [[TMP24]]
+// CHECK-NEXT: [[TMP28:%.*]] = mul i64 [[TMP27]], 1
+// CHECK-NEXT: [[TMP29:%.*]] = add i64 [[TMP28]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i64 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP6]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_no_chunks(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i32 }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_no_chunks..omp_par.1, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_no_chunks..omp_par.1(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i32 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i32, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i32 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_no_chunks..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_no_chunks..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_DISTUPPERBOUND:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_DISTUPPERBOUND9:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i32 [[TMP2]], i32 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i32 0, i32 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i32 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i32 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 1, i32 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i32 0, i32 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i32 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: store i32 [[TMP12]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_dist_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 34, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_DISTUPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 0)
+// CHECK-NEXT: call void @__kmpc_dist_for_static_init_4u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 92, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_DISTUPPERBOUND9]], ptr [[P_STRIDE]], i32 1, i32 0)
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = sub i32 [[TMP14]], [[TMP13]]
+// CHECK-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, %[[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[TMP16]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP17:%.*]] = add i32 [[OMP_LOOP_IV]], [[TMP13]]
+// CHECK-NEXT: [[TMP18:%.*]] = mul i32 [[TMP17]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @distribute_wsloop_no_chunks_i64(
+// CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { i64 }, align 8
+// CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP0]] to i64
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_push_num_teams_51(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP2]])
+// CHECK-NEXT: br label %[[CODEREPL:.*]]
+// CHECK: [[CODEREPL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store i64 [[TMP4]], ptr [[GEP_]], align 4
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_no_chunks_i64..omp_par.2, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[TEAMS_EXIT:.*]]
+// CHECK: [[TEAMS_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_no_chunks_i64..omp_par.2(
+// CHECK-SAME: ptr [[GLOBAL_TID_PTR:%.*]], ptr [[BOUND_TID_PTR:%.*]], ptr [[DATA:%.*]]) {
+// CHECK-NEXT: [[TEAMS_ALLOCA:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { i64 }, ptr [[DATA]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load i64, ptr [[GEP_]], align 4
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[TEAMS_BODY:.*]]
+// CHECK: [[TEAMS_BODY]]:
+// CHECK-NEXT: br label %[[OMP_TEAMS_REGION:.*]]
+// CHECK: [[OMP_TEAMS_REGION]]:
+// CHECK-NEXT: store i64 [[LOADGEP_]], ptr [[DOTRELOADED]], align 4
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @distribute_wsloop_no_chunks_i64..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[TEAMS_EXIT_EXITSTUB:.*]]
+// CHECK: [[TEAMS_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @distribute_wsloop_no_chunks_i64..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[LOOP2]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[LOADGEP__RELOADED]], align 4
+// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_DISTUPPERBOUND:%.*]] = alloca i64, align 8
+// CHECK-NEXT: [[P_DISTUPPERBOUND9:%.*]] = alloca i64, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_ALLOCA:.*]]
+// CHECK: [[DISTRIBUTE_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA5:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA5]]:
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA3:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA3]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_BODY:.*]]
+// CHECK: [[DISTRIBUTE_BODY]]:
+// CHECK-NEXT: br label %[[OMP_DISTRIBUTE_REGION:.*]]
+// CHECK: [[OMP_DISTRIBUTE_REGION]]:
+// CHECK-NEXT: br label %[[OMP_WSLOOP_REGION:.*]]
+// CHECK: [[OMP_WSLOOP_REGION]]:
+// CHECK-NEXT: [[TMP3:%.*]] = select i1 false, i64 [[TMP2]], i64 0
+// CHECK-NEXT: [[TMP4:%.*]] = select i1 false, i64 0, i64 [[TMP2]]
+// CHECK-NEXT: [[TMP5:%.*]] = sub nsw i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP6:%.*]] = icmp sle i64 [[TMP4]], [[TMP3]]
+// CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP8:%.*]] = udiv i64 [[TMP7]], 1
+// CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], 1
+// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i64 [[TMP5]], 1
+// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i64 1, i64 [[TMP9]]
+// CHECK-NEXT: [[OMP_LOOP_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i64 0, i64 [[TMP11]]
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: store i64 0, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP12:%.*]] = sub i64 [[OMP_LOOP_TRIPCOUNT]], 1
+// CHECK-NEXT: store i64 [[TMP12]], ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: store i64 1, ptr [[P_STRIDE]], align 4
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM8:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_dist_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 34, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_DISTUPPERBOUND]], ptr [[P_STRIDE]], i64 1, i64 0)
+// CHECK-NEXT: call void @__kmpc_dist_for_static_init_8u(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]], i32 92, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_DISTUPPERBOUND9]], ptr [[P_STRIDE]], i64 1, i64 0)
+// CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[P_LOWERBOUND]], align 4
+// CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[P_UPPERBOUND]], align 4
+// CHECK-NEXT: [[TMP15:%.*]] = sub i64 [[TMP14]], [[TMP13]]
+// CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i64 [ 0, %[[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i64 [[OMP_LOOP_IV]], [[TMP16]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM8]])
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM10]])
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT4:.*]]
+// CHECK: [[OMP_REGION_CONT4]]:
+// CHECK-NEXT: br label %[[DISTRIBUTE_EXIT:.*]]
+// CHECK: [[DISTRIBUTE_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP17:%.*]] = add i64 [[OMP_LOOP_IV]], [[TMP13]]
+// CHECK-NEXT: [[TMP18:%.*]] = mul i64 [[TMP17]], 1
+// CHECK-NEXT: [[TMP19:%.*]] = add i64 [[TMP18]], 0
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT7:.*]]
+// CHECK: [[OMP_REGION_CONT7]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i64 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
diff --git a/mlir/test/Target/LLVMIR/openmp-firstprivate.mlir b/mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
index 0358f713a3246..ff2c12f6f11d0 100644
--- a/mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
@@ -1,7 +1,8 @@
+// NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool mlir-translate --check-globals none --include-generated-funcs --version 6
// Test code-gen for `omp.parallel` ops with delayed privatizers (i.e. using
// `omp.private` ops).
-// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s
+// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s --enable-var-scope=false
llvm.func @parallel_op_firstprivate(%arg0: !llvm.ptr) {
omp.parallel private(@x.privatizer %arg0 -> %arg2 : !llvm.ptr) {
@@ -18,31 +19,11 @@ omp.private {type = firstprivate} @x.privatizer : f32 copy {
omp.yield(%arg1 : !llvm.ptr)
}
-// CHECK-LABEL: @parallel_op_firstprivate
-// CHECK-SAME: (ptr %[[ORIG:.*]]) {
-// CHECK: %[[OMP_PAR_ARG:.*]] = alloca { ptr }, align 8
-// CHECK: %[[ORIG_GEP:.*]] = getelementptr { ptr }, ptr %[[OMP_PAR_ARG]], i32 0, i32 0
-// CHECK: store ptr %[[ORIG]], ptr %[[ORIG_GEP]], align 8
-// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 1, ptr @parallel_op_firstprivate..omp_par, ptr %[[OMP_PAR_ARG]])
-// CHECK: }
-
-// CHECK-LABEL: void @parallel_op_firstprivate..omp_par
-// CHECK-SAME: (ptr noalias %{{.*}}, ptr noalias %{{.*}}, ptr %[[ARG:.*]])
-// CHECK: %[[ORIG_PTR_PTR:.*]] = getelementptr { ptr }, ptr %[[ARG]], i32 0, i32 0
-// CHECK: %[[ORIG_PTR:.*]] = load ptr, ptr %[[ORIG_PTR_PTR]], align 8
-
// Check that the privatizer alloc region was inlined properly.
-// CHECK: %[[PRIV_ALLOC:.*]] = alloca float, align 4
// Check that the privatizer copy region was inlined properly.
-// CHECK: %[[ORIG_VAL:.*]] = load float, ptr %[[ORIG_PTR]], align 4
-// CHECK: store float %[[ORIG_VAL]], ptr %[[PRIV_ALLOC]], align 4
-// CHECK-NEXT: br
-
// Check that the privatized value is used (rather than the original one).
-// CHECK: load float, ptr %[[PRIV_ALLOC]], align 4
-// CHECK: }
// -----
@@ -54,55 +35,16 @@ llvm.func @parallel_op_firstprivate_multi_block(%arg0: !llvm.ptr) {
llvm.return
}
-// CHECK-LABEL: define internal void @parallel_op_firstprivate_multi_block..omp_par
-// CHECK: omp.par.entry:
-// CHECK: %[[ORIG_PTR_PTR:.*]] = getelementptr { ptr }, ptr %{{.*}}, i32 0, i32 0
-// CHECK: %[[ORIG_PTR:.*]] = load ptr, ptr %[[ORIG_PTR_PTR]], align 8
-// CHECK: %[[PRIV_ALLOC:.*]] = alloca float, align 4
-// CHECK-NEXT: br label %omp.region.after_alloca
-
-// CHECK: omp.region.after_alloca:
-// CHECK-NEXT: br label %[[PAR_REG:.*]]
-
// Check that the body of the parallel region loads from the private clone.
-// CHECK: [[PAR_REG]]:
-// CHECK: br label %[[PRIV_BB1:.*]]
-// CHECK: [[PRIV_BB1]]:
// The 1st `alloc` block directly branches to the 2nd `alloc` block since the
// only insruction is `llvm.mlir.constant` which gets translated to compile-time
// constant in LLVM IR.
-// CHECK-NEXT: br label %[[PRIV_BB2:.*]]
-
-// CHECK: [[PRIV_BB2]]:
-// CHECK-NEXT: br label %[[PRIV_BB3:.*]]
-
-// CHECK: [[PRIV_BB3]]:
-// CHECK-NEXT: br label %omp.region.cont
-
-// CHECK: omp.region.cont:
-// CHECK-NEXT: %[[PRIV_ALLOC2:.*]] = phi ptr [ %[[PRIV_ALLOC]], %[[PRIV_BB3]] ]
-// CHECK-NEXT: br label %omp.private.copy
-
-// CHECK: omp.private.copy:
-// CHECK-NEXT: br label %omp.private.copy4
-
-// CHECK: omp.private.copy4:
-// CHECK-NEXT: %[[ORIG_VAL:.*]] = load float, ptr %[[ORIG_PTR]], align 4
-// CHECK-NEXT: br label %[[PRIV_BB3:.*]]
// Check contents of the 2nd block in the `copy` region.
-// CHECK: [[PRIV_BB3]]:
-// CHECK-NEXT: %[[ORIG_VAL2:.*]] = phi float [ %[[ORIG_VAL]], %omp.private.copy4 ]
-// CHECK-NEXT: %[[PRIV_ALLOC3:.*]] = phi ptr [ %[[PRIV_ALLOC2]], %omp.private.copy4 ]
-// CHECK-NEXT: store float %[[ORIG_VAL2]], ptr %[[PRIV_ALLOC3]], align 4
-// CHECK-NEXT: br label %[[PRIV_CONT:.*]]
// Check that the privatizer's continuation block yileds the private clone's
// address.
-// CHECK: [[PRIV_CONT]]:
-// CHECK-NEXT: %[[PRIV_ALLOC4:.*]] = phi ptr [ %[[PRIV_ALLOC3]], %[[PRIV_BB3]] ]
-// CHECK: %{{.*}} = load float, ptr %[[PRIV_ALLOC2]], align 4
omp.private {type = firstprivate} @multi_block.privatizer : f32 init {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
@@ -124,7 +66,6 @@ omp.private {type = firstprivate} @multi_block.privatizer : f32 init {
// -----
// Verifies fix for https://github.com/llvm/llvm-project/issues/102935.
-//
// The issue happens since we previously failed to match MLIR values to their
// corresponding LLVM values in some cases (e.g. char strings with non-const
// length).
@@ -155,18 +96,12 @@ omp.private {type = firstprivate} @non_const_len_char : !llvm.struct<(ptr, i64)>
llvm.func @foo()
-// CHECK-LABEL: @non_const_len_char_test..omp_par({{.*}})
-// CHECK-NEXT: omp.par.entry:
// Verify that we found the privatizer by checking that we properly inlined the
// bodies of the alloc and copy regions.
-// CHECK: %[[STR_LEN:.*]] = extractvalue { ptr, i64 } %{{.*}}, 1
-// CHECK: %{{.*}} = alloca i8, i64 %[[STR_LEN]], align 1
-// CHECK: call void @foo()
// -----
// Verifies fix for https://github.com/llvm/llvm-project/issues/102939.
-//
// The issues occurs because the CodeExtractor component only collect inputs
// (to the parallel regions) that are defined in the same function in which the
// parallel regions is present. Howerver, this is problematic because if we are
@@ -196,10 +131,218 @@ llvm.mlir.global internal @global() {addr_space = 0 : i32} : f32 {
llvm.return %0 : f32
}
-// CHECK-LABEL: @global_accessor..omp_par({{.*}})
-// CHECK-NEXT: omp.par.entry:
// Verify that we found the privatizer by checking that we properly inlined the
// bodies of the alloc and copy regions.
-// CHECK: %[[PRIV_ALLOC:.*]] = alloca float, align 4
-// CHECK: %[[GLOB_VAL:.*]] = load float, ptr @global, align 4
-// CHECK: store float %[[GLOB_VAL]], ptr %[[PRIV_ALLOC]], align 4
+// CHECK-LABEL: define void @parallel_op_firstprivate(
+// CHECK-SAME: ptr [[TMP0:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @parallel_op_firstprivate..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @parallel_op_firstprivate..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1:![0-9]+]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY:.*]]
+// CHECK: [[OMP_PRIVATE_COPY]]:
+// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: store float [[TMP2]], ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @parallel_op_firstprivate_multi_block(
+// CHECK-SAME: ptr [[TMP0:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @parallel_op_firstprivate_multi_block..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @parallel_op_firstprivate_multi_block..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT1:.*]]
+// CHECK: [[OMP_PRIVATE_INIT1]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT2:.*]]
+// CHECK: [[OMP_PRIVATE_INIT2]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: [[TMP2:%.*]] = phi ptr [ [[OMP_PRIVATE_ALLOC]], %[[OMP_PRIVATE_INIT2]] ]
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY:.*]]
+// CHECK: [[OMP_PRIVATE_COPY]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY4:.*]]
+// CHECK: [[OMP_PRIVATE_COPY4]]:
+// CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY5:.*]]
+// CHECK: [[OMP_PRIVATE_COPY5]]:
+// CHECK-NEXT: [[TMP4:%.*]] = phi float [ [[TMP3]], %[[OMP_PRIVATE_COPY4]] ]
+// CHECK-NEXT: [[TMP5:%.*]] = phi ptr [ [[TMP2]], %[[OMP_PRIVATE_COPY4]] ]
+// CHECK-NEXT: store float [[TMP4]], ptr [[TMP5]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT3:.*]]
+// CHECK: [[OMP_REGION_CONT3]]:
+// CHECK-NEXT: [[TMP6:%.*]] = phi ptr [ [[TMP5]], %[[OMP_PRIVATE_COPY5]] ]
+// CHECK-NEXT: br label %[[OMP_PAR_REGION7:.*]]
+// CHECK: [[OMP_PAR_REGION7]]:
+// CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[TMP2]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT6:.*]]
+// CHECK: [[OMP_REGION_CONT6]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @non_const_len_char_test(
+// CHECK-SAME: ptr [[TMP0:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[DOTRELOADED:%.*]] = alloca { ptr, i64 }, align 8
+// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP0]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = alloca i8, i64 [[TMP2]], align 1
+// CHECK-NEXT: [[TMP4:%.*]] = insertvalue { ptr, i64 } undef, ptr [[TMP3]], 0
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: store { ptr, i64 } [[TMP4]], ptr [[DOTRELOADED]], align 8
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[DOTRELOADED]], ptr [[GEP__RELOADED]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @non_const_len_char_test..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @non_const_len_char_test..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP__RELOADED:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP__RELOADED:%.*]] = load ptr, ptr [[GEP__RELOADED]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load { ptr, i64 }, ptr [[LOADGEP__RELOADED]], align 8
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca { ptr, i64 }, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: [[TMP3:%.*]] = extractvalue { ptr, i64 } [[TMP2]], 1
+// CHECK-NEXT: [[TMP4:%.*]] = alloca i8, i64 [[TMP3]], align 1
+// CHECK-NEXT: [[TMP5:%.*]] = insertvalue { ptr, i64 } undef, ptr [[TMP4]], 0
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY:.*]]
+// CHECK: [[OMP_PRIVATE_COPY]]:
+// CHECK-NEXT: call void @foo()
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: [[TMP6:%.*]] = extractvalue { ptr, i64 } [[TMP5]], 0
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @global_accessor() {
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @global_accessor..omp_par)
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @global_accessor..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY:.*]]
+// CHECK: [[OMP_PRIVATE_COPY]]:
+// CHECK-NEXT: [[TMP1:%.*]] = load float, ptr @global, align 4
+// CHECK-NEXT: store float [[TMP1]], ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: store float 3.140000e+00, ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
diff --git a/mlir/test/Target/LLVMIR/openmp-private.mlir b/mlir/test/Target/LLVMIR/openmp-private.mlir
index f720835b8a8e4..71c338865a8e4 100644
--- a/mlir/test/Target/LLVMIR/openmp-private.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-private.mlir
@@ -1,7 +1,8 @@
+// NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool mlir-translate --check-globals none --include-generated-funcs --version 6
// Test code-gen for `omp.parallel` ops with delayed privatizers (i.e. using
// `omp.private` ops).
-// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s
+// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s --enable-var-scope=false
llvm.func @parallel_op_1_private(%arg0: !llvm.ptr) {
omp.parallel private(@x.privatizer %arg0 -> %arg2 : !llvm.ptr) {
@@ -11,28 +12,9 @@ llvm.func @parallel_op_1_private(%arg0: !llvm.ptr) {
llvm.return
}
-// CHECK-LABEL: @parallel_op_1_private
-// CHECK-SAME: (ptr %[[ORIG:.*]]) {
-// CHECK: %[[OMP_PAR_ARG:.*]] = alloca { ptr }, align 8
-// CHECK: %[[ORIG_GEP:.*]] = getelementptr { ptr }, ptr %[[OMP_PAR_ARG]], i32 0, i32 0
-// CHECK: store ptr %[[ORIG]], ptr %[[ORIG_GEP]], align 8
-// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 1, ptr @parallel_op_1_private..omp_par, ptr %[[OMP_PAR_ARG]])
-// CHECK: }
-
-// CHECK-LABEL: void @parallel_op_1_private..omp_par
-// CHECK-SAME: (ptr noalias %{{.*}}, ptr noalias %{{.*}}, ptr %[[ARG:.*]])
-// CHECK: %[[ORIG_PTR_PTR:.*]] = getelementptr { ptr }, ptr %[[ARG]], i32 0, i32 0
-// CHECK: %[[ORIG_PTR:.*]] = load ptr, ptr %[[ORIG_PTR_PTR]], align 8
-
// Check that the privatizer alloc region was inlined properly.
-// CHECK: %[[PRIV_ALLOC:.*]] = alloca float, align 4
-// CHECK: %[[ORIG_VAL:.*]] = load float, ptr %[[ORIG_PTR]], align 4
-// CHECK: store float %[[ORIG_VAL]], ptr %[[PRIV_ALLOC]], align 4
-// CHECK-NEXT: br
// Check that the privatized value is used (rather than the original one).
-// CHECK: load float, ptr %[[PRIV_ALLOC]], align 4
-// CHECK: }
llvm.func @parallel_op_2_privates(%arg0: !llvm.ptr, %arg1: !llvm.ptr) {
omp.parallel private(@x.privatizer %arg0 -> %arg2, @y.privatizer %arg1 -> %arg3 : !llvm.ptr, !llvm.ptr) {
@@ -43,34 +25,9 @@ llvm.func @parallel_op_2_privates(%arg0: !llvm.ptr, %arg1: !llvm.ptr) {
llvm.return
}
-// CHECK-LABEL: @parallel_op_2_privates
-// CHECK-SAME: (ptr %[[ORIG1:.*]], ptr %[[ORIG2:.*]]) {
-// CHECK: %[[OMP_PAR_ARG:.*]] = alloca { ptr, ptr }, align 8
-// CHECK: %[[ORIG1_GEP:.*]] = getelementptr { ptr, ptr }, ptr %[[OMP_PAR_ARG]], i32 0, i32 0
-// CHECK: store ptr %[[ORIG1]], ptr %[[ORIG1_GEP]], align 8
-// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 1, ptr @parallel_op_2_privates..omp_par, ptr %[[OMP_PAR_ARG]])
-// CHECK: }
-
-// CHECK-LABEL: void @parallel_op_2_privates..omp_par
-// CHECK-SAME: (ptr noalias %{{.*}}, ptr noalias %{{.*}}, ptr %[[ARG:.*]])
-// CHECK: %[[ORIG1_PTR_PTR:.*]] = getelementptr { ptr, ptr }, ptr %[[ARG]], i32 0, i32 0
-// CHECK: %[[ORIG1_PTR:.*]] = load ptr, ptr %[[ORIG1_PTR_PTR]], align 8
-// CHECK: %[[ORIG2_PTR_PTR:.*]] = getelementptr { ptr, ptr }, ptr %[[ARG]], i32 0, i32 1
-// CHECK: %[[ORIG2_PTR:.*]] = load ptr, ptr %[[ORIG2_PTR_PTR]], align 8
-
// Check that the privatizer alloc region was inlined properly.
-// CHECK: %[[PRIV1_ALLOC:.*]] = alloca float, align 4
-// CHECK: %[[PRIV2_ALLOC:.*]] = alloca i32, align 4
-// CHECK: %[[ORIG1_VAL:.*]] = load float, ptr %[[ORIG1_PTR]], align 4
-// CHECK: store float %[[ORIG1_VAL]], ptr %[[PRIV1_ALLOC]], align 4
-// CHECK: %[[ORIG2_VAL:.*]] = load i32, ptr %[[ORIG2_PTR]], align 4
-// CHECK: store i32 %[[ORIG2_VAL]], ptr %[[PRIV2_ALLOC]], align 4
-// CHECK-NEXT: br
// Check that the privatized value is used (rather than the original one).
-// CHECK: load float, ptr %[[PRIV1_ALLOC]], align 4
-// CHECK: load i32, ptr %[[PRIV2_ALLOC]], align 4
-// CHECK: }
omp.private {type = private} @x.privatizer : f32 init {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
@@ -98,40 +55,14 @@ llvm.func @parallel_op_private_multi_block(%arg0: !llvm.ptr) {
llvm.return
}
-// CHECK-LABEL: define internal void @parallel_op_private_multi_block..omp_par
-// CHECK: omp.par.entry:
-// CHECK: %[[ORIG_PTR_PTR:.*]] = getelementptr { ptr }, ptr %{{.*}}, i32 0, i32 0
-// CHECK: %[[ORIG_PTR:.*]] = load ptr, ptr %[[ORIG_PTR_PTR]], align 8
-// CHECK: %[[PRIV_ALLOC:.*]] = alloca float, align 4
-// CHECK-NEXT: br label %[[PAR_REG:.*]]
-
-// CHECK: [[PAR_REG]]:
-// CHECK: br label %omp.private.init
-
-// CHECK: omp.private.init:
-// CHECK: br label %[[PRIV_BB1:.*]]
-
// Check contents of the first block in the `init` region.
-// CHECK: [[PRIV_BB1]]:
-// CHECK-NEXT: br label %[[PRIV_BB2:.*]]
// Check contents of the second block in the `init` region.
-// CHECK: [[PRIV_BB2]]:
-// CHECK-NEXT: %[[ORIG_PTR2:.*]] = phi ptr [ %[[ORIG_PTR]], %[[PRIV_BB1]] ]
-// CHECK-NEXT: %[[PRIV_ALLOC2:.*]] = phi ptr [ %[[PRIV_ALLOC]], %[[PRIV_BB1]] ]
-// CHECK-NEXT: %[[ORIG_VAL:.*]] = load float, ptr %[[ORIG_PTR2]], align 4
-// CHECK-NEXT: store float %[[ORIG_VAL]], ptr %[[PRIV_ALLOC2]], align 4
-// CHECK-NEXT: br label %[[PRIV_CONT:.*]]
// Check that the privatizer's continuation block yileds the private clone's
// address.
-// CHECK: [[PRIV_CONT]]:
-// CHECK-NEXT: %[[PRIV_ALLOC3:.*]] = phi ptr [ %[[PRIV_ALLOC2]], %[[PRIV_BB2]] ]
-// CHECK-NEXT: br label %[[PAR_REG2:.*]]
// Check that the body of the parallel region loads from the private clone.
-// CHECK: [[PAR_REG2]]:
-// CHECK: %{{.*}} = load float, ptr %[[PRIV_ALLOC3]], align 4
omp.private {type = private} @multi_block.privatizer : f32 init {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
@@ -149,12 +80,6 @@ omp.private {type = private} @multi_block.privatizer : f32 init {
// op instance that was not created/cloned inside the module, we would get a
// seg fault due to trying to access a null pointer.
-// CHECK-LABEL: define internal void @lower_region_with_addressof..omp_par
-// CHECK: omp.par.region:
-// CHECK: br label %[[PAR_REG_BEG:.*]]
-// CHECK: [[PAR_REG_BEG]]:
-// CHECK: call void @bar(ptr getelementptr (i8, ptr @_QQfoo, i64 888))
-// CHECK: call void @bar(ptr getelementptr (i8, ptr @_QQfoo, i64 1776))
llvm.func @lower_region_with_addressof() {
%0 = llvm.mlir.constant(1 : i64) : i64
%1 = llvm.alloca %0 x f64 {bindc_name = "u1"} : (i64) -> !llvm.ptr
@@ -186,25 +111,12 @@ llvm.mlir.global linkonce constant @_QQfoo() {addr_space = 0 : i32} : !llvm.arra
llvm.func @bar(!llvm.ptr)
-
// Tests fix for Fujitsu test suite test: 0275_0032.f90. The MLIR to LLVM
// translation logic assumed that reduction arguments to an `omp.parallel`
// op are always the last set of arguments to the op. However, this is a
// wrong assumption since private args come afterward. This tests the fix
// that we access the different sets of args properly.
-// CHECK-LABEL: define internal void @private_and_reduction_..omp_par
-// CHECK-DAG: %[[PRV_ALLOC:.*]] = alloca float, align 4
-// CHECK-DAG: %[[RED_ALLOC:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 8
-
-// CHECK: omp.par.region:
-// CHECK: br label %omp.reduction.init
-// CHECK: omp.reduction.init:
-// CHECK: br label %[[PAR_REG_BEG:.*]]
-// CHECK: [[PAR_REG_BEG]]:
-// CHECK-NEXT: %{{.*}} = load { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %[[RED_ALLOC]], align 8
-// CHECK-NEXT: store float 8.000000e+00, ptr %[[PRV_ALLOC]], align 4
-
llvm.func @private_and_reduction_() attributes {fir.internal_name = "_QPprivate_and_reduction", frame_pointer = #llvm.framePointerKind<all>, target_cpu = "x86-64"} {
%0 = llvm.mlir.constant(1 : i64) : i64
%1 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr
@@ -257,14 +169,8 @@ omp.private {type = firstprivate} @_QFequivalenceEx_firstprivate_ptr_f32 : f32 c
omp.yield(%arg1 : !llvm.ptr)
}
-// CHECK: define internal void @_QPequivalence..omp_par
-// CHECK-NOT: define {{.*}} @{{.*}}
-// CHECK: %[[PRIV_ALLOC:.*]] = alloca float, align 4
-// CHECK: %[[HOST_VAL:.*]] = load float, ptr %{{.*}}, align 4
// Test that we initialize the firstprivate variable.
-// CHECK: store float %[[HOST_VAL]], ptr %[[PRIV_ALLOC]], align 4
// Test that we inlined the body of the parallel region.
-// CHECK: store float 3.140000e+00, ptr %[[PRIV_ALLOC]], align 4
// -----
@@ -292,16 +198,375 @@ llvm.func @_QPprivate_alloc_with_switch() {
^bb2: // 2 preds: ^bb0, ^bb1
llvm.return
}
-
+// CHECK-LABEL: define void @parallel_op_1_private(
+// CHECK-SAME: ptr [[TMP0:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @parallel_op_1_private..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @parallel_op_1_private..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1:![0-9]+]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: store float [[TMP2]], ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @parallel_op_2_privates(
+// CHECK-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr, ptr }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: [[GEP_3:%.*]] = getelementptr { ptr, ptr }, ptr [[STRUCTARG]], i32 0, i32 1
+// CHECK-NEXT: store ptr [[TMP1]], ptr [[GEP_3]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @parallel_op_2_privates..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @parallel_op_2_privates..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1]]
+// CHECK-NEXT: [[GEP_1:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 1
+// CHECK-NEXT: [[LOADGEP_2:%.*]] = load ptr, ptr [[GEP_1]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC1:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: store float [[TMP2]], ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOADGEP_2]], align 4
+// CHECK-NEXT: store i32 [[TMP3]], ptr [[OMP_PRIVATE_ALLOC1]], align 4
+// CHECK-NEXT: br label %[[OMP_PAR_REGION2:.*]]
+// CHECK: [[OMP_PAR_REGION2]]:
+// CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[OMP_PRIVATE_ALLOC1]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @parallel_op_private_multi_block(
+// CHECK-SAME: ptr [[TMP0:%.*]]) {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP0]], ptr [[GEP_]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @parallel_op_private_multi_block..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @parallel_op_private_multi_block..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT1:.*]]
+// CHECK: [[OMP_PRIVATE_INIT1]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT2:.*]]
+// CHECK: [[OMP_PRIVATE_INIT2]]:
+// CHECK-NEXT: [[TMP2:%.*]] = phi ptr [ [[LOADGEP_]], %[[OMP_PRIVATE_INIT1]] ]
+// CHECK-NEXT: [[TMP3:%.*]] = phi ptr [ [[OMP_PRIVATE_ALLOC]], %[[OMP_PRIVATE_INIT1]] ]
+// CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP2]], align 4
+// CHECK-NEXT: store float [[TMP4]], ptr [[TMP3]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: [[TMP5:%.*]] = phi ptr [ [[TMP3]], %[[OMP_PRIVATE_INIT2]] ]
+// CHECK-NEXT: br label %[[OMP_PAR_REGION4:.*]]
+// CHECK: [[OMP_PAR_REGION4]]:
+// CHECK-NEXT: [[TMP6:%.*]] = load float, ptr [[TMP5]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT3:.*]]
+// CHECK: [[OMP_REGION_CONT3]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @lower_region_with_addressof() {
+// CHECK-NEXT: [[TMP1:%.*]] = alloca double, i64 1, align 8
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @lower_region_with_addressof..omp_par)
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @lower_region_with_addressof..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: call void @bar(ptr getelementptr (i8, ptr @_QQfoo, i64 888))
+// CHECK-NEXT: call void @bar(ptr getelementptr (i8, ptr @_QQfoo, i64 1776))
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @private_and_reduction_(
+// CHECK-SAME: ) #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: [[TMP1:%.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 8
+// CHECK-NEXT: [[TMP2:%.*]] = alloca float, i64 1, align 4
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @private_and_reduction_..omp_par)
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @private_and_reduction_..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]]) #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 8
+// CHECK-NEXT: [[TMP2:%.*]] = alloca ptr, align 8
+// CHECK-NEXT: [[RED_ARRAY:%.*]] = alloca [1 x ptr], align 8
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_REDUCTION_INIT:.*]]
+// CHECK: [[OMP_REDUCTION_INIT]]:
+// CHECK-NEXT: store ptr [[TMP1]], ptr [[TMP2]], align 8
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: [[TMP3:%.*]] = load { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr [[TMP1]], align 8
+// CHECK-NEXT: store float 8.000000e+00, ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: [[RED_ARRAY_ELEM_0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[RED_ARRAY]], i64 0, i64 0
+// CHECK-NEXT: store ptr [[TMP2]], ptr [[RED_ARRAY_ELEM_0]], align 8
+// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
+// CHECK-NEXT: [[REDUCE:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 1, i64 8, ptr [[RED_ARRAY]], ptr @.omp.reduction.func, ptr @.gomp_critical_user_.reduction.var)
+// CHECK-NEXT: switch i32 [[REDUCE]], label %[[REDUCE_FINALIZE:.*]] [
+// CHECK-NEXT: i32 1, label %[[REDUCE_SWITCH_NONATOMIC:.*]]
+// CHECK-NEXT: i32 2, label %[[REDUCE_SWITCH_ATOMIC:.*]]
+// CHECK-NEXT: ]
+// CHECK: [[REDUCE_SWITCH_ATOMIC]]:
+// CHECK-NEXT: unreachable
+// CHECK: [[REDUCE_SWITCH_NONATOMIC]]:
+// CHECK-NEXT: [[RED_PRIVATE_VALUE_0:%.*]] = load ptr, ptr [[TMP2]], align 8
+// CHECK-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], ptr @.gomp_critical_user_.reduction.var)
+// CHECK-NEXT: br label %[[REDUCE_FINALIZE]]
+// CHECK: [[REDUCE_FINALIZE]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP2]], align 8
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @.omp.reduction.func(
+// CHECK-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) {
+// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP0]], i64 0, i64 0
+// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
+// CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
+// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP1]], i64 0, i64 0
+// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
+// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP7]], align 8
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define void @_QPequivalence() {
+// CHECK-NEXT: [[STRUCTARG:%.*]] = alloca { ptr }, align 8
+// CHECK-NEXT: [[TMP1:%.*]] = alloca [4 x i8], i64 1, align 1
+// CHECK-NEXT: [[TMP2:%.*]] = getelementptr [4 x i8], ptr [[TMP1]], i32 0, i64 0
+// CHECK-NEXT: br label %[[ENTRY:.*]]
+// CHECK: [[ENTRY]]:
+// CHECK-NEXT: br label %[[OMP_PARALLEL:.*]]
+// CHECK: [[OMP_PARALLEL]]:
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[STRUCTARG]], i32 0, i32 0
+// CHECK-NEXT: store ptr [[TMP2]], ptr [[GEP_]], align 8
+// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @_QPequivalence..omp_par, ptr [[STRUCTARG]])
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT:.*]]
+// CHECK: [[OMP_PAR_EXIT]]:
+// CHECK-NEXT: ret void
+//
+//
+// CHECK-LABEL: define internal void @_QPequivalence..omp_par(
+// CHECK-SAME: ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr noalias nofreeobj [[TMP0:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT: [[OMP_PAR_ENTRY:.*:]]
+// CHECK-NEXT: [[GEP_:%.*]] = getelementptr { ptr }, ptr [[TMP0]], i32 0, i32 0
+// CHECK-NEXT: [[LOADGEP_:%.*]] = load ptr, ptr [[GEP_]], align 8, !align [[META1]]
+// CHECK-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TID_ADDR]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[TID:%.*]] = load i32, ptr [[TID_ADDR_LOCAL]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca float, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: br label %[[OMP_PAR_REGION:.*]]
+// CHECK: [[OMP_PAR_REGION]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_COPY:.*]]
+// CHECK: [[OMP_PRIVATE_COPY]]:
+// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[LOADGEP_]], align 4
+// CHECK-NEXT: store float [[TMP2]], ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_PAR_REGION1:.*]]
+// CHECK: [[OMP_PAR_REGION1]]:
+// CHECK-NEXT: store float 3.140000e+00, ptr [[OMP_PRIVATE_ALLOC]], align 4
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[OMP_PAR_PRE_FINALIZE:.*]]
+// CHECK: [[OMP_PAR_PRE_FINALIZE]]:
+// CHECK-NEXT: br label %[[DOTFINI:.*]]
+// CHECK: [[DOTFINI]]:
+// CHECK-NEXT: br label %[[OMP_PAR_EXIT_EXITSTUB:.*]]
+// CHECK: [[OMP_PAR_EXIT_EXITSTUB]]:
+// CHECK-NEXT: ret void
+//
+//
// CHECK-LABEL: define void @_QPprivate_alloc_with_switch() {
-// CHECK: br label %[[AFTER_ALLOCA_BLOCK:.*]]
-// CHECK: [[AFTER_ALLOCA_BLOCK]]:
-// CHECK: switch i32 %{{.*}}, label %[[PRIVATE_INIT_BLOCK:.*]] [
-// CHECK: i32 1, label %[[PRIVATE_INIT_BLOCK]]
-// CHECK: i32 2, label %[[EXIT_BLOCK:.*]]
-// CHECK: ]
-// CHECK: [[PRIVATE_INIT_BLOCK]]:
-// CHECK: omp.private.init:
-// CHECK: omp.simd.region:
-// CHECK: [[EXIT_BLOCK]]:
-// CHECK: ret void
+// CHECK-NEXT: [[TMP1:%.*]] = alloca i32, i64 1, align 4
+// CHECK-NEXT: [[TMP2:%.*]] = alloca i32, i64 1, align 4
+// CHECK-NEXT: store i32 1, ptr [[TMP1]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4
+// CHECK-NEXT: [[OMP_PRIVATE_ALLOC:%.*]] = alloca i32, align 4
+// CHECK-NEXT: br label %[[OMP_REGION_AFTER_ALLOCA:.*]]
+// CHECK: [[OMP_REGION_AFTER_ALLOCA]]:
+// CHECK-NEXT: switch i32 [[TMP3]], label %[[BB4:.*]] [
+// CHECK-NEXT: i32 1, label %[[BB4]]
+// CHECK-NEXT: i32 2, label %[[BB7:.*]]
+// CHECK-NEXT: ]
+// CHECK: [[BB4]]:
+// CHECK-NEXT: br label %[[OMP_PRIVATE_INIT:.*]]
+// CHECK: [[OMP_PRIVATE_INIT]]:
+// CHECK-NEXT: br label %[[OMP_SIMD_REGION:.*]]
+// CHECK: [[OMP_SIMD_REGION]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_PREHEADER:.*]]
+// CHECK: [[OMP_LOOP_PREHEADER]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER:.*]]
+// CHECK: [[OMP_LOOP_HEADER]]:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, %[[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], %[[OMP_LOOP_INC:.*]] ]
+// CHECK-NEXT: br label %[[OMP_LOOP_COND:.*]]
+// CHECK: [[OMP_LOOP_COND]]:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], 30
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label %[[OMP_LOOP_BODY:.*]], label %[[OMP_LOOP_EXIT:.*]]
+// CHECK: [[OMP_LOOP_BODY]]:
+// CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_NEST_REGION:.*]]
+// CHECK: [[OMP_LOOP_NEST_REGION]]:
+// CHECK-NEXT: store i32 [[TMP6]], ptr [[OMP_PRIVATE_ALLOC]], align 4, !llvm.access.group [[META1]]
+// CHECK-NEXT: br label %[[OMP_REGION_CONT1:.*]]
+// CHECK: [[OMP_REGION_CONT1]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_INC]]
+// CHECK: [[OMP_LOOP_INC]]:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label %[[OMP_LOOP_HEADER]], !llvm.loop [[LOOP2:![0-9]+]]
+// CHECK: [[OMP_LOOP_EXIT]]:
+// CHECK-NEXT: br label %[[OMP_LOOP_AFTER:.*]]
+// CHECK: [[OMP_LOOP_AFTER]]:
+// CHECK-NEXT: br label %[[OMP_REGION_CONT:.*]]
+// CHECK: [[OMP_REGION_CONT]]:
+// CHECK-NEXT: br label %[[BB7]]
+// CHECK: [[BB7]]:
+// CHECK-NEXT: ret void
+//
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