[clang] 952fa72 - [clang][AArch64] Consolidate codegen tests for SVE's LEN intrinsics (#226131)
via cfe-commits
cfe-commits at lists.llvm.org
Fri Sep 25 05:09:18 PDT 2026
Author: Andrzej Warzyński
Date: 2026-09-25T13:09:11+01:00
New Revision: 952fa726ae35661f86ea92ed989d0efa36e69c7f
URL: https://github.com/llvm/llvm-project/commit/952fa726ae35661f86ea92ed989d0efa36e69c7f
DIFF: https://github.com/llvm/llvm-project/commit/952fa726ae35661f86ea92ed989d0efa36e69c7f.diff
LOG: [clang][AArch64] Consolidate codegen tests for SVE's LEN intrinsics (#226131)
This patch completes the migration of the tests from:
* clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
to:
* clang/test/CodeGen/AArch64/sve/len.c
`len.c` covers all the cases previously tested by `acle_sve_len.c`.
However, unlike `acle_sve_dup.c`, it was only tested as C. Add `-x c++`
RUN lines to provide the equivalent C++ coverage, including lowering
via CIR.
Added:
Modified:
clang/test/CodeGen/AArch64/sve/len.c
Removed:
clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
################################################################################
diff --git a/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c b/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
deleted file mode 100644
index 5954e730864c4..0000000000000
--- a/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
+++ /dev/null
@@ -1,228 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
-
-#include <arm_sve.h>
-
-#if defined __ARM_FEATURE_SME
-#define MODE_ATTR __arm_streaming
-#else
-#define MODE_ATTR
-#endif
-
-#ifdef SVE_OVERLOADED_FORMS
-// A simple used,unused... macro, long enough to represent any SVE builtin.
-#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
-#else
-#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
-#endif
-
-// CHECK-LABEL: @test_svlen_s8(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z13test_svlen_s8u10__SVInt8_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_s8(svint8_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_s8,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_s16(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_s16u11__SVInt16_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_s16(svint16_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_s16,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_s32(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_s32u11__SVInt32_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_s32(svint32_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_s32,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_s64(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_s64u11__SVInt64_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_s64(svint64_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_s64,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_u8(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z13test_svlen_u8u11__SVUint8_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_u8(svuint8_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_u8,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_u16(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_u16u12__SVUint16_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_u16(svuint16_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_u16,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_u32(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_u32u12__SVUint32_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_u32(svuint32_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_u32,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_u64(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_u64u12__SVUint64_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_u64(svuint64_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_u64,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_f16(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_f16u13__SVFloat16_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_f16(svfloat16_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_f16,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_f32(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_f32u13__SVFloat32_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_f32(svfloat32_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_f32,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_f64(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z14test_svlen_f64u13__SVFloat64_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_f64(svfloat64_t op) MODE_ATTR
-{
- return SVE_ACLE_FUNC(svlen,_f64,,)(op);
-}
-
-// CHECK-LABEL: @test_svlen_bf16(
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CHECK-NEXT: ret i64 [[TMP1]]
-//
-// CPP-CHECK-LABEL: @_Z15test_svlen_bf16u14__SVBfloat16_t(
-// CPP-CHECK-NEXT: entry:
-// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
-// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
-// CPP-CHECK-NEXT: ret i64 [[TMP1]]
-//
-uint64_t test_svlen_bf16(svbfloat16_t op) MODE_ATTR
-{
- // expected-warning at +1 {{implicit declaration of function 'svlen_bf16'}}
- return SVE_ACLE_FUNC(svlen,_bf16,,)(op);
-}
diff --git a/clang/test/CodeGen/AArch64/sve/len.c b/clang/test/CodeGen/AArch64/sve/len.c
index e8466d9b7f36e..1d77b3baf6cb8 100644
--- a/clang/test/CodeGen/AArch64/sve/len.c
+++ b/clang/test/CodeGen/AArch64/sve/len.c
@@ -1,15 +1,15 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
-
// REQUIRES: aarch64-registered-target
-// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -fclangir -emit-cir -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=ALL,CIR %}
-// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -fclangir -emit-cir -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=ALL,CIR %}
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -fclangir -emit-cir -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=C,CIR %}
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -fclangir -emit-cir -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=C,CIR %}
-// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -fclangir -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=ALL,LLVM %}
-// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -fclangir -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=ALL,LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -fclangir -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=C,LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -fclangir -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=C,LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -fclangir -emit-llvm -disable-O0-optnone -o - -x c++ %s | FileCheck %s --check-prefixes=CPP,LLVM %}
-// RUN: %clang_cc1_cg_arm64_sve -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=ALL,LLVM
-// RUN: %clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=ALL,LLVM
+// RUN: %clang_cc1_cg_arm64_sve -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=C,LLVM
+// RUN: %clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -emit-llvm -disable-O0-optnone -o - %s | FileCheck %s --check-prefixes=C,LLVM
+// RUN: %clang_cc1_cg_arm64_sve -DSVE_OVERLOADED_FORMS -emit-llvm -disable-O0-optnone -o - -x c++ %s | FileCheck %s --check-prefixes=CPP,LLVM
//=============================================================================
// NOTES
@@ -32,7 +32,8 @@
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
-// ALL-LABEL: @test_svlen_u8
+// C-LABEL: @test_svlen_u8
+// CPP-LABEL: @_Z13test_svlen_u8u11__SVUint8_t(
uint64_t test_svlen_u8(svuint8_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -44,7 +45,8 @@ uint64_t test_svlen_u8(svuint8_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_u8,,)(op);
}
-// ALL-LABEL: @test_svlen_s8(
+// C-LABEL: @test_svlen_s8(
+// CPP-LABEL: @_Z13test_svlen_s8u10__SVInt8_t(
uint64_t test_svlen_s8(svint8_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -56,7 +58,8 @@ uint64_t test_svlen_s8(svint8_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_s8,,)(op);
}
-// ALL-LABEL: @test_svlen_u16(
+// C-LABEL: @test_svlen_u16(
+// CPP-LABEL: @_Z14test_svlen_u16u12__SVUint16_t(
uint64_t test_svlen_u16(svuint16_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -68,7 +71,8 @@ uint64_t test_svlen_u16(svuint16_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_u16,,)(op);
}
-// ALL-LABEL: @test_svlen_s16(
+// C-LABEL: @test_svlen_s16(
+// CPP-LABEL: @_Z14test_svlen_s16u11__SVInt16_t(
uint64_t test_svlen_s16(svint16_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -80,7 +84,8 @@ uint64_t test_svlen_s16(svint16_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_s16,,)(op);
}
-// ALL-LABEL: @test_svlen_f16(
+// C-LABEL: @test_svlen_f16(
+// CPP-LABEL: @_Z14test_svlen_f16u13__SVFloat16_t(
uint64_t test_svlen_f16(svfloat16_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -92,7 +97,8 @@ uint64_t test_svlen_f16(svfloat16_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_f16,,)(op);
}
-// ALL-LABEL: @test_svlen_bf16(
+// C-LABEL: @test_svlen_bf16(
+// CPP-LABEL: @_Z15test_svlen_bf16u14__SVBfloat16_t(
uint64_t test_svlen_bf16(svbfloat16_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -104,7 +110,8 @@ uint64_t test_svlen_bf16(svbfloat16_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_bf16,,)(op);
}
-// ALL-LABEL: @test_svlen_u32(
+// C-LABEL: @test_svlen_u32(
+// CPP-LABEL: @_Z14test_svlen_u32u12__SVUint32_t(
uint64_t test_svlen_u32(svuint32_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -116,7 +123,8 @@ uint64_t test_svlen_u32(svuint32_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_u32,,)(op);
}
-// ALL-LABEL: @test_svlen_s32(
+// C-LABEL: @test_svlen_s32(
+// CPP-LABEL: @_Z14test_svlen_s32u11__SVInt32_t(
uint64_t test_svlen_s32(svint32_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -128,7 +136,8 @@ uint64_t test_svlen_s32(svint32_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_s32,,)(op);
}
-// ALL-LABEL: @test_svlen_f32(
+// C-LABEL: @test_svlen_f32(
+// CPP-LABEL: @_Z14test_svlen_f32u13__SVFloat32_t(
uint64_t test_svlen_f32(svfloat32_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -140,7 +149,8 @@ uint64_t test_svlen_f32(svfloat32_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_f32,,)(op);
}
-// ALL-LABEL: @test_svlen_u64(
+// C-LABEL: @test_svlen_u64(
+// CPP-LABEL: @_Z14test_svlen_u64u12__SVUint64_t(
uint64_t test_svlen_u64(svuint64_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -152,7 +162,8 @@ uint64_t test_svlen_u64(svuint64_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_u64,,)(op);
}
-// ALL-LABEL: @test_svlen_s64
+// C-LABEL: @test_svlen_s64
+// CPP-LABEL: @_Z14test_svlen_s64u11__SVInt64_t(
uint64_t test_svlen_s64(svint64_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
@@ -164,7 +175,8 @@ uint64_t test_svlen_s64(svint64_t op) MODE_ATTR
return SVE_ACLE_FUNC(svlen,_s64,,)(op);
}
-// ALL-LABEL: @test_svlen_f64
+// C-LABEL: @test_svlen_f64
+// CPP-LABEL: @_Z14test_svlen_f64u13__SVFloat64_t(
uint64_t test_svlen_f64(svfloat64_t op) MODE_ATTR
{
// CIR: %[[VSCALE:.*]] = cir.call_llvm_intrinsic "vscale" : () -> !u64i
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