[clang] [llvm] [RISCV] Add a command line option to disable register overlap for vector index load. (PR #224739)

[Craig Topper via cfe-commits]

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@@ -0,0 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zvfhmin,+zvfbfmin \
+; RUN:   -verify-machineinstrs -target-abi=ilp32d | FileCheck %s --check-prefixes=OVERLAP
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zvfhmin,+zvfbfmin \
+; RUN:   -verify-machineinstrs -target-abi=lp64d | FileCheck %s --check-prefixes=OVERLAP
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zvfhmin,+zvfbfmin,+no-vector-index-load-overlap \
+; RUN:   -verify-machineinstrs -target-abi=ilp32d | FileCheck %s --check-prefixes=NOOVERLAP
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zvfhmin,+zvfbfmin,+no-vector-index-load-overlap \
+; RUN:   -verify-machineinstrs -target-abi=lp64d | FileCheck %s --check-prefixes=NOOVERLAP
+
+define <vscale x 1 x i8> @intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i32(ptr %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {
+; OVERLAP-LABEL: intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i32:
+; OVERLAP:       # %bb.0: # %entry
+; OVERLAP-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
+; OVERLAP-NEXT:    vluxei32.v v8, (a0), v8
+; OVERLAP-NEXT:    ret
+;
+; NOOVERLAP-LABEL: intrinsic_vluxei_v_nxv1i8_nxv1i8_nxv1i32:
+; NOOVERLAP:       # %bb.0: # %entry
+; NOOVERLAP-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
+; NOOVERLAP-NEXT:    vluxei32.v v9, (a0), v8
+; NOOVERLAP-NEXT:    vmv1r.v v8, v9
+; NOOVERLAP-NEXT:    ret
+entry:
+  %a = call <vscale x 1 x i8> @llvm.riscv.vluxei.nxv1i8.nxv1i32(
+    <vscale x 1 x i8> poison,
+    ptr %0,
+    <vscale x 1 x i32> %1,
+    iXLen %2)
+
+  ret <vscale x 1 x i8> %a
+}
+
+define <vscale x 1 x i8> @intrinsic_vloxei_v_nxv1i8_nxv1i8_nxv1i32(ptr %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {
+; OVERLAP-LABEL: intrinsic_vloxei_v_nxv1i8_nxv1i8_nxv1i32:
+; OVERLAP:       # %bb.0: # %entry
+; OVERLAP-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
+; OVERLAP-NEXT:    vloxei32.v v8, (a0), v8
+; OVERLAP-NEXT:    ret
+;
+; NOOVERLAP-LABEL: intrinsic_vloxei_v_nxv1i8_nxv1i8_nxv1i32:
+; NOOVERLAP:       # %bb.0: # %entry
+; NOOVERLAP-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
+; NOOVERLAP-NEXT:    vloxei32.v v9, (a0), v8
+; NOOVERLAP-NEXT:    vmv1r.v v8, v9
+; NOOVERLAP-NEXT:    ret
+entry:
+  %a = call <vscale x 1 x i8> @llvm.riscv.vloxei.nxv1i8.nxv1i32(
+    <vscale x 1 x i8> poison,
+    ptr %0,
+    <vscale x 1 x i32> %1,
+    iXLen %2)
+
+  ret <vscale x 1 x i8> %a
+}
+
+declare <vscale x 1 x i8> @llvm.riscv.vluxei.nxv1i8.nxv1i32(<vscale x 1 x i8>, ptr, <vscale x 1 x i32>, iXLen)
+declare <vscale x 1 x i8> @llvm.riscv.vloxei.nxv1i8.nxv1i32(<vscale x 1 x i8>, ptr, <vscale x 1 x i32>, iXLen)
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topperc wrote:

I had AI write the test. I guess it decided to add the declaration since the other intrinsic file has them. I'll remove.

https://github.com/llvm/llvm-project/pull/224739