[clang] [llvm] [RISCV] Add a command line option to disable register overlap for vector index load. (PR #224739)

[Pengcheng Wang via cfe-commits]

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@@ -5855,6 +5855,10 @@ def mzilsd_word_align : Flag<["-"], "mzilsd-word-align">, Group<m_Group>,
   HelpText<"Allow Zilsd/Zclsd memory accesses to be 4-byte aligned (RISC-V only)">;
 def mzilsd_strict_align : Flag<["-"], "mzilsd-strict-align">, Group<m_Group>,
   HelpText<"Force all Zilsd/Zclsd memory accesses to be 8-byte aligned (RISC-V only)">;
+def mvector_index_load_overlap : Flag<["-"], "mvector-index-load-overlap">, Group<m_Group>,
+  HelpText<"Allow vector index load to have overlapping source and destination register groups (RISC-V only)">;
+def mno_vector_index_load_overlap : Flag<["-"], "mno-vector-index-load-overlap">, Group<m_Group>,
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wangpc-pp wrote:

I think we can define positive/negative option in one `def`?

https://github.com/llvm/llvm-project/pull/224739