[clang] [CIR] Unreacheable blocks should be target lowered (PR #224609)
Mariya Podchishchaeva via cfe-commits
cfe-commits at lists.llvm.org
Fri Sep 18 04:47:16 PDT 2026
https://github.com/Fznamznon created https://github.com/llvm/llvm-project/pull/224609
Similar to CXXABILowering and LowerToLLVM, target lowering should also transform unreacheable blocks to avoid legalization failures.
>From 1d801ff87af12b0306f6020c779fd5eaee883e68 Mon Sep 17 00:00:00 2001
From: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: Fri, 18 Sep 2026 06:41:46 -0500
Subject: [PATCH] [CIR] Unreacheable blocks should be target lowered
Similar to CXXABILowering and LowerToLLVM, target lowering
should also transform unreacheable blocks to avoid legalization
failures.
---
.../CIR/Dialect/Transforms/TargetLowering.cpp | 7 +++-
.../CodeGen/target-lowering-dead-block.cpp | 34 +++++++++++++++++++
2 files changed, 40 insertions(+), 1 deletion(-)
create mode 100644 clang/test/CIR/CodeGen/target-lowering-dead-block.cpp
diff --git a/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp b/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
index aa782aedfda1d..22ffeedc8b3af 100644
--- a/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+++ b/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
@@ -20,6 +20,7 @@
#include "clang/CIR/Dialect/IR/CIRDialect.h"
#include "clang/CIR/Dialect/IR/CIRTypes.h"
#include "clang/CIR/Dialect/Passes.h"
+#include "clang/CIR/Dialect/Transforms/CIRTransformUtils.h"
using namespace mlir;
using namespace cir;
@@ -320,7 +321,11 @@ void TargetLoweringPass::runOnOperation() {
mlir::ConversionTarget target(*mod.getContext());
populateTargetLoweringConversionTarget(target, typeConverter);
- if (failed(mlir::applyPartialConversion(mod, target, std::move(patterns))))
+ llvm::SmallVector<mlir::Operation *> ops;
+ ops.push_back(mod);
+ cir::collectUnreachable(mod, ops);
+
+ if (failed(mlir::applyPartialConversion(ops, target, std::move(patterns))))
signalPassFailure();
}
diff --git a/clang/test/CIR/CodeGen/target-lowering-dead-block.cpp b/clang/test/CIR/CodeGen/target-lowering-dead-block.cpp
new file mode 100644
index 0000000000000..c738e5d1eade6
--- /dev/null
+++ b/clang/test/CIR/CodeGen/target-lowering-dead-block.cpp
@@ -0,0 +1,34 @@
+// RUN: %clang_cc1 -fcuda-is-device -triple amdgpu -fclangir -emit-cir -mmlir -mlir-print-ir-before=cir-target-lowering %s -o %t.cir 2> %t.pre.cir
+// RUN: FileCheck --check-prefix=CIR,CIR-PRE --input-file=%t.pre.cir %s
+// RUN: FileCheck --check-prefix=CIR,CIR-POST --input-file=%t.cir %s
+
+__attribute__((device)) int test(int input) {
+ int a = input;
+ if (!input) {
+ __builtin_trap();
+ return a;
+ } else {
+ return a;
+ }
+}
+
+// CIR-LABEL: cir.func {{.*}}@_Z4testi
+
+// CIR-PRE: %[[RETVAL:.*]] = cir.alloca "__retval" {{.*}} : !cir.ptr<!s32i, lang_address_space(offload_private)>
+// CIR-POST: %[[RETVAL:.*]] = cir.alloca "__retval" {{.*}} : !cir.ptr<!s32i, target_address_space(5)>
+
+// CIR-PRE: %[[A:.*]] = cir.alloca "a" align(4) init : !cir.ptr<!s32i, lang_address_space(offload_private)>
+// CIR-POST: %[[A:.*]] = cir.alloca "a" align(4) init : !cir.ptr<!s32i, target_address_space(5)>
+
+// CIR-POST-NOT: builtin.unrealized_conversion_cast
+
+// CIR-PRE: %[[ACAST:.*]] = cir.cast address_space %[[A]] : !cir.ptr<!s32i, lang_address_space(offload_private)> -> !cir.ptr<!s32i>
+// CIR-POST: %[[ACAST:.*]] = cir.cast address_space %[[A]] : !cir.ptr<!s32i, target_address_space(5)> -> !cir.ptr<!s32i>
+
+// CIR: cir.trap
+// CIR: %[[LOAD:.*]] = cir.load align(4) %[[ACAST]] : !cir.ptr<!s32i>, !s32i
+// CIR-PRE-NEXT: cir.store %[[LOAD]], %[[RETVAL]] : !s32i, !cir.ptr<!s32i, lang_address_space(offload_private)>
+// CIR-PRE-NEXT: %[[RET:.*]] = cir.load %[[RETVAL]] : !cir.ptr<!s32i, lang_address_space(offload_private)>, !s32i
+// CIR-POST-NEXT: cir.store %[[LOAD]], %[[RETVAL]] : !s32i, !cir.ptr<!s32i, target_address_space(5)>
+// CIR-POST-NEXT: %[[RET:.*]] = cir.load %[[RETVAL]] : !cir.ptr<!s32i, target_address_space(5)>, !s32i
+// CIR-NEXT: cir.return %[[RET]] : !s32i
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