[clang] [CIR][AArch64] Upstream load (vld[234]_*/vld[234]q_*) NEON builtins (PR #220476)
Vicky Nguyen via cfe-commits
cfe-commits at lists.llvm.org
Thu Sep 17 10:49:00 PDT 2026
https://github.com/iamvickynguyen updated https://github.com/llvm/llvm-project/pull/220476
>From 16940abf49d7c5ed0e5ac0db42e9ee54451bc32a Mon Sep 17 00:00:00 2001
From: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: Tue, 1 Sep 2026 21:24:19 -0700
Subject: [PATCH] [CIR][AArch64] Upstream load (vld[234]_*/vld[234]q_*) NEON
builtins
---
.../lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 91 +-
clang/test/CodeGen/AArch64/neon-intrinsics.c | 1344 ---------
clang/test/CodeGen/AArch64/neon-ldst-one.c | 2567 -----------------
clang/test/CodeGen/AArch64/neon/load.c | 2310 +++++++++++++++
clang/test/CodeGen/AArch64/poly64.c | 96 -
5 files changed, 2384 insertions(+), 4024 deletions(-)
delete mode 100644 clang/test/CodeGen/AArch64/neon-ldst-one.c
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index d681c390fe9de9..592496b559efc4 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -827,26 +827,65 @@ static cir::RecordType getNeonMultiVecTy(CIRGenBuilderTy &builder,
cir::RecordType::getAllDataKinds(members));
}
+/// Call the multi-vector NEON load intrinsic `llvmIntrinsic` with `args` of
+/// `argTypes` and store the resulting `numVecs`-vector aggregate to the
+/// destination pointer `dest`. Mirrors the `CreateCall` +
+/// `CreateDefaultAlignedStore` pair used for `vld1_xN` in
+/// `EmitCommonNeonBuiltinExpr` and for `vld[234]{,_dup,_lane}` in
+/// `EmitAArch64BuiltinExpr` (ARM.cpp).
+static mlir::Value
+emitNeonMultiVecLoadCall(CIRGenFunction &cgf, mlir::Value dest,
+ llvm::SmallVector<mlir::Type> argTypes,
+ llvm::SmallVectorImpl<mlir::Value> &args,
+ llvm::Intrinsic::ID llvmIntrinsic, mlir::Type ty,
+ unsigned numVecs, mlir::Location loc) {
+ CIRGenBuilderTy &builder = cgf.getBuilder();
+ cir::RecordType recTy = getNeonMultiVecTy(builder, ty, numVecs);
+ mlir::Value result =
+ emitNeonCall(cgf.getCIRGenModule(), builder, std::move(argTypes), args,
+ getLLVMIntrNameNoPrefix(llvmIntrinsic), recTy, loc);
+ Address destAddr(builder.createPtrBitcast(dest, recTy), recTy,
+ clang::CharUnits::fromQuantity(
+ cgf.cgm.getDataLayout().getABITypeAlign(recTy)));
+ builder.createStore(loc, result, destAddr);
+ return nullptr;
+}
+
/// Emit a multi-vector NEON load: call `llvmIntrinsic` on the source pointer
/// `ops[1]` and store the resulting aggregate to the destination pointer
-/// `ops[0]`. Mirrors the `CreateCall` + `CreateDefaultAlignedStore` pair in
-/// `EmitCommonNeonBuiltinExpr` (ARM.cpp).
+/// `ops[0]`.
static mlir::Value emitNeonMultiVecLoad(CIRGenFunction &cgf,
llvm::ArrayRef<mlir::Value> ops,
unsigned llvmIntrinsic, mlir::Type ty,
unsigned numVecs, mlir::Location loc) {
- CIRGenBuilderTy &builder = cgf.getBuilder();
- cir::RecordType recTy = getNeonMultiVecTy(builder, ty, numVecs);
llvm::SmallVector<mlir::Value> srcOp = {ops[1]};
- mlir::Value result = emitNeonCall(
- cgf.getCIRGenModule(), builder, {builder.getVoidPtrTy()}, srcOp,
- getLLVMIntrNameNoPrefix(static_cast<llvm::Intrinsic::ID>(llvmIntrinsic)),
- recTy, loc);
- Address dest(builder.createPtrBitcast(ops[0], recTy), recTy,
- clang::CharUnits::fromQuantity(
- cgf.cgm.getDataLayout().getABITypeAlign(recTy)));
- builder.createStore(loc, result, dest);
- return nullptr;
+ return emitNeonMultiVecLoadCall(
+ cgf, ops[0], {cgf.getBuilder().getVoidPtrTy()}, srcOp,
+ static_cast<llvm::Intrinsic::ID>(llvmIntrinsic), ty, numVecs, loc);
+}
+
+/// Emit a multi-vector NEON load-lane: call `llvmIntrinsic` on the `numVecs`
+/// vector operands, the lane index, and the source pointer `ops[1]`, then
+/// store the resulting aggregate to the destination pointer `ops[0]`.
+/// `ops` on entry is `[dest, addr, vec0, ..., vec(numVecs-1), lane]`.
+static mlir::Value emitNeonMultiVecLoadLane(CIRGenFunction &cgf,
+ llvm::ArrayRef<mlir::Value> ops,
+ llvm::Intrinsic::ID llvmIntrinsic,
+ mlir::Type ty, unsigned numVecs,
+ mlir::Location loc) {
+ assert(ops.size() == numVecs + 3 && "expected [dest, addr, vecs..., lane]");
+ CIRGenBuilderTy &builder = cgf.getBuilder();
+ // Reorder to [vec0, ..., vec(numVecs-1), lane, addr] for the intrinsic call.
+ llvm::SmallVector<mlir::Value> callOps(ops.begin() + 2, ops.end());
+ callOps.push_back(ops[1]);
+ // The lane is a Sema-range-checked non-negative constant, so this
+ // sign-extending cast is equivalent to classic CodeGen's CreateZExt.
+ callOps[numVecs] = builder.createIntCast(callOps[numVecs], cgf.sInt64Ty);
+ llvm::SmallVector<mlir::Type> argTypes(numVecs, ty);
+ argTypes.push_back(cgf.sInt64Ty);
+ argTypes.push_back(builder.getVoidPtrTy());
+ return emitNeonMultiVecLoadCall(cgf, ops[0], std::move(argTypes), callOps,
+ llvmIntrinsic, ty, numVecs, loc);
}
static mlir::Value emitCommonNeonBuiltinExpr(
@@ -3708,28 +3747,46 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
}
case NEON::BI__builtin_neon_vstl1_lane_s64:
case NEON::BI__builtin_neon_vstl1q_lane_s64:
+ cgm.errorNYI(expr->getSourceRange(),
+ std::string("unimplemented AArch64 builtin call: ") +
+ getContext().BuiltinInfo.getName(builtinID));
+ return mlir::Value{};
case NEON::BI__builtin_neon_vld2_v:
case NEON::BI__builtin_neon_vld2q_v:
+ return emitNeonMultiVecLoad(*this, ops, llvm::Intrinsic::aarch64_neon_ld2,
+ ty, 2, loc);
case NEON::BI__builtin_neon_vld3_v:
case NEON::BI__builtin_neon_vld3q_v:
+ return emitNeonMultiVecLoad(*this, ops, llvm::Intrinsic::aarch64_neon_ld3,
+ ty, 3, loc);
case NEON::BI__builtin_neon_vld4_v:
case NEON::BI__builtin_neon_vld4q_v:
+ return emitNeonMultiVecLoad(*this, ops, llvm::Intrinsic::aarch64_neon_ld4,
+ ty, 4, loc);
case NEON::BI__builtin_neon_vld2_dup_v:
case NEON::BI__builtin_neon_vld2q_dup_v:
+ return emitNeonMultiVecLoad(*this, ops, llvm::Intrinsic::aarch64_neon_ld2r,
+ ty, 2, loc);
case NEON::BI__builtin_neon_vld3_dup_v:
case NEON::BI__builtin_neon_vld3q_dup_v:
+ return emitNeonMultiVecLoad(*this, ops, llvm::Intrinsic::aarch64_neon_ld3r,
+ ty, 3, loc);
case NEON::BI__builtin_neon_vld4_dup_v:
case NEON::BI__builtin_neon_vld4q_dup_v:
+ return emitNeonMultiVecLoad(*this, ops, llvm::Intrinsic::aarch64_neon_ld4r,
+ ty, 4, loc);
case NEON::BI__builtin_neon_vld2_lane_v:
case NEON::BI__builtin_neon_vld2q_lane_v:
+ return emitNeonMultiVecLoadLane(
+ *this, ops, llvm::Intrinsic::aarch64_neon_ld2lane, ty, 2, loc);
case NEON::BI__builtin_neon_vld3_lane_v:
case NEON::BI__builtin_neon_vld3q_lane_v:
+ return emitNeonMultiVecLoadLane(
+ *this, ops, llvm::Intrinsic::aarch64_neon_ld3lane, ty, 3, loc);
case NEON::BI__builtin_neon_vld4_lane_v:
case NEON::BI__builtin_neon_vld4q_lane_v:
- cgm.errorNYI(expr->getSourceRange(),
- std::string("unimplemented AArch64 builtin call: ") +
- getContext().BuiltinInfo.getName(builtinID));
- return mlir::Value{};
+ return emitNeonMultiVecLoadLane(
+ *this, ops, llvm::Intrinsic::aarch64_neon_ld4lane, ty, 4, loc);
case NEON::BI__builtin_neon_vst2_v:
case NEON::BI__builtin_neon_vst2q_v: {
// The builtin call has the pointer first, but the AArch64 st2 intrinsic
diff --git a/clang/test/CodeGen/AArch64/neon-intrinsics.c b/clang/test/CodeGen/AArch64/neon-intrinsics.c
index 2098abb0978893..ece835a96d294e 100644
--- a/clang/test/CodeGen/AArch64/neon-intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon-intrinsics.c
@@ -4868,1350 +4868,6 @@ float64_t test_vrsqrted_f64(float64_t a) {
return vrsqrted_f64(a);
}
-// CHECK-LABEL: define dso_local %struct.uint8x16x2_t @test_vld2q_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint8x16x2_t test_vld2q_u8(uint8_t const *a) {
- return vld2q_u8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x8x2_t @test_vld2q_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint16x8x2_t test_vld2q_u16(uint16_t const *a) {
- return vld2q_u16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x4x2_t @test_vld2q_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X2_T:%.*]] poison, <4 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT32X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint32x4x2_t test_vld2q_u32(uint32_t const *a) {
- return vld2q_u32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x2_t @test_vld2q_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint64x2x2_t test_vld2q_u64(uint64_t const *a) {
- return vld2q_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x16x2_t @test_vld2q_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int8x16x2_t test_vld2q_s8(int8_t const *a) {
- return vld2q_s8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x8x2_t @test_vld2q_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int16x8x2_t test_vld2q_s16(int16_t const *a) {
- return vld2q_s16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x4x2_t @test_vld2q_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X2_T:%.*]] poison, <4 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT32X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int32x4x2_t test_vld2q_s32(int32_t const *a) {
- return vld2q_s32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x2_t @test_vld2q_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int64x2x2_t test_vld2q_s64(int64_t const *a) {
- return vld2q_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x8x2_t @test_vld2q_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2.v8f16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X2_T:%.*]] poison, <8 x half> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float16x8x2_t test_vld2q_f16(float16_t const *a) {
- return vld2q_f16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x4x2_t @test_vld2q_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X2_T:%.*]] poison, <4 x float> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float32x4x2_t test_vld2q_f32(float32_t const *a) {
- return vld2q_f32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x2_t @test_vld2q_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T:%.*]] poison, <2 x double> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float64x2x2_t test_vld2q_f64(float64_t const *a) {
- return vld2q_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vld2q_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-mfloat8x16x2_t test_vld2q_mf8(mfloat8_t const *a) {
- return vld2q_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x16x2_t @test_vld2q_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly8x16x2_t test_vld2q_p8(poly8_t const *a) {
- return vld2q_p8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x8x2_t @test_vld2q_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly16x8x2_t test_vld2q_p16(poly16_t const *a) {
- return vld2q_p16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x8x2_t @test_vld2_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint8x8x2_t test_vld2_u8(uint8_t const *a) {
- return vld2_u8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x4x2_t @test_vld2_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint16x4x2_t test_vld2_u16(uint16_t const *a) {
- return vld2_u16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x2x2_t @test_vld2_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X2_T:%.*]] poison, <2 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT32X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint32x2x2_t test_vld2_u32(uint32_t const *a) {
- return vld2_u32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x1x2_t @test_vld2_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint64x1x2_t test_vld2_u64(uint64_t const *a) {
- return vld2_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x8x2_t @test_vld2_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int8x8x2_t test_vld2_s8(int8_t const *a) {
- return vld2_s8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x4x2_t @test_vld2_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int16x4x2_t test_vld2_s16(int16_t const *a) {
- return vld2_s16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x2x2_t @test_vld2_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X2_T:%.*]] poison, <2 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT32X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int32x2x2_t test_vld2_s32(int32_t const *a) {
- return vld2_s32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x1x2_t @test_vld2_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int64x1x2_t test_vld2_s64(int64_t const *a) {
- return vld2_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x4x2_t @test_vld2_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2.v4f16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X2_T:%.*]] poison, <4 x half> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float16x4x2_t test_vld2_f16(float16_t const *a) {
- return vld2_f16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x2x2_t @test_vld2_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X2_T:%.*]] poison, <2 x float> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float32x2x2_t test_vld2_f32(float32_t const *a) {
- return vld2_f32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x2_t @test_vld2_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T:%.*]] poison, <1 x double> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float64x1x2_t test_vld2_f64(float64_t const *a) {
- return vld2_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vld2_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-mfloat8x8x2_t test_vld2_mf8(mfloat8_t const *a) {
- return vld2_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x8x2_t @test_vld2_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly8x8x2_t test_vld2_p8(poly8_t const *a) {
- return vld2_p8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x4x2_t @test_vld2_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly16x4x2_t test_vld2_p16(poly16_t const *a) {
- return vld2_p16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x16x3_t @test_vld3q_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint8x16x3_t test_vld3q_u8(uint8_t const *a) {
- return vld3q_u8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x8x3_t @test_vld3q_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint16x8x3_t test_vld3q_u16(uint16_t const *a) {
- return vld3q_u16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x4x3_t @test_vld3q_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T:%.*]] poison, <4 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint32x4x3_t test_vld3q_u32(uint32_t const *a) {
- return vld3q_u32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x3_t @test_vld3q_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint64x2x3_t test_vld3q_u64(uint64_t const *a) {
- return vld3q_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x16x3_t @test_vld3q_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int8x16x3_t test_vld3q_s8(int8_t const *a) {
- return vld3q_s8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x8x3_t @test_vld3q_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int16x8x3_t test_vld3q_s16(int16_t const *a) {
- return vld3q_s16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x4x3_t @test_vld3q_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T:%.*]] poison, <4 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int32x4x3_t test_vld3q_s32(int32_t const *a) {
- return vld3q_s32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x3_t @test_vld3q_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int64x2x3_t test_vld3q_s64(int64_t const *a) {
- return vld3q_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x8x3_t @test_vld3q_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3.v8f16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T:%.*]] poison, <8 x half> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x half> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float16x8x3_t test_vld3q_f16(float16_t const *a) {
- return vld3q_f16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x4x3_t @test_vld3q_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T:%.*]] poison, <4 x float> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x float> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float32x4x3_t test_vld3q_f32(float32_t const *a) {
- return vld3q_f32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x3_t @test_vld3q_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T:%.*]] poison, <2 x double> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float64x2x3_t test_vld3q_f64(float64_t const *a) {
- return vld3q_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x3_t @test_vld3q_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-mfloat8x16x3_t test_vld3q_mf8(mfloat8_t const *a) {
- return vld3q_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x16x3_t @test_vld3q_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly8x16x3_t test_vld3q_p8(poly8_t const *a) {
- return vld3q_p8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x8x3_t @test_vld3q_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly16x8x3_t test_vld3q_p16(poly16_t const *a) {
- return vld3q_p16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x8x3_t @test_vld3_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint8x8x3_t test_vld3_u8(uint8_t const *a) {
- return vld3_u8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x4x3_t @test_vld3_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint16x4x3_t test_vld3_u16(uint16_t const *a) {
- return vld3_u16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x2x3_t @test_vld3_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T:%.*]] poison, <2 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint32x2x3_t test_vld3_u32(uint32_t const *a) {
- return vld3_u32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x1x3_t @test_vld3_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint64x1x3_t test_vld3_u64(uint64_t const *a) {
- return vld3_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x8x3_t @test_vld3_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int8x8x3_t test_vld3_s8(int8_t const *a) {
- return vld3_s8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x4x3_t @test_vld3_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int16x4x3_t test_vld3_s16(int16_t const *a) {
- return vld3_s16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x2x3_t @test_vld3_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T:%.*]] poison, <2 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int32x2x3_t test_vld3_s32(int32_t const *a) {
- return vld3_s32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x1x3_t @test_vld3_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int64x1x3_t test_vld3_s64(int64_t const *a) {
- return vld3_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x4x3_t @test_vld3_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3.v4f16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T:%.*]] poison, <4 x half> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x half> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float16x4x3_t test_vld3_f16(float16_t const *a) {
- return vld3_f16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x2x3_t @test_vld3_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T:%.*]] poison, <2 x float> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x float> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float32x2x3_t test_vld3_f32(float32_t const *a) {
- return vld3_f32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x3_t @test_vld3_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T:%.*]] poison, <1 x double> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float64x1x3_t test_vld3_f64(float64_t const *a) {
- return vld3_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x3_t @test_vld3_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-mfloat8x8x3_t test_vld3_mf8(mfloat8_t const *a) {
- return vld3_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x8x3_t @test_vld3_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly8x8x3_t test_vld3_p8(poly8_t const *a) {
- return vld3_p8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x4x3_t @test_vld3_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly16x4x3_t test_vld3_p16(poly16_t const *a) {
- return vld3_p16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x16x4_t @test_vld4q_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint8x16x4_t test_vld4q_u8(uint8_t const *a) {
- return vld4q_u8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x8x4_t @test_vld4q_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint16x8x4_t test_vld4q_u16(uint16_t const *a) {
- return vld4q_u16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x4x4_t @test_vld4q_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T:%.*]] poison, <4 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint32x4x4_t test_vld4q_u32(uint32_t const *a) {
- return vld4q_u32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x4_t @test_vld4q_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint64x2x4_t test_vld4q_u64(uint64_t const *a) {
- return vld4q_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x16x4_t @test_vld4q_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int8x16x4_t test_vld4q_s8(int8_t const *a) {
- return vld4q_s8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x8x4_t @test_vld4q_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int16x8x4_t test_vld4q_s16(int16_t const *a) {
- return vld4q_s16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x4x4_t @test_vld4q_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T:%.*]] poison, <4 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int32x4x4_t test_vld4q_s32(int32_t const *a) {
- return vld4q_s32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x4_t @test_vld4q_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int64x2x4_t test_vld4q_s64(int64_t const *a) {
- return vld4q_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x8x4_t @test_vld4q_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4.v8f16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T:%.*]] poison, <8 x half> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x half> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x half> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float16x8x4_t test_vld4q_f16(float16_t const *a) {
- return vld4q_f16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x4x4_t @test_vld4q_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T:%.*]] poison, <4 x float> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x float> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x float> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float32x4x4_t test_vld4q_f32(float32_t const *a) {
- return vld4q_f32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x4_t @test_vld4q_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T:%.*]] poison, <2 x double> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x double> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float64x2x4_t test_vld4q_f64(float64_t const *a) {
- return vld4q_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x4_t @test_vld4q_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-mfloat8x16x4_t test_vld4q_mf8(mfloat8_t const *a) {
- return vld4q_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x16x4_t @test_vld4q_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly8x16x4_t test_vld4q_p8(poly8_t const *a) {
- return vld4q_p8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x8x4_t @test_vld4q_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly16x8x4_t test_vld4q_p16(poly16_t const *a) {
- return vld4q_p16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x8x4_t @test_vld4_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint8x8x4_t test_vld4_u8(uint8_t const *a) {
- return vld4_u8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x4x4_t @test_vld4_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint16x4x4_t test_vld4_u16(uint16_t const *a) {
- return vld4_u16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x2x4_t @test_vld4_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T:%.*]] poison, <2 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint32x2x4_t test_vld4_u32(uint32_t const *a) {
- return vld4_u32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x1x4_t @test_vld4_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint64x1x4_t test_vld4_u64(uint64_t const *a) {
- return vld4_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x8x4_t @test_vld4_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int8x8x4_t test_vld4_s8(int8_t const *a) {
- return vld4_s8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x4x4_t @test_vld4_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int16x4x4_t test_vld4_s16(int16_t const *a) {
- return vld4_s16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x2x4_t @test_vld4_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T:%.*]] poison, <2 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int32x2x4_t test_vld4_s32(int32_t const *a) {
- return vld4_s32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x1x4_t @test_vld4_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int64x1x4_t test_vld4_s64(int64_t const *a) {
- return vld4_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x4x4_t @test_vld4_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4.v4f16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T:%.*]] poison, <4 x half> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x half> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x half> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float16x4x4_t test_vld4_f16(float16_t const *a) {
- return vld4_f16(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x2x4_t @test_vld4_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T:%.*]] poison, <2 x float> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x float> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x float> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float32x2x4_t test_vld4_f32(float32_t const *a) {
- return vld4_f32(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x4_t @test_vld4_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T:%.*]] poison, <1 x double> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x double> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float64x1x4_t test_vld4_f64(float64_t const *a) {
- return vld4_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x4_t @test_vld4_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-mfloat8x8x4_t test_vld4_mf8(mfloat8_t const *a) {
- return vld4_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x8x4_t @test_vld4_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly8x8x4_t test_vld4_p8(poly8_t const *a) {
- return vld4_p8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x4x4_t @test_vld4_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly16x4x4_t test_vld4_p16(poly16_t const *a) {
- return vld4_p16(a);
-}
-
// CHECK-LABEL: define dso_local i64 @test_vceqd_s64(
// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
diff --git a/clang/test/CodeGen/AArch64/neon-ldst-one.c b/clang/test/CodeGen/AArch64/neon-ldst-one.c
deleted file mode 100644
index bc06e33c78fc0b..00000000000000
--- a/clang/test/CodeGen/AArch64/neon-ldst-one.c
+++ /dev/null
@@ -1,2567 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
-// RUN: -disable-O0-optnone -emit-llvm -o - %s \
-// RUN: | opt -S -passes=mem2reg,sroa | FileCheck %s
-
-// REQUIRES: aarch64-registered-target || arm-registered-target
-
-#include <arm_neon.h>
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x2_t @test_vld2q_dup_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint64x2x2_t test_vld2q_dup_u64(uint64_t *a) {
- return vld2q_dup_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x2_t @test_vld2q_dup_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int64x2x2_t test_vld2q_dup_s64(int64_t *a) {
- return vld2q_dup_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x2_t @test_vld2q_dup_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T:%.*]] poison, <2 x double> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float64x2x2_t test_vld2q_dup_f64(float64_t *a) {
- return vld2q_dup_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vld2q_dup_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-mfloat8x16x2_t test_vld2q_dup_mf8(mfloat8_t *a) {
- return vld2q_dup_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x2_t @test_vld2q_dup_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly64x2x2_t test_vld2q_dup_p64(poly64_t *a) {
- return vld2q_dup_p64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x2_t @test_vld2_dup_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T:%.*]] poison, <1 x double> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float64x1x2_t test_vld2_dup_f64(float64_t *a) {
- return vld2_dup_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vld2_dup_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-mfloat8x8x2_t test_vld2_dup_mf8(mfloat8_t *a) {
- return vld2_dup_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x2_t @test_vld2_dup_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly64x1x2_t test_vld2_dup_p64(poly64_t *a) {
- return vld2_dup_p64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x3_t @test_vld3q_dup_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint64x2x3_t test_vld3q_dup_u64(uint64_t *a) {
- return vld3q_dup_u64(a);
- // [{{x[0-9]+|sp}}]
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x3_t @test_vld3q_dup_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int64x2x3_t test_vld3q_dup_s64(int64_t *a) {
- return vld3q_dup_s64(a);
- // [{{x[0-9]+|sp}}]
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x3_t @test_vld3q_dup_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T:%.*]] poison, <2 x double> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float64x2x3_t test_vld3q_dup_f64(float64_t *a) {
- return vld3q_dup_f64(a);
- // [{{x[0-9]+|sp}}]
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x3_t @test_vld3q_dup_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-mfloat8x16x3_t test_vld3q_dup_mf8(mfloat8_t *a) {
- return vld3q_dup_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x3_t @test_vld3q_dup_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly64x2x3_t test_vld3q_dup_p64(poly64_t *a) {
- return vld3q_dup_p64(a);
- // [{{x[0-9]+|sp}}]
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x3_t @test_vld3_dup_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T:%.*]] poison, <1 x double> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float64x1x3_t test_vld3_dup_f64(float64_t *a) {
- return vld3_dup_f64(a);
- // [{{x[0-9]+|sp}}]
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x3_t @test_vld3_dup_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-mfloat8x8x3_t test_vld3_dup_mf8(mfloat8_t *a) {
- return vld3_dup_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x3_t @test_vld3_dup_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly64x1x3_t test_vld3_dup_p64(poly64_t *a) {
- return vld3_dup_p64(a);
- // [{{x[0-9]+|sp}}]
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x4_t @test_vld4q_dup_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint64x2x4_t test_vld4q_dup_u64(uint64_t *a) {
- return vld4q_dup_u64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x4_t @test_vld4q_dup_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int64x2x4_t test_vld4q_dup_s64(int64_t *a) {
- return vld4q_dup_s64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x4_t @test_vld4q_dup_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T:%.*]] poison, <2 x double> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x double> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float64x2x4_t test_vld4q_dup_f64(float64_t *a) {
- return vld4q_dup_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x4_t @test_vld4q_dup_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-mfloat8x16x4_t test_vld4q_dup_mf8(mfloat8_t *a) {
- return vld4q_dup_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x4_t @test_vld4q_dup_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly64x2x4_t test_vld4q_dup_p64(poly64_t *a) {
- return vld4q_dup_p64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x4_t @test_vld4_dup_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T:%.*]] poison, <1 x double> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x double> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float64x1x4_t test_vld4_dup_f64(float64_t *a) {
- return vld4_dup_f64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x4_t @test_vld4_dup_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-mfloat8x8x4_t test_vld4_dup_mf8(mfloat8_t *a) {
- return vld4_dup_mf8(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x4_t @test_vld4_dup_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr [[A]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly64x1x4_t test_vld4_dup_p64(poly64_t *a) {
- return vld4_dup_p64(a);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x16x2_t @test_vld2q_lane_s8(
-// CHECK-SAME: ptr noundef [[PTR:%.*]], [2 x <16 x i8>] alignstack(16) [[SRC_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[SRC_COERCE]], 0
-// CHECK-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[SRC_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[SRC_COERCE_FCA_0_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_1_EXTRACT]], i64 15, ptr [[PTR]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int8x16x2_t test_vld2q_lane_s8(int8_t const * ptr, int8x16x2_t src) {
- return vld2q_lane_s8(ptr, src, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x16x2_t @test_vld2q_lane_u8(
-// CHECK-SAME: ptr noundef [[PTR:%.*]], [2 x <16 x i8>] alignstack(16) [[SRC_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[SRC_COERCE]], 0
-// CHECK-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[SRC_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[SRC_COERCE_FCA_0_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_1_EXTRACT]], i64 15, ptr [[PTR]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint8x16x2_t test_vld2q_lane_u8(uint8_t const * ptr, uint8x16x2_t src) {
- return vld2q_lane_u8(ptr, src, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x16x2_t @test_vld2q_lane_p8(
-// CHECK-SAME: ptr noundef [[PTR:%.*]], [2 x <16 x i8>] alignstack(16) [[SRC_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[SRC_COERCE]], 0
-// CHECK-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[SRC_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[SRC_COERCE_FCA_0_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_1_EXTRACT]], i64 15, ptr [[PTR]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly8x16x2_t test_vld2q_lane_p8(poly8_t const * ptr, poly8x16x2_t src) {
- return vld2q_lane_p8(ptr, src, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x16x3_t @test_vld3q_lane_s8(
-// CHECK-SAME: ptr noundef [[PTR:%.*]], [3 x <16 x i8>] alignstack(16) [[SRC_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[SRC_COERCE]], 0
-// CHECK-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[SRC_COERCE]], 1
-// CHECK-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[SRC_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[SRC_COERCE_FCA_0_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_1_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_2_EXTRACT]], i64 15, ptr [[PTR]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int8x16x3_t test_vld3q_lane_s8(int8_t const * ptr, int8x16x3_t src) {
- return vld3q_lane_s8(ptr, src, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x16x3_t @test_vld3q_lane_u8(
-// CHECK-SAME: ptr noundef [[PTR:%.*]], [3 x <16 x i8>] alignstack(16) [[SRC_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[SRC_COERCE]], 0
-// CHECK-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[SRC_COERCE]], 1
-// CHECK-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[SRC_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[SRC_COERCE_FCA_0_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_1_EXTRACT]], <16 x i8> [[SRC_COERCE_FCA_2_EXTRACT]], i64 15, ptr [[PTR]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint8x16x3_t test_vld3q_lane_u8(uint8_t const * ptr, uint8x16x3_t src) {
- return vld3q_lane_u8(ptr, src, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x8x2_t @test_vld2q_lane_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[TMP2]], <8 x i16> [[TMP3]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint16x8x2_t test_vld2q_lane_u16(uint16_t *a, uint16x8x2_t b) {
- return vld2q_lane_u16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x4x2_t @test_vld2q_lane_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> [[TMP2]], <4 x i32> [[TMP3]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X2_T:%.*]] poison, <4 x i32> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT32X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint32x4x2_t test_vld2q_lane_u32(uint32_t *a, uint32x4x2_t b) {
- return vld2q_lane_u32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x2_t @test_vld2q_lane_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[TMP2]], <2 x i64> [[TMP3]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint64x2x2_t test_vld2q_lane_u64(uint64_t *a, uint64x2x2_t b) {
- return vld2q_lane_u64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x8x2_t @test_vld2q_lane_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[TMP2]], <8 x i16> [[TMP3]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int16x8x2_t test_vld2q_lane_s16(int16_t *a, int16x8x2_t b) {
- return vld2q_lane_s16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x4x2_t @test_vld2q_lane_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> [[TMP2]], <4 x i32> [[TMP3]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X2_T:%.*]] poison, <4 x i32> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT32X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int32x4x2_t test_vld2q_lane_s32(int32_t *a, int32x4x2_t b) {
- return vld2q_lane_s32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x2_t @test_vld2q_lane_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[TMP2]], <2 x i64> [[TMP3]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int64x2x2_t test_vld2q_lane_s64(int64_t *a, int64x2x2_t b) {
- return vld2q_lane_s64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x8x2_t @test_vld2q_lane_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x half>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x half>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x half>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2lane.v8f16.p0(<8 x half> [[TMP4]], <8 x half> [[TMP5]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X2_T:%.*]] poison, <8 x half> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float16x8x2_t test_vld2q_lane_f16(float16_t *a, float16x8x2_t b) {
- return vld2q_lane_f16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x4x2_t @test_vld2q_lane_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x float>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x float>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x float>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> [[TMP4]], <4 x float> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X2_T:%.*]] poison, <4 x float> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float32x4x2_t test_vld2q_lane_f32(float32_t *a, float32x4x2_t b) {
- return vld2q_lane_f32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x2_t @test_vld2q_lane_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x double>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x double>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> [[TMP4]], <2 x double> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T:%.*]] poison, <2 x double> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float64x2x2_t test_vld2q_lane_f64(float64_t *a, float64x2x2_t b) {
- return vld2q_lane_f64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vld2q_lane_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-mfloat8x16x2_t test_vld2q_lane_mf8(mfloat8_t *a, mfloat8x16x2_t b) {
- return vld2q_lane_mf8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x8x2_t @test_vld2q_lane_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[TMP2]], <8 x i16> [[TMP3]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY16X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly16x8x2_t test_vld2q_lane_p16(poly16_t *a, poly16x8x2_t b) {
- return vld2q_lane_p16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x2_t @test_vld2q_lane_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[TMP2]], <2 x i64> [[TMP3]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly64x2x2_t test_vld2q_lane_p64(poly64_t *a, poly64x2x2_t b) {
- return vld2q_lane_p64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x8x2_t @test_vld2_lane_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint8x8x2_t test_vld2_lane_u8(uint8_t *a, uint8x8x2_t b) {
- return vld2_lane_u8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x4x2_t @test_vld2_lane_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint16x4x2_t test_vld2_lane_u16(uint16_t *a, uint16x4x2_t b) {
- return vld2_lane_u16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x2x2_t @test_vld2_lane_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> [[TMP2]], <2 x i32> [[TMP3]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X2_T:%.*]] poison, <2 x i32> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT32X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint32x2x2_t test_vld2_lane_u32(uint32_t *a, uint32x2x2_t b) {
- return vld2_lane_u32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x1x2_t @test_vld2_lane_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[TMP2]], <1 x i64> [[TMP3]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_UINT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-uint64x1x2_t test_vld2_lane_u64(uint64_t *a, uint64x1x2_t b) {
- return vld2_lane_u64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x8x2_t @test_vld2_lane_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int8x8x2_t test_vld2_lane_s8(int8_t *a, int8x8x2_t b) {
- return vld2_lane_s8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x4x2_t @test_vld2_lane_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int16x4x2_t test_vld2_lane_s16(int16_t *a, int16x4x2_t b) {
- return vld2_lane_s16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x2x2_t @test_vld2_lane_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> [[TMP2]], <2 x i32> [[TMP3]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X2_T:%.*]] poison, <2 x i32> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT32X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int32x2x2_t test_vld2_lane_s32(int32_t *a, int32x2x2_t b) {
- return vld2_lane_s32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x1x2_t @test_vld2_lane_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[TMP2]], <1 x i64> [[TMP3]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_INT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-int64x1x2_t test_vld2_lane_s64(int64_t *a, int64x1x2_t b) {
- return vld2_lane_s64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x4x2_t @test_vld2_lane_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x half>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x half>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x half>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2lane.v4f16.p0(<4 x half> [[TMP4]], <4 x half> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X2_T:%.*]] poison, <4 x half> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float16x4x2_t test_vld2_lane_f16(float16_t *a, float16x4x2_t b) {
- return vld2_lane_f16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x2x2_t @test_vld2_lane_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x float>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x float>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x float>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> [[TMP4]], <2 x float> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X2_T:%.*]] poison, <2 x float> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float32x2x2_t test_vld2_lane_f32(float32_t *a, float32x2x2_t b) {
- return vld2_lane_f32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x2_t @test_vld2_lane_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x double>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x double>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i64 0
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> [[TMP4]], <1 x double> [[TMP5]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T:%.*]] poison, <1 x double> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-float64x1x2_t test_vld2_lane_f64(float64_t *a, float64x1x2_t b) {
- return vld2_lane_f64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vld2_lane_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-mfloat8x8x2_t test_vld2_lane_mf8(mfloat8_t *a, mfloat8x8x2_t b) {
- return vld2_lane_mf8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x8x2_t @test_vld2_lane_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY8X8X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly8x8x2_t test_vld2_lane_p8(poly8_t *a, poly8x8x2_t b) {
- return vld2_lane_p8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x4x2_t @test_vld2_lane_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY16X4X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly16x4x2_t test_vld2_lane_p16(poly16_t *a, poly16x4x2_t b) {
- return vld2_lane_p16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x2_t @test_vld2_lane_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[TMP2]], <1 x i64> [[TMP3]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2_LANE]], 0
-// CHECK-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2_LANE]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly64x1x2_t test_vld2_lane_p64(poly64_t *a, poly64x1x2_t b) {
- return vld2_lane_p64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x8x3_t @test_vld3q_lane_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[TMP3]], <8 x i16> [[TMP4]], <8 x i16> [[TMP5]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint16x8x3_t test_vld3q_lane_u16(uint16_t *a, uint16x8x3_t b) {
- return vld3q_lane_u16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x4x3_t @test_vld3q_lane_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T:%.*]] poison, <4 x i32> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint32x4x3_t test_vld3q_lane_u32(uint32_t *a, uint32x4x3_t b) {
- return vld3q_lane_u32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x3_t @test_vld3q_lane_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[TMP3]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint64x2x3_t test_vld3q_lane_u64(uint64_t *a, uint64x2x3_t b) {
- return vld3q_lane_u64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x8x3_t @test_vld3q_lane_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[TMP3]], <8 x i16> [[TMP4]], <8 x i16> [[TMP5]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int16x8x3_t test_vld3q_lane_s16(int16_t *a, int16x8x3_t b) {
- return vld3q_lane_s16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x4x3_t @test_vld3q_lane_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T:%.*]] poison, <4 x i32> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int32x4x3_t test_vld3q_lane_s32(int32_t *a, int32x4x3_t b) {
- return vld3q_lane_s32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x3_t @test_vld3q_lane_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[TMP3]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int64x2x3_t test_vld3q_lane_s64(int64_t *a, int64x2x3_t b) {
- return vld3q_lane_s64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x8x3_t @test_vld3q_lane_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x half>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x half>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x half>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x half>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3lane.v8f16.p0(<8 x half> [[TMP6]], <8 x half> [[TMP7]], <8 x half> [[TMP8]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T:%.*]] poison, <8 x half> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x half> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float16x8x3_t test_vld3q_lane_f16(float16_t *a, float16x8x3_t b) {
- return vld3q_lane_f16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x4x3_t @test_vld3q_lane_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x float>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x float>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x float>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x float>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> [[TMP6]], <4 x float> [[TMP7]], <4 x float> [[TMP8]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T:%.*]] poison, <4 x float> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x float> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float32x4x3_t test_vld3q_lane_f32(float32_t *a, float32x4x3_t b) {
- return vld3q_lane_f32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x3_t @test_vld3q_lane_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> [[TMP6]], <2 x double> [[TMP7]], <2 x double> [[TMP8]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T:%.*]] poison, <2 x double> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float64x2x3_t test_vld3q_lane_f64(float64_t *a, float64x2x3_t b) {
- return vld3q_lane_f64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x3_t @test_vld3q_lane_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-mfloat8x16x3_t test_vld3q_lane_mf8(mfloat8_t *a, mfloat8x16x3_t b) {
- return vld3q_lane_mf8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x16x3_t @test_vld3q_lane_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly8x16x3_t test_vld3q_lane_p8(poly8_t *a, poly8x16x3_t b) {
- return vld3q_lane_p8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x8x3_t @test_vld3q_lane_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[TMP3]], <8 x i16> [[TMP4]], <8 x i16> [[TMP5]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly16x8x3_t test_vld3q_lane_p16(poly16_t *a, poly16x8x3_t b) {
- return vld3q_lane_p16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x3_t @test_vld3q_lane_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[TMP3]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly64x2x3_t test_vld3q_lane_p64(poly64_t *a, poly64x2x3_t b) {
- return vld3q_lane_p64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x8x3_t @test_vld3_lane_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint8x8x3_t test_vld3_lane_u8(uint8_t *a, uint8x8x3_t b) {
- return vld3_lane_u8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x4x3_t @test_vld3_lane_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[TMP3]], <4 x i16> [[TMP4]], <4 x i16> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint16x4x3_t test_vld3_lane_u16(uint16_t *a, uint16x4x3_t b) {
- return vld3_lane_u16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x2x3_t @test_vld3_lane_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> [[TMP3]], <2 x i32> [[TMP4]], <2 x i32> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T:%.*]] poison, <2 x i32> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint32x2x3_t test_vld3_lane_u32(uint32_t *a, uint32x2x3_t b) {
- return vld3_lane_u32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x1x3_t @test_vld3_lane_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[TMP3]], <1 x i64> [[TMP4]], <1 x i64> [[TMP5]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-uint64x1x3_t test_vld3_lane_u64(uint64_t *a, uint64x1x3_t b) {
- return vld3_lane_u64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x8x3_t @test_vld3_lane_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int8x8x3_t test_vld3_lane_s8(int8_t *a, int8x8x3_t b) {
- return vld3_lane_s8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x4x3_t @test_vld3_lane_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[TMP3]], <4 x i16> [[TMP4]], <4 x i16> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int16x4x3_t test_vld3_lane_s16(int16_t *a, int16x4x3_t b) {
- return vld3_lane_s16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x2x3_t @test_vld3_lane_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> [[TMP3]], <2 x i32> [[TMP4]], <2 x i32> [[TMP5]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T:%.*]] poison, <2 x i32> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int32x2x3_t test_vld3_lane_s32(int32_t *a, int32x2x3_t b) {
- return vld3_lane_s32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x1x3_t @test_vld3_lane_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[TMP3]], <1 x i64> [[TMP4]], <1 x i64> [[TMP5]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-int64x1x3_t test_vld3_lane_s64(int64_t *a, int64x1x3_t b) {
- return vld3_lane_s64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x4x3_t @test_vld3_lane_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x half>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x half>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x half>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x half>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3lane.v4f16.p0(<4 x half> [[TMP6]], <4 x half> [[TMP7]], <4 x half> [[TMP8]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T:%.*]] poison, <4 x half> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x half> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float16x4x3_t test_vld3_lane_f16(float16_t *a, float16x4x3_t b) {
- return vld3_lane_f16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x2x3_t @test_vld3_lane_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x float>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x float>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x float>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x float>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP2]] to <8 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> [[TMP6]], <2 x float> [[TMP7]], <2 x float> [[TMP8]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T:%.*]] poison, <2 x float> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x float> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float32x2x3_t test_vld3_lane_f32(float32_t *a, float32x2x3_t b) {
- return vld3_lane_f32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x3_t @test_vld3_lane_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i64 0
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_2_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_4_16_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i64 0
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <1 x i64> [[B_SROA_4_16_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> [[TMP6]], <1 x double> [[TMP7]], <1 x double> [[TMP8]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T:%.*]] poison, <1 x double> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-float64x1x3_t test_vld3_lane_f64(float64_t *a, float64x1x3_t b) {
- return vld3_lane_f64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x3_t @test_vld3_lane_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-mfloat8x8x3_t test_vld3_lane_mf8(mfloat8_t *a, mfloat8x8x3_t b) {
- return vld3_lane_mf8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x8x3_t @test_vld3_lane_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly8x8x3_t test_vld3_lane_p8(poly8_t *a, poly8x8x3_t b) {
- return vld3_lane_p8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x4x3_t @test_vld3_lane_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[TMP3]], <4 x i16> [[TMP4]], <4 x i16> [[TMP5]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly16x4x3_t test_vld3_lane_p16(poly16_t *a, poly16x4x3_t b) {
- return vld3_lane_p16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x3_t @test_vld3_lane_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
-// CHECK-NEXT: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[TMP3]], <1 x i64> [[TMP4]], <1 x i64> [[TMP5]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 0
-// CHECK-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 1
-// CHECK-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly64x1x3_t test_vld3_lane_p64(poly64_t *a, poly64x1x3_t b) {
- return vld3_lane_p64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x16x4_t @test_vld4q_lane_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint8x16x4_t test_vld4q_lane_u8(uint8_t *a, uint8x16x4_t b) {
- return vld4q_lane_u8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x8x4_t @test_vld4q_lane_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x i16>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[TMP4]], <8 x i16> [[TMP5]], <8 x i16> [[TMP6]], <8 x i16> [[TMP7]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint16x8x4_t test_vld4q_lane_u16(uint16_t *a, uint16x8x4_t b) {
- return vld4q_lane_u16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x4x4_t @test_vld4q_lane_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x i32>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> [[TMP4]], <4 x i32> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP7]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T:%.*]] poison, <4 x i32> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i32> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint32x4x4_t test_vld4q_lane_u32(uint32_t *a, uint32x4x4_t b) {
- return vld4q_lane_u32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x2x4_t @test_vld4q_lane_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint64x2x4_t test_vld4q_lane_u64(uint64_t *a, uint64x2x4_t b) {
- return vld4q_lane_u64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x16x4_t @test_vld4q_lane_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int8x16x4_t test_vld4q_lane_s8(int8_t *a, int8x16x4_t b) {
- return vld4q_lane_s8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x8x4_t @test_vld4q_lane_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x i16>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[TMP4]], <8 x i16> [[TMP5]], <8 x i16> [[TMP6]], <8 x i16> [[TMP7]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int16x8x4_t test_vld4q_lane_s16(int16_t *a, int16x8x4_t b) {
- return vld4q_lane_s16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x4x4_t @test_vld4q_lane_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x i32>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> [[TMP4]], <4 x i32> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP7]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T:%.*]] poison, <4 x i32> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i32> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int32x4x4_t test_vld4q_lane_s32(int32_t *a, int32x4x4_t b) {
- return vld4q_lane_s32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x2x4_t @test_vld4q_lane_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int64x2x4_t test_vld4q_lane_s64(int64_t *a, int64x2x4_t b) {
- return vld4q_lane_s64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x8x4_t @test_vld4q_lane_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x half>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>
-// CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>
-// CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half>
-// CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x half>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4lane.v8f16.p0(<8 x half> [[TMP8]], <8 x half> [[TMP9]], <8 x half> [[TMP10]], <8 x half> [[TMP11]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T:%.*]] poison, <8 x half> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x half> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x half> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float16x8x4_t test_vld4q_lane_f16(float16_t *a, float16x8x4_t b) {
- return vld4q_lane_f16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x4x4_t @test_vld4q_lane_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x float>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_3_EXTRACT]] to <4 x i32>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float>
-// CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>
-// CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x float>
-// CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x float>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> [[TMP8]], <4 x float> [[TMP9]], <4 x float> [[TMP10]], <4 x float> [[TMP11]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T:%.*]] poison, <4 x float> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x float> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x float> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float32x4x4_t test_vld4q_lane_f32(float32_t *a, float32x4x4_t b) {
- return vld4q_lane_f32(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x2x4_t @test_vld4q_lane_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_3_EXTRACT]] to <2 x i64>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>
-// CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>
-// CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x double>
-// CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x double>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> [[TMP8]], <2 x double> [[TMP9]], <2 x double> [[TMP10]], <2 x double> [[TMP11]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T:%.*]] poison, <2 x double> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x double> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float64x2x4_t test_vld4q_lane_f64(float64_t *a, float64x2x4_t b) {
- return vld4q_lane_f64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x16x4_t @test_vld4q_lane_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-mfloat8x16x4_t test_vld4q_lane_mf8(mfloat8_t *a, mfloat8x16x4_t b) {
- return vld4q_lane_mf8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x16x4_t @test_vld4q_lane_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 15, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly8x16x4_t test_vld4q_lane_p8(poly8_t *a, poly8x16x4_t b) {
- return vld4q_lane_p8(a, b, 15);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x8x4_t @test_vld4q_lane_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x i16>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[TMP4]], <8 x i16> [[TMP5]], <8 x i16> [[TMP6]], <8 x i16> [[TMP7]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly16x8x4_t test_vld4q_lane_p16(poly16_t *a, poly16x8x4_t b) {
- return vld4q_lane_p16(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x4_t @test_vld4q_lane_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly64x2x4_t test_vld4q_lane_p64(poly64_t *a, poly64x2x4_t b) {
- return vld4q_lane_p64(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint8x8x4_t @test_vld4_lane_u8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint8x8x4_t test_vld4_lane_u8(uint8_t *a, uint8x8x4_t b) {
- return vld4_lane_u8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint16x4x4_t @test_vld4_lane_u16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[TMP4]], <4 x i16> [[TMP5]], <4 x i16> [[TMP6]], <4 x i16> [[TMP7]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint16x4x4_t test_vld4_lane_u16(uint16_t *a, uint16x4x4_t b) {
- return vld4_lane_u16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint32x2x4_t @test_vld4_lane_u32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> [[TMP4]], <2 x i32> [[TMP5]], <2 x i32> [[TMP6]], <2 x i32> [[TMP7]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T:%.*]] poison, <2 x i32> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i32> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint32x2x4_t test_vld4_lane_u32(uint32_t *a, uint32x2x4_t b) {
- return vld4_lane_u32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.uint64x1x4_t @test_vld4_lane_u64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[TMP4]], <1 x i64> [[TMP5]], <1 x i64> [[TMP6]], <1 x i64> [[TMP7]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-uint64x1x4_t test_vld4_lane_u64(uint64_t *a, uint64x1x4_t b) {
- return vld4_lane_u64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.int8x8x4_t @test_vld4_lane_s8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int8x8x4_t test_vld4_lane_s8(int8_t *a, int8x8x4_t b) {
- return vld4_lane_s8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.int16x4x4_t @test_vld4_lane_s16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[TMP4]], <4 x i16> [[TMP5]], <4 x i16> [[TMP6]], <4 x i16> [[TMP7]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int16x4x4_t test_vld4_lane_s16(int16_t *a, int16x4x4_t b) {
- return vld4_lane_s16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.int32x2x4_t @test_vld4_lane_s32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> [[TMP4]], <2 x i32> [[TMP5]], <2 x i32> [[TMP6]], <2 x i32> [[TMP7]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T:%.*]] poison, <2 x i32> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i32> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int32x2x4_t test_vld4_lane_s32(int32_t *a, int32x2x4_t b) {
- return vld4_lane_s32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.int64x1x4_t @test_vld4_lane_s64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[TMP4]], <1 x i64> [[TMP5]], <1 x i64> [[TMP6]], <1 x i64> [[TMP7]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-int64x1x4_t test_vld4_lane_s64(int64_t *a, int64x1x4_t b) {
- return vld4_lane_s64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.float16x4x4_t @test_vld4_lane_f16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x half>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_3_EXTRACT]] to <4 x i16>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>
-// CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>
-// CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half>
-// CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x half>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4lane.v4f16.p0(<4 x half> [[TMP8]], <4 x half> [[TMP9]], <4 x half> [[TMP10]], <4 x half> [[TMP11]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T:%.*]] poison, <4 x half> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x half> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x half> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float16x4x4_t test_vld4_lane_f16(float16_t *a, float16x4x4_t b) {
- return vld4_lane_f16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.float32x2x4_t @test_vld4_lane_f32(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x float>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_3_EXTRACT]] to <2 x i32>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP2]] to <8 x i8>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float>
-// CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float>
-// CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x float>
-// CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x float>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> [[TMP8]], <2 x float> [[TMP9]], <2 x float> [[TMP10]], <2 x float> [[TMP11]], i64 1, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T:%.*]] poison, <2 x float> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x float> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x float> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float32x2x4_t test_vld4_lane_f32(float32_t *a, float32x2x4_t b) {
- return vld4_lane_f32(a, b, 1);
-}
-
-// CHECK-LABEL: define dso_local %struct.float64x1x4_t @test_vld4_lane_f64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 0
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 1
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i64 0
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 2
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_2_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_4_16_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i64 0
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_3_EXTRACT]] to i64
-// CHECK-NEXT: [[B_SROA_6_24_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP3]], i64 0
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <1 x i64> [[B_SROA_4_16_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <1 x i64> [[B_SROA_6_24_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>
-// CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>
-// CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x double>
-// CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x double>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> [[TMP8]], <1 x double> [[TMP9]], <1 x double> [[TMP10]], <1 x double> [[TMP11]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T:%.*]] poison, <1 x double> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x double> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-float64x1x4_t test_vld4_lane_f64(float64_t *a, float64x1x4_t b) {
- return vld4_lane_f64(a, b, 0);
-}
-
-// CHECK-LABEL: define dso_local %struct.mfloat8x8x4_t @test_vld4_lane_mf8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-mfloat8x8x4_t test_vld4_lane_mf8(mfloat8_t *a, mfloat8x8x4_t b) {
- return vld4_lane_mf8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly8x8x4_t @test_vld4_lane_p8(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 3
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], i64 7, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly8x8x4_t test_vld4_lane_p8(poly8_t *a, poly8x8x4_t b) {
- return vld4_lane_p8(a, b, 7);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly16x4x4_t @test_vld4_lane_p16(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[TMP4]], <4 x i16> [[TMP5]], <4 x i16> [[TMP6]], <4 x i16> [[TMP7]], i64 3, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly16x4x4_t test_vld4_lane_p16(poly16_t *a, poly16x4x4_t b) {
- return vld4_lane_p16(a, b, 3);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x4_t @test_vld4_lane_p64(
-// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 0
-// CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 1
-// CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 2
-// CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 3
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>
-// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
-// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
-// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
-// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>
-// CHECK-NEXT: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[TMP4]], <1 x i64> [[TMP5]], <1 x i64> [[TMP6]], <1 x i64> [[TMP7]], i64 0, ptr [[A]])
-// CHECK-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 0
-// CHECK-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 1
-// CHECK-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 2
-// CHECK-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly64x1x4_t test_vld4_lane_p64(poly64_t *a, poly64x1x4_t b) {
- return vld4_lane_p64(a, b, 0);
-}
diff --git a/clang/test/CodeGen/AArch64/neon/load.c b/clang/test/CodeGen/AArch64/neon/load.c
index d733590322a3b3..0c130e434b17c8 100644
--- a/clang/test/CodeGen/AArch64/neon/load.c
+++ b/clang/test/CodeGen/AArch64/neon/load.c
@@ -2238,3 +2238,2313 @@ uint8x8_t test_vld1_dup_u8(uint8_t *a) {
// LLVM: ret <8 x i8> [[LANE]]
return vld1_dup_u8(a);
}
+
+// ALL-LABEL: @test_vld2q_u8(
+uint8x16x2_t test_vld2q_u8(uint8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
+ return vld2q_u8(a);
+}
+
+// ALL-LABEL: @test_vld2q_u16(
+uint16x8x2_t test_vld2q_u16(uint16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])
+ return vld2q_u16(a);
+}
+
+// ALL-LABEL: @test_vld2q_u32(
+uint32x4x2_t test_vld2q_u32(uint32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr [[A]])
+ return vld2q_u32(a);
+}
+
+// ALL-LABEL: @test_vld2q_u64(
+uint64x2x2_t test_vld2q_u64(uint64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])
+ return vld2q_u64(a);
+}
+
+// ALL-LABEL: @test_vld2q_s8(
+int8x16x2_t test_vld2q_s8(int8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
+ return vld2q_s8(a);
+}
+
+// ALL-LABEL: @test_vld2q_s16(
+int16x8x2_t test_vld2q_s16(int16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])
+ return vld2q_s16(a);
+}
+
+// ALL-LABEL: @test_vld2q_s32(
+int32x4x2_t test_vld2q_s32(int32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr [[A]])
+ return vld2q_s32(a);
+}
+
+// ALL-LABEL: @test_vld2q_s64(
+int64x2x2_t test_vld2q_s64(int64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])
+ return vld2q_s64(a);
+}
+
+// ALL-LABEL: @test_vld2q_f16(
+float16x8x2_t test_vld2q_f16(float16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2.v8f16.p0(ptr [[A]])
+ return vld2q_f16(a);
+}
+
+// ALL-LABEL: @test_vld2q_f32(
+float32x4x2_t test_vld2q_f32(float32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr [[A]])
+ return vld2q_f32(a);
+}
+
+// ALL-LABEL: @test_vld2q_f64(
+float64x2x2_t test_vld2q_f64(float64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr [[A]])
+ return vld2q_f64(a);
+}
+
+// ALL-LABEL: @test_vld2q_mf8(
+mfloat8x16x2_t test_vld2q_mf8(mfloat8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
+ return vld2q_mf8(a);
+}
+
+// ALL-LABEL: @test_vld2q_p8(
+poly8x16x2_t test_vld2q_p8(poly8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])
+ return vld2q_p8(a);
+}
+
+// ALL-LABEL: @test_vld2q_p16(
+poly16x8x2_t test_vld2q_p16(poly16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])
+ return vld2q_p16(a);
+}
+
+// ALL-LABEL: @test_vld2_u8(
+uint8x8x2_t test_vld2_u8(uint8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
+ return vld2_u8(a);
+}
+
+// ALL-LABEL: @test_vld2_u16(
+uint16x4x2_t test_vld2_u16(uint16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])
+ return vld2_u16(a);
+}
+
+// ALL-LABEL: @test_vld2_u32(
+uint32x2x2_t test_vld2_u32(uint32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr [[A]])
+ return vld2_u32(a);
+}
+
+// ALL-LABEL: @test_vld2_u64(
+uint64x1x2_t test_vld2_u64(uint64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])
+ return vld2_u64(a);
+}
+
+// ALL-LABEL: @test_vld2_s8(
+int8x8x2_t test_vld2_s8(int8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
+ return vld2_s8(a);
+}
+
+// ALL-LABEL: @test_vld2_s16(
+int16x4x2_t test_vld2_s16(int16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])
+ return vld2_s16(a);
+}
+
+// ALL-LABEL: @test_vld2_s32(
+int32x2x2_t test_vld2_s32(int32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr [[A]])
+ return vld2_s32(a);
+}
+
+// ALL-LABEL: @test_vld2_s64(
+int64x1x2_t test_vld2_s64(int64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])
+ return vld2_s64(a);
+}
+
+// ALL-LABEL: @test_vld2_f16(
+float16x4x2_t test_vld2_f16(float16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2.v4f16.p0(ptr [[A]])
+ return vld2_f16(a);
+}
+
+// ALL-LABEL: @test_vld2_f32(
+float32x2x2_t test_vld2_f32(float32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr [[A]])
+ return vld2_f32(a);
+}
+
+// ALL-LABEL: @test_vld2_f64(
+float64x1x2_t test_vld2_f64(float64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr [[A]])
+ return vld2_f64(a);
+}
+
+// ALL-LABEL: @test_vld2_mf8(
+mfloat8x8x2_t test_vld2_mf8(mfloat8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
+ return vld2_mf8(a);
+}
+
+// ALL-LABEL: @test_vld2_p8(
+poly8x8x2_t test_vld2_p8(poly8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])
+ return vld2_p8(a);
+}
+
+// ALL-LABEL: @test_vld2_p16(
+poly16x4x2_t test_vld2_p16(poly16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])
+ return vld2_p16(a);
+}
+
+// ALL-LABEL: @test_vld3q_u8(
+uint8x16x3_t test_vld3q_u8(uint8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
+ return vld3q_u8(a);
+}
+
+// ALL-LABEL: @test_vld3q_u16(
+uint16x8x3_t test_vld3q_u16(uint16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])
+ return vld3q_u16(a);
+}
+
+// ALL-LABEL: @test_vld3q_u32(
+uint32x4x3_t test_vld3q_u32(uint32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr [[A]])
+ return vld3q_u32(a);
+}
+
+// ALL-LABEL: @test_vld3q_u64(
+uint64x2x3_t test_vld3q_u64(uint64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])
+ return vld3q_u64(a);
+}
+
+// ALL-LABEL: @test_vld3q_s8(
+int8x16x3_t test_vld3q_s8(int8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
+ return vld3q_s8(a);
+}
+
+// ALL-LABEL: @test_vld3q_s16(
+int16x8x3_t test_vld3q_s16(int16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])
+ return vld3q_s16(a);
+}
+
+// ALL-LABEL: @test_vld3q_s32(
+int32x4x3_t test_vld3q_s32(int32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr [[A]])
+ return vld3q_s32(a);
+}
+
+// ALL-LABEL: @test_vld3q_s64(
+int64x2x3_t test_vld3q_s64(int64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])
+ return vld3q_s64(a);
+}
+
+// ALL-LABEL: @test_vld3q_f16(
+float16x8x3_t test_vld3q_f16(float16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3.v8f16.p0(ptr [[A]])
+ return vld3q_f16(a);
+}
+
+// ALL-LABEL: @test_vld3q_f32(
+float32x4x3_t test_vld3q_f32(float32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr [[A]])
+ return vld3q_f32(a);
+}
+
+// ALL-LABEL: @test_vld3q_f64(
+float64x2x3_t test_vld3q_f64(float64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr [[A]])
+ return vld3q_f64(a);
+}
+
+// ALL-LABEL: @test_vld3q_mf8(
+mfloat8x16x3_t test_vld3q_mf8(mfloat8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
+ return vld3q_mf8(a);
+}
+
+// ALL-LABEL: @test_vld3q_p8(
+poly8x16x3_t test_vld3q_p8(poly8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])
+ return vld3q_p8(a);
+}
+
+// ALL-LABEL: @test_vld3q_p16(
+poly16x8x3_t test_vld3q_p16(poly16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])
+ return vld3q_p16(a);
+}
+
+// ALL-LABEL: @test_vld3_u8(
+uint8x8x3_t test_vld3_u8(uint8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
+ return vld3_u8(a);
+}
+
+// ALL-LABEL: @test_vld3_u16(
+uint16x4x3_t test_vld3_u16(uint16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])
+ return vld3_u16(a);
+}
+
+// ALL-LABEL: @test_vld3_u32(
+uint32x2x3_t test_vld3_u32(uint32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr [[A]])
+ return vld3_u32(a);
+}
+
+// ALL-LABEL: @test_vld3_u64(
+uint64x1x3_t test_vld3_u64(uint64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])
+ return vld3_u64(a);
+}
+
+// ALL-LABEL: @test_vld3_s8(
+int8x8x3_t test_vld3_s8(int8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
+ return vld3_s8(a);
+}
+
+// ALL-LABEL: @test_vld3_s16(
+int16x4x3_t test_vld3_s16(int16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])
+ return vld3_s16(a);
+}
+
+// ALL-LABEL: @test_vld3_s32(
+int32x2x3_t test_vld3_s32(int32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr [[A]])
+ return vld3_s32(a);
+}
+
+// ALL-LABEL: @test_vld3_s64(
+int64x1x3_t test_vld3_s64(int64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])
+ return vld3_s64(a);
+}
+
+// ALL-LABEL: @test_vld3_f16(
+float16x4x3_t test_vld3_f16(float16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3.v4f16.p0(ptr [[A]])
+ return vld3_f16(a);
+}
+
+// ALL-LABEL: @test_vld3_f32(
+float32x2x3_t test_vld3_f32(float32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr [[A]])
+ return vld3_f32(a);
+}
+
+// ALL-LABEL: @test_vld3_f64(
+float64x1x3_t test_vld3_f64(float64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr [[A]])
+ return vld3_f64(a);
+}
+
+// ALL-LABEL: @test_vld3_mf8(
+mfloat8x8x3_t test_vld3_mf8(mfloat8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
+ return vld3_mf8(a);
+}
+
+// ALL-LABEL: @test_vld3_p8(
+poly8x8x3_t test_vld3_p8(poly8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])
+ return vld3_p8(a);
+}
+
+// ALL-LABEL: @test_vld3_p16(
+poly16x4x3_t test_vld3_p16(poly16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])
+ return vld3_p16(a);
+}
+
+// ALL-LABEL: @test_vld4q_u8(
+uint8x16x4_t test_vld4q_u8(uint8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
+ return vld4q_u8(a);
+}
+
+// ALL-LABEL: @test_vld4q_u16(
+uint16x8x4_t test_vld4q_u16(uint16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])
+ return vld4q_u16(a);
+}
+
+// ALL-LABEL: @test_vld4q_u32(
+uint32x4x4_t test_vld4q_u32(uint32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr [[A]])
+ return vld4q_u32(a);
+}
+
+// ALL-LABEL: @test_vld4q_u64(
+uint64x2x4_t test_vld4q_u64(uint64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])
+ return vld4q_u64(a);
+}
+
+// ALL-LABEL: @test_vld4q_s8(
+int8x16x4_t test_vld4q_s8(int8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
+ return vld4q_s8(a);
+}
+
+// ALL-LABEL: @test_vld4q_s16(
+int16x8x4_t test_vld4q_s16(int16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])
+ return vld4q_s16(a);
+}
+
+// ALL-LABEL: @test_vld4q_s32(
+int32x4x4_t test_vld4q_s32(int32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr [[A]])
+ return vld4q_s32(a);
+}
+
+// ALL-LABEL: @test_vld4q_s64(
+int64x2x4_t test_vld4q_s64(int64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])
+ return vld4q_s64(a);
+}
+
+// ALL-LABEL: @test_vld4q_f16(
+float16x8x4_t test_vld4q_f16(float16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4.v8f16.p0(ptr [[A]])
+ return vld4q_f16(a);
+}
+
+// ALL-LABEL: @test_vld4q_f32(
+float32x4x4_t test_vld4q_f32(float32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr [[A]])
+ return vld4q_f32(a);
+}
+
+// ALL-LABEL: @test_vld4q_f64(
+float64x2x4_t test_vld4q_f64(float64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr [[A]])
+ return vld4q_f64(a);
+}
+
+// ALL-LABEL: @test_vld4q_mf8(
+mfloat8x16x4_t test_vld4q_mf8(mfloat8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
+ return vld4q_mf8(a);
+}
+
+// ALL-LABEL: @test_vld4q_p8(
+poly8x16x4_t test_vld4q_p8(poly8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])
+ return vld4q_p8(a);
+}
+
+// ALL-LABEL: @test_vld4q_p16(
+poly16x8x4_t test_vld4q_p16(poly16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])
+ return vld4q_p16(a);
+}
+
+// ALL-LABEL: @test_vld4_u8(
+uint8x8x4_t test_vld4_u8(uint8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
+ return vld4_u8(a);
+}
+
+// ALL-LABEL: @test_vld4_u16(
+uint16x4x4_t test_vld4_u16(uint16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])
+ return vld4_u16(a);
+}
+
+// ALL-LABEL: @test_vld4_u32(
+uint32x2x4_t test_vld4_u32(uint32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr [[A]])
+ return vld4_u32(a);
+}
+
+// ALL-LABEL: @test_vld4_u64(
+uint64x1x4_t test_vld4_u64(uint64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])
+ return vld4_u64(a);
+}
+
+// ALL-LABEL: @test_vld4_s8(
+int8x8x4_t test_vld4_s8(int8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
+ return vld4_s8(a);
+}
+
+// ALL-LABEL: @test_vld4_s16(
+int16x4x4_t test_vld4_s16(int16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])
+ return vld4_s16(a);
+}
+
+// ALL-LABEL: @test_vld4_s32(
+int32x2x4_t test_vld4_s32(int32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr [[A]])
+ return vld4_s32(a);
+}
+
+// ALL-LABEL: @test_vld4_s64(
+int64x1x4_t test_vld4_s64(int64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])
+ return vld4_s64(a);
+}
+
+// ALL-LABEL: @test_vld4_f16(
+float16x4x4_t test_vld4_f16(float16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4.v4f16.p0(ptr [[A]])
+ return vld4_f16(a);
+}
+
+// ALL-LABEL: @test_vld4_f32(
+float32x2x4_t test_vld4_f32(float32_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr [[A]])
+ return vld4_f32(a);
+}
+
+// ALL-LABEL: @test_vld4_f64(
+float64x1x4_t test_vld4_f64(float64_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr [[A]])
+ return vld4_f64(a);
+}
+
+// ALL-LABEL: @test_vld4_mf8(
+mfloat8x8x4_t test_vld4_mf8(mfloat8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
+ return vld4_mf8(a);
+}
+
+// ALL-LABEL: @test_vld4_p8(
+poly8x8x4_t test_vld4_p8(poly8_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])
+ return vld4_p8(a);
+}
+
+// ALL-LABEL: @test_vld4_p16(
+poly16x4x4_t test_vld4_p16(poly16_t const *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])
+ return vld4_p16(a);
+}
+
+// ALL-LABEL: @test_vld2q_dup_u64(
+uint64x2x2_t test_vld2q_dup_u64(uint64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr [[A]])
+ return vld2q_dup_u64(a);
+}
+
+// ALL-LABEL: @test_vld2q_dup_s64(
+int64x2x2_t test_vld2q_dup_s64(int64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr [[A]])
+ return vld2q_dup_s64(a);
+}
+
+// ALL-LABEL: @test_vld2q_dup_f64(
+float64x2x2_t test_vld2q_dup_f64(float64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr [[A]])
+ return vld2q_dup_f64(a);
+}
+
+// ALL-LABEL: @test_vld2q_dup_mf8(
+mfloat8x16x2_t test_vld2q_dup_mf8(mfloat8_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr [[A]])
+ return vld2q_dup_mf8(a);
+}
+
+// ALL-LABEL: @test_vld2q_dup_p64(
+poly64x2x2_t test_vld2q_dup_p64(poly64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr [[A]])
+ return vld2q_dup_p64(a);
+}
+
+// ALL-LABEL: @test_vld2_dup_f64(
+float64x1x2_t test_vld2_dup_f64(float64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr [[A]])
+ return vld2_dup_f64(a);
+}
+
+// ALL-LABEL: @test_vld2_dup_mf8(
+mfloat8x8x2_t test_vld2_dup_mf8(mfloat8_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr [[A]])
+ return vld2_dup_mf8(a);
+}
+
+// ALL-LABEL: @test_vld2_dup_p64(
+poly64x1x2_t test_vld2_dup_p64(poly64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr [[A]])
+ return vld2_dup_p64(a);
+}
+
+// ALL-LABEL: @test_vld3q_dup_u64(
+uint64x2x3_t test_vld3q_dup_u64(uint64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr [[A]])
+ return vld3q_dup_u64(a);
+}
+
+// ALL-LABEL: @test_vld3q_dup_s64(
+int64x2x3_t test_vld3q_dup_s64(int64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr [[A]])
+ return vld3q_dup_s64(a);
+}
+
+// ALL-LABEL: @test_vld3q_dup_f64(
+float64x2x3_t test_vld3q_dup_f64(float64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr [[A]])
+ return vld3q_dup_f64(a);
+}
+
+// ALL-LABEL: @test_vld3q_dup_mf8(
+mfloat8x16x3_t test_vld3q_dup_mf8(mfloat8_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr [[A]])
+ return vld3q_dup_mf8(a);
+}
+
+// ALL-LABEL: @test_vld3q_dup_p64(
+poly64x2x3_t test_vld3q_dup_p64(poly64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr [[A]])
+ return vld3q_dup_p64(a);
+}
+
+// ALL-LABEL: @test_vld3_dup_f64(
+float64x1x3_t test_vld3_dup_f64(float64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr [[A]])
+ return vld3_dup_f64(a);
+}
+
+// ALL-LABEL: @test_vld3_dup_mf8(
+mfloat8x8x3_t test_vld3_dup_mf8(mfloat8_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr [[A]])
+ return vld3_dup_mf8(a);
+}
+
+// ALL-LABEL: @test_vld3_dup_p64(
+poly64x1x3_t test_vld3_dup_p64(poly64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr [[A]])
+ return vld3_dup_p64(a);
+}
+
+// ALL-LABEL: @test_vld4q_dup_u64(
+uint64x2x4_t test_vld4q_dup_u64(uint64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr [[A]])
+ return vld4q_dup_u64(a);
+}
+
+// ALL-LABEL: @test_vld4q_dup_s64(
+int64x2x4_t test_vld4q_dup_s64(int64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr [[A]])
+ return vld4q_dup_s64(a);
+}
+
+// ALL-LABEL: @test_vld4q_dup_f64(
+float64x2x4_t test_vld4q_dup_f64(float64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr [[A]])
+ return vld4q_dup_f64(a);
+}
+
+// ALL-LABEL: @test_vld4q_dup_mf8(
+mfloat8x16x4_t test_vld4q_dup_mf8(mfloat8_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr [[A]])
+ return vld4q_dup_mf8(a);
+}
+
+// ALL-LABEL: @test_vld4q_dup_p64(
+poly64x2x4_t test_vld4q_dup_p64(poly64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr [[A]])
+ return vld4q_dup_p64(a);
+}
+
+// ALL-LABEL: @test_vld4_dup_f64(
+float64x1x4_t test_vld4_dup_f64(float64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr [[A]])
+ return vld4_dup_f64(a);
+}
+
+// ALL-LABEL: @test_vld4_dup_mf8(
+mfloat8x8x4_t test_vld4_dup_mf8(mfloat8_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr [[A]])
+ return vld4_dup_mf8(a);
+}
+
+// ALL-LABEL: @test_vld4_dup_p64(
+poly64x1x4_t test_vld4_dup_p64(poly64_t *a) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4r" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr [[A]])
+ return vld4_dup_p64(a);
+}
+
+// ALL-LABEL: @test_vld2q_lane_s8(
+int8x16x2_t test_vld2q_lane_s8(int8_t const * ptr, int8x16x2_t src) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], i64 15, ptr [[A]])
+ return vld2q_lane_s8(ptr, src, 15);
+}
+
+// ALL-LABEL: @test_vld2q_lane_u8(
+uint8x16x2_t test_vld2q_lane_u8(uint8_t const * ptr, uint8x16x2_t src) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], i64 15, ptr [[A]])
+ return vld2q_lane_u8(ptr, src, 15);
+}
+
+// ALL-LABEL: @test_vld2q_lane_p8(
+poly8x16x2_t test_vld2q_lane_p8(poly8_t const * ptr, poly8x16x2_t src) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], i64 15, ptr [[A]])
+ return vld2q_lane_p8(ptr, src, 15);
+}
+
+// ALL-LABEL: @test_vld3q_lane_s8(
+int8x16x3_t test_vld3q_lane_s8(int8_t const * ptr, int8x16x3_t src) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], i64 15, ptr [[A]])
+ return vld3q_lane_s8(ptr, src, 15);
+}
+
+// ALL-LABEL: @test_vld3q_lane_u8(
+uint8x16x3_t test_vld3q_lane_u8(uint8_t const * ptr, uint8x16x3_t src) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], i64 15, ptr [[A]])
+ return vld3q_lane_u8(ptr, src, 15);
+}
+
+// ALL-LABEL: @test_vld2q_lane_u16(
+uint16x8x2_t test_vld2q_lane_u16(uint16_t *a, uint16x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !u16i>, !cir.vector<8 x !u16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], i64 7, ptr [[A]])
+ return vld2q_lane_u16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2q_lane_u32(
+uint32x4x2_t test_vld2q_lane_u32(uint32_t *a, uint32x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !u32i>, !cir.vector<4 x !u32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> [[V0]], <4 x i32> [[V1]], i64 3, ptr [[A]])
+ return vld2q_lane_u32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2q_lane_u64(
+uint64x2x2_t test_vld2q_lane_u64(uint64_t *a, uint64x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !u64i>, !cir.vector<2 x !u64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], i64 1, ptr [[A]])
+ return vld2q_lane_u64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2q_lane_s16(
+int16x8x2_t test_vld2q_lane_s16(int16_t *a, int16x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], i64 7, ptr [[A]])
+ return vld2q_lane_s16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2q_lane_s32(
+int32x4x2_t test_vld2q_lane_s32(int32_t *a, int32x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !s32i>, !cir.vector<4 x !s32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> [[V0]], <4 x i32> [[V1]], i64 3, ptr [[A]])
+ return vld2q_lane_s32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2q_lane_s64(
+int64x2x2_t test_vld2q_lane_s64(int64_t *a, int64x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], i64 1, ptr [[A]])
+ return vld2q_lane_s64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2q_lane_f16(
+float16x8x2_t test_vld2q_lane_f16(float16_t *a, float16x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !cir.f16>, !cir.vector<8 x !cir.f16>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2lane.v8f16.p0(<8 x half> [[V0]], <8 x half> [[V1]], i64 7, ptr [[A]])
+ return vld2q_lane_f16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2q_lane_f32(
+float32x4x2_t test_vld2q_lane_f32(float32_t *a, float32x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> [[V0]], <4 x float> [[V1]], i64 3, ptr [[A]])
+ return vld2q_lane_f32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2q_lane_f64(
+float64x2x2_t test_vld2q_lane_f64(float64_t *a, float64x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !cir.double>, !cir.vector<2 x !cir.double>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> [[V0]], <2 x double> [[V1]], i64 1, ptr [[A]])
+ return vld2q_lane_f64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2q_lane_mf8(
+mfloat8x16x2_t test_vld2q_lane_mf8(mfloat8_t *a, mfloat8x16x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], i64 15, ptr [[A]])
+ return vld2q_lane_mf8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld2q_lane_p16(
+poly16x8x2_t test_vld2q_lane_p16(poly16_t *a, poly16x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], i64 7, ptr [[A]])
+ return vld2q_lane_p16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2q_lane_p64(
+poly64x2x2_t test_vld2q_lane_p64(poly64_t *a, poly64x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], i64 1, ptr [[A]])
+ return vld2q_lane_p64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2_lane_u8(
+uint8x8x2_t test_vld2_lane_u8(uint8_t *a, uint8x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], i64 7, ptr [[A]])
+ return vld2_lane_u8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2_lane_u16(
+uint16x4x2_t test_vld2_lane_u16(uint16_t *a, uint16x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !u16i>, !cir.vector<4 x !u16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], i64 3, ptr [[A]])
+ return vld2_lane_u16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2_lane_u32(
+uint32x2x2_t test_vld2_lane_u32(uint32_t *a, uint32x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !u32i>, !cir.vector<2 x !u32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> [[V0]], <2 x i32> [[V1]], i64 1, ptr [[A]])
+ return vld2_lane_u32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2_lane_u64(
+uint64x1x2_t test_vld2_lane_u64(uint64_t *a, uint64x1x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<1 x !u64i>, !cir.vector<1 x !u64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], i64 0, ptr [[A]])
+ return vld2_lane_u64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld2_lane_s8(
+int8x8x2_t test_vld2_lane_s8(int8_t *a, int8x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], i64 7, ptr [[A]])
+ return vld2_lane_s8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2_lane_s16(
+int16x4x2_t test_vld2_lane_s16(int16_t *a, int16x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], i64 3, ptr [[A]])
+ return vld2_lane_s16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2_lane_s32(
+int32x2x2_t test_vld2_lane_s32(int32_t *a, int32x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !s32i>, !cir.vector<2 x !s32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> [[V0]], <2 x i32> [[V1]], i64 1, ptr [[A]])
+ return vld2_lane_s32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2_lane_s64(
+int64x1x2_t test_vld2_lane_s64(int64_t *a, int64x1x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], i64 0, ptr [[A]])
+ return vld2_lane_s64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld2_lane_f16(
+float16x4x2_t test_vld2_lane_f16(float16_t *a, float16x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !cir.f16>, !cir.vector<4 x !cir.f16>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2lane.v4f16.p0(<4 x half> [[V0]], <4 x half> [[V1]], i64 3, ptr [[A]])
+ return vld2_lane_f16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2_lane_f32(
+float32x2x2_t test_vld2_lane_f32(float32_t *a, float32x2x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<2 x !cir.float>, !cir.vector<2 x !cir.float>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> [[V0]], <2 x float> [[V1]], i64 1, ptr [[A]])
+ return vld2_lane_f32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld2_lane_f64(
+float64x1x2_t test_vld2_lane_f64(float64_t *a, float64x1x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<1 x !cir.double>, !cir.vector<1 x !cir.double>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> [[V0]], <1 x double> [[V1]], i64 0, ptr [[A]])
+ return vld2_lane_f64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld2_lane_mf8(
+mfloat8x8x2_t test_vld2_lane_mf8(mfloat8_t *a, mfloat8x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], i64 7, ptr [[A]])
+ return vld2_lane_mf8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2_lane_p8(
+poly8x8x2_t test_vld2_lane_p8(poly8_t *a, poly8x8x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], i64 7, ptr [[A]])
+ return vld2_lane_p8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld2_lane_p16(
+poly16x4x2_t test_vld2_lane_p16(poly16_t *a, poly16x4x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], i64 3, ptr [[A]])
+ return vld2_lane_p16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld2_lane_p64(
+poly64x1x2_t test_vld2_lane_p64(poly64_t *a, poly64x1x2_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2lane" {{.*}} : (!cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], i64 0, ptr [[A]])
+ return vld2_lane_p64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld3q_lane_u16(
+uint16x8x3_t test_vld3q_lane_u16(uint16_t *a, uint16x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !u16i>, !cir.vector<8 x !u16i>, !cir.vector<8 x !u16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], <8 x i16> [[V2]], i64 7, ptr [[A]])
+ return vld3q_lane_u16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3q_lane_u32(
+uint32x4x3_t test_vld3q_lane_u32(uint32_t *a, uint32x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !u32i>, !cir.vector<4 x !u32i>, !cir.vector<4 x !u32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> [[V0]], <4 x i32> [[V1]], <4 x i32> [[V2]], i64 3, ptr [[A]])
+ return vld3q_lane_u32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3q_lane_u64(
+uint64x2x3_t test_vld3q_lane_u64(uint64_t *a, uint64x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !u64i>, !cir.vector<2 x !u64i>, !cir.vector<2 x !u64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], <2 x i64> [[V2]], i64 1, ptr [[A]])
+ return vld3q_lane_u64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3q_lane_s16(
+int16x8x3_t test_vld3q_lane_s16(int16_t *a, int16x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], <8 x i16> [[V2]], i64 7, ptr [[A]])
+ return vld3q_lane_s16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3q_lane_s32(
+int32x4x3_t test_vld3q_lane_s32(int32_t *a, int32x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !s32i>, !cir.vector<4 x !s32i>, !cir.vector<4 x !s32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> [[V0]], <4 x i32> [[V1]], <4 x i32> [[V2]], i64 3, ptr [[A]])
+ return vld3q_lane_s32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3q_lane_s64(
+int64x2x3_t test_vld3q_lane_s64(int64_t *a, int64x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], <2 x i64> [[V2]], i64 1, ptr [[A]])
+ return vld3q_lane_s64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3q_lane_f16(
+float16x8x3_t test_vld3q_lane_f16(float16_t *a, float16x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !cir.f16>, !cir.vector<8 x !cir.f16>, !cir.vector<8 x !cir.f16>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3lane.v8f16.p0(<8 x half> [[V0]], <8 x half> [[V1]], <8 x half> [[V2]], i64 7, ptr [[A]])
+ return vld3q_lane_f16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3q_lane_f32(
+float32x4x3_t test_vld3q_lane_f32(float32_t *a, float32x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> [[V0]], <4 x float> [[V1]], <4 x float> [[V2]], i64 3, ptr [[A]])
+ return vld3q_lane_f32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3q_lane_f64(
+float64x2x3_t test_vld3q_lane_f64(float64_t *a, float64x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !cir.double>, !cir.vector<2 x !cir.double>, !cir.vector<2 x !cir.double>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> [[V0]], <2 x double> [[V1]], <2 x double> [[V2]], i64 1, ptr [[A]])
+ return vld3q_lane_f64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3q_lane_mf8(
+mfloat8x16x3_t test_vld3q_lane_mf8(mfloat8_t *a, mfloat8x16x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], i64 15, ptr [[A]])
+ return vld3q_lane_mf8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld3q_lane_p8(
+poly8x16x3_t test_vld3q_lane_p8(poly8_t *a, poly8x16x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], i64 15, ptr [[A]])
+ return vld3q_lane_p8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld3q_lane_p16(
+poly16x8x3_t test_vld3q_lane_p16(poly16_t *a, poly16x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], <8 x i16> [[V2]], i64 7, ptr [[A]])
+ return vld3q_lane_p16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3q_lane_p64(
+poly64x2x3_t test_vld3q_lane_p64(poly64_t *a, poly64x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], <2 x i64> [[V2]], i64 1, ptr [[A]])
+ return vld3q_lane_p64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3_lane_u8(
+uint8x8x3_t test_vld3_lane_u8(uint8_t *a, uint8x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], i64 7, ptr [[A]])
+ return vld3_lane_u8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3_lane_u16(
+uint16x4x3_t test_vld3_lane_u16(uint16_t *a, uint16x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !u16i>, !cir.vector<4 x !u16i>, !cir.vector<4 x !u16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], <4 x i16> [[V2]], i64 3, ptr [[A]])
+ return vld3_lane_u16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3_lane_u32(
+uint32x2x3_t test_vld3_lane_u32(uint32_t *a, uint32x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !u32i>, !cir.vector<2 x !u32i>, !cir.vector<2 x !u32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> [[V0]], <2 x i32> [[V1]], <2 x i32> [[V2]], i64 1, ptr [[A]])
+ return vld3_lane_u32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3_lane_u64(
+uint64x1x3_t test_vld3_lane_u64(uint64_t *a, uint64x1x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<1 x !u64i>, !cir.vector<1 x !u64i>, !cir.vector<1 x !u64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], <1 x i64> [[V2]], i64 0, ptr [[A]])
+ return vld3_lane_u64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld3_lane_s8(
+int8x8x3_t test_vld3_lane_s8(int8_t *a, int8x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], i64 7, ptr [[A]])
+ return vld3_lane_s8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3_lane_s16(
+int16x4x3_t test_vld3_lane_s16(int16_t *a, int16x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], <4 x i16> [[V2]], i64 3, ptr [[A]])
+ return vld3_lane_s16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3_lane_s32(
+int32x2x3_t test_vld3_lane_s32(int32_t *a, int32x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !s32i>, !cir.vector<2 x !s32i>, !cir.vector<2 x !s32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> [[V0]], <2 x i32> [[V1]], <2 x i32> [[V2]], i64 1, ptr [[A]])
+ return vld3_lane_s32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3_lane_s64(
+int64x1x3_t test_vld3_lane_s64(int64_t *a, int64x1x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], <1 x i64> [[V2]], i64 0, ptr [[A]])
+ return vld3_lane_s64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld3_lane_f16(
+float16x4x3_t test_vld3_lane_f16(float16_t *a, float16x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !cir.f16>, !cir.vector<4 x !cir.f16>, !cir.vector<4 x !cir.f16>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3lane.v4f16.p0(<4 x half> [[V0]], <4 x half> [[V1]], <4 x half> [[V2]], i64 3, ptr [[A]])
+ return vld3_lane_f16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3_lane_f32(
+float32x2x3_t test_vld3_lane_f32(float32_t *a, float32x2x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<2 x !cir.float>, !cir.vector<2 x !cir.float>, !cir.vector<2 x !cir.float>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> [[V0]], <2 x float> [[V1]], <2 x float> [[V2]], i64 1, ptr [[A]])
+ return vld3_lane_f32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld3_lane_f64(
+float64x1x3_t test_vld3_lane_f64(float64_t *a, float64x1x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<1 x !cir.double>, !cir.vector<1 x !cir.double>, !cir.vector<1 x !cir.double>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> [[V0]], <1 x double> [[V1]], <1 x double> [[V2]], i64 0, ptr [[A]])
+ return vld3_lane_f64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld3_lane_mf8(
+mfloat8x8x3_t test_vld3_lane_mf8(mfloat8_t *a, mfloat8x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], i64 7, ptr [[A]])
+ return vld3_lane_mf8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3_lane_p8(
+poly8x8x3_t test_vld3_lane_p8(poly8_t *a, poly8x8x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], i64 7, ptr [[A]])
+ return vld3_lane_p8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld3_lane_p16(
+poly16x4x3_t test_vld3_lane_p16(poly16_t *a, poly16x4x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], <4 x i16> [[V2]], i64 3, ptr [[A]])
+ return vld3_lane_p16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld3_lane_p64(
+poly64x1x3_t test_vld3_lane_p64(poly64_t *a, poly64x1x3_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3lane" {{.*}} : (!cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], <1 x i64> [[V2]], i64 0, ptr [[A]])
+ return vld3_lane_p64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld4q_lane_u8(
+uint8x16x4_t test_vld4q_lane_u8(uint8_t *a, uint8x16x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], <16 x i8> [[V3]], i64 15, ptr [[A]])
+ return vld4q_lane_u8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld4q_lane_u16(
+uint16x8x4_t test_vld4q_lane_u16(uint16_t *a, uint16x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !u16i>, !cir.vector<8 x !u16i>, !cir.vector<8 x !u16i>, !cir.vector<8 x !u16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], <8 x i16> [[V2]], <8 x i16> [[V3]], i64 7, ptr [[A]])
+ return vld4q_lane_u16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4q_lane_u32(
+uint32x4x4_t test_vld4q_lane_u32(uint32_t *a, uint32x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !u32i>, !cir.vector<4 x !u32i>, !cir.vector<4 x !u32i>, !cir.vector<4 x !u32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> [[V0]], <4 x i32> [[V1]], <4 x i32> [[V2]], <4 x i32> [[V3]], i64 3, ptr [[A]])
+ return vld4q_lane_u32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4q_lane_u64(
+uint64x2x4_t test_vld4q_lane_u64(uint64_t *a, uint64x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !u64i>, !cir.vector<2 x !u64i>, !cir.vector<2 x !u64i>, !cir.vector<2 x !u64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], <2 x i64> [[V2]], <2 x i64> [[V3]], i64 1, ptr [[A]])
+ return vld4q_lane_u64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4q_lane_s8(
+int8x16x4_t test_vld4q_lane_s8(int8_t *a, int8x16x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], <16 x i8> [[V3]], i64 15, ptr [[A]])
+ return vld4q_lane_s8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld4q_lane_s16(
+int16x8x4_t test_vld4q_lane_s16(int16_t *a, int16x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], <8 x i16> [[V2]], <8 x i16> [[V3]], i64 7, ptr [[A]])
+ return vld4q_lane_s16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4q_lane_s32(
+int32x4x4_t test_vld4q_lane_s32(int32_t *a, int32x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !s32i>, !cir.vector<4 x !s32i>, !cir.vector<4 x !s32i>, !cir.vector<4 x !s32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> [[V0]], <4 x i32> [[V1]], <4 x i32> [[V2]], <4 x i32> [[V3]], i64 3, ptr [[A]])
+ return vld4q_lane_s32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4q_lane_s64(
+int64x2x4_t test_vld4q_lane_s64(int64_t *a, int64x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], <2 x i64> [[V2]], <2 x i64> [[V3]], i64 1, ptr [[A]])
+ return vld4q_lane_s64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4q_lane_f16(
+float16x8x4_t test_vld4q_lane_f16(float16_t *a, float16x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !cir.f16>, !cir.vector<8 x !cir.f16>, !cir.vector<8 x !cir.f16>, !cir.vector<8 x !cir.f16>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4lane.v8f16.p0(<8 x half> [[V0]], <8 x half> [[V1]], <8 x half> [[V2]], <8 x half> [[V3]], i64 7, ptr [[A]])
+ return vld4q_lane_f16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4q_lane_f32(
+float32x4x4_t test_vld4q_lane_f32(float32_t *a, float32x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> [[V0]], <4 x float> [[V1]], <4 x float> [[V2]], <4 x float> [[V3]], i64 3, ptr [[A]])
+ return vld4q_lane_f32(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4q_lane_f64(
+float64x2x4_t test_vld4q_lane_f64(float64_t *a, float64x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !cir.double>, !cir.vector<2 x !cir.double>, !cir.vector<2 x !cir.double>, !cir.vector<2 x !cir.double>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> [[V0]], <2 x double> [[V1]], <2 x double> [[V2]], <2 x double> [[V3]], i64 1, ptr [[A]])
+ return vld4q_lane_f64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4q_lane_mf8(
+mfloat8x16x4_t test_vld4q_lane_mf8(mfloat8_t *a, mfloat8x16x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !cir.vector<16 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], <16 x i8> [[V3]], i64 15, ptr [[A]])
+ return vld4q_lane_mf8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld4q_lane_p8(
+poly8x16x4_t test_vld4q_lane_p8(poly8_t *a, poly8x16x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !cir.vector<16 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[V0]], <16 x i8> [[V1]], <16 x i8> [[V2]], <16 x i8> [[V3]], i64 15, ptr [[A]])
+ return vld4q_lane_p8(a, b, 15);
+}
+
+// ALL-LABEL: @test_vld4q_lane_p16(
+poly16x8x4_t test_vld4q_lane_p16(poly16_t *a, poly16x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !cir.vector<8 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[V0]], <8 x i16> [[V1]], <8 x i16> [[V2]], <8 x i16> [[V3]], i64 7, ptr [[A]])
+ return vld4q_lane_p16(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4q_lane_p64(
+poly64x2x4_t test_vld4q_lane_p64(poly64_t *a, poly64x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !cir.vector<2 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[V0]], <2 x i64> [[V1]], <2 x i64> [[V2]], <2 x i64> [[V3]], i64 1, ptr [[A]])
+ return vld4q_lane_p64(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4_lane_u8(
+uint8x8x4_t test_vld4_lane_u8(uint8_t *a, uint8x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], <8 x i8> [[V3]], i64 7, ptr [[A]])
+ return vld4_lane_u8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4_lane_u16(
+uint16x4x4_t test_vld4_lane_u16(uint16_t *a, uint16x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !u16i>, !cir.vector<4 x !u16i>, !cir.vector<4 x !u16i>, !cir.vector<4 x !u16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], <4 x i16> [[V2]], <4 x i16> [[V3]], i64 3, ptr [[A]])
+ return vld4_lane_u16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4_lane_u32(
+uint32x2x4_t test_vld4_lane_u32(uint32_t *a, uint32x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !u32i>, !cir.vector<2 x !u32i>, !cir.vector<2 x !u32i>, !cir.vector<2 x !u32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> [[V0]], <2 x i32> [[V1]], <2 x i32> [[V2]], <2 x i32> [[V3]], i64 1, ptr [[A]])
+ return vld4_lane_u32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4_lane_u64(
+uint64x1x4_t test_vld4_lane_u64(uint64_t *a, uint64x1x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<1 x !u64i>, !cir.vector<1 x !u64i>, !cir.vector<1 x !u64i>, !cir.vector<1 x !u64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], <1 x i64> [[V2]], <1 x i64> [[V3]], i64 0, ptr [[A]])
+ return vld4_lane_u64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld4_lane_s8(
+int8x8x4_t test_vld4_lane_s8(int8_t *a, int8x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], <8 x i8> [[V3]], i64 7, ptr [[A]])
+ return vld4_lane_s8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4_lane_s16(
+int16x4x4_t test_vld4_lane_s16(int16_t *a, int16x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], <4 x i16> [[V2]], <4 x i16> [[V3]], i64 3, ptr [[A]])
+ return vld4_lane_s16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4_lane_s32(
+int32x2x4_t test_vld4_lane_s32(int32_t *a, int32x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !s32i>, !cir.vector<2 x !s32i>, !cir.vector<2 x !s32i>, !cir.vector<2 x !s32i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> [[V0]], <2 x i32> [[V1]], <2 x i32> [[V2]], <2 x i32> [[V3]], i64 1, ptr [[A]])
+ return vld4_lane_s32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4_lane_s64(
+int64x1x4_t test_vld4_lane_s64(int64_t *a, int64x1x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], <1 x i64> [[V2]], <1 x i64> [[V3]], i64 0, ptr [[A]])
+ return vld4_lane_s64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld4_lane_f16(
+float16x4x4_t test_vld4_lane_f16(float16_t *a, float16x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !cir.f16>, !cir.vector<4 x !cir.f16>, !cir.vector<4 x !cir.f16>, !cir.vector<4 x !cir.f16>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4lane.v4f16.p0(<4 x half> [[V0]], <4 x half> [[V1]], <4 x half> [[V2]], <4 x half> [[V3]], i64 3, ptr [[A]])
+ return vld4_lane_f16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4_lane_f32(
+float32x2x4_t test_vld4_lane_f32(float32_t *a, float32x2x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<2 x !cir.float>, !cir.vector<2 x !cir.float>, !cir.vector<2 x !cir.float>, !cir.vector<2 x !cir.float>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> [[V0]], <2 x float> [[V1]], <2 x float> [[V2]], <2 x float> [[V3]], i64 1, ptr [[A]])
+ return vld4_lane_f32(a, b, 1);
+}
+
+// ALL-LABEL: @test_vld4_lane_f64(
+float64x1x4_t test_vld4_lane_f64(float64_t *a, float64x1x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<1 x !cir.double>, !cir.vector<1 x !cir.double>, !cir.vector<1 x !cir.double>, !cir.vector<1 x !cir.double>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> [[V0]], <1 x double> [[V1]], <1 x double> [[V2]], <1 x double> [[V3]], i64 0, ptr [[A]])
+ return vld4_lane_f64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld4_lane_mf8(
+mfloat8x8x4_t test_vld4_lane_mf8(mfloat8_t *a, mfloat8x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !cir.vector<8 x !u8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], <8 x i8> [[V3]], i64 7, ptr [[A]])
+ return vld4_lane_mf8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4_lane_p8(
+poly8x8x4_t test_vld4_lane_p8(poly8_t *a, poly8x8x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[V0]], <8 x i8> [[V1]], <8 x i8> [[V2]], <8 x i8> [[V3]], i64 7, ptr [[A]])
+ return vld4_lane_p8(a, b, 7);
+}
+
+// ALL-LABEL: @test_vld4_lane_p16(
+poly16x4x4_t test_vld4_lane_p16(poly16_t *a, poly16x4x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[V0]], <4 x i16> [[V1]], <4 x i16> [[V2]], <4 x i16> [[V3]], i64 3, ptr [[A]])
+ return vld4_lane_p16(a, b, 3);
+}
+
+// ALL-LABEL: @test_vld4_lane_p64(
+poly64x1x4_t test_vld4_lane_p64(poly64_t *a, poly64x1x4_t b) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4lane" {{.*}} : (!cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !cir.vector<1 x !s64i>, !s64i, !cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{[a-z ]*}}[[A:%[a-z0-9_.]+]],
+// LLVM-DAG: [[V0:%.*]] = extractvalue {{.*}} [[B:%[a-z0-9_.]+]],{{( 0,)?}} 0{{$}}
+// LLVM-DAG: [[V1:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 1{{$}}
+// LLVM-DAG: [[V2:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 2{{$}}
+// LLVM-DAG: [[V3:%.*]] = extractvalue {{.*}} [[B]],{{( 0,)?}} 3{{$}}
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[V0]], <1 x i64> [[V1]], <1 x i64> [[V2]], <1 x i64> [[V3]], i64 0, ptr [[A]])
+ return vld4_lane_p64(a, b, 0);
+}
+
+// ALL-LABEL: @test_vld2_p64(
+poly64x1x2_t test_vld2_p64(poly64_t const * ptr) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])
+ return vld2_p64(ptr);
+}
+
+// ALL-LABEL: @test_vld2q_p64(
+poly64x2x2_t test_vld2q_p64(poly64_t const * ptr) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld2" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])
+ return vld2q_p64(ptr);
+}
+
+// ALL-LABEL: @test_vld3_p64(
+poly64x1x3_t test_vld3_p64(poly64_t const * ptr) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])
+ return vld3_p64(ptr);
+}
+
+// ALL-LABEL: @test_vld3q_p64(
+poly64x2x3_t test_vld3q_p64(poly64_t const * ptr) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld3" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])
+ return vld3q_p64(ptr);
+}
+
+// ALL-LABEL: @test_vld4_p64(
+poly64x1x4_t test_vld4_p64(poly64_t const * ptr) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(8) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])
+ return vld4_p64(ptr);
+}
+
+// ALL-LABEL: @test_vld4q_p64(
+poly64x2x4_t test_vld4q_p64(poly64_t const * ptr) {
+// CIR: [[VLD:%.*]] = cir.call_llvm_intrinsic "aarch64.neon.ld4" {{.*}} : (!cir.ptr<!void>) -> [[STY:!rec_anon_struct[0-9]*]]
+// CIR: cir.store align(16) [[VLD]], {{.*}} : [[STY]], !cir.ptr<[[STY]]>
+
+// LLVM-SAME: ptr {{.*}} [[A:%.*]])
+// LLVM: call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])
+ return vld4q_p64(ptr);
+}
diff --git a/clang/test/CodeGen/AArch64/poly64.c b/clang/test/CodeGen/AArch64/poly64.c
index 3e8bd82c963ff5..83536111b61f0f 100644
--- a/clang/test/CodeGen/AArch64/poly64.c
+++ b/clang/test/CodeGen/AArch64/poly64.c
@@ -192,102 +192,6 @@ poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
return vcombine_p64(low, high);
}
-// CHECK-LABEL: define dso_local %struct.poly64x1x2_t @test_vld2_p64(
-// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[PTR]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly64x1x2_t test_vld2_p64(poly64_t const * ptr) {
- return vld2_p64(ptr);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x2_t @test_vld2q_p64(
-// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[PTR]])
-// CHECK-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 0
-// CHECK-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 1
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_1_INSERT]]
-//
-poly64x2x2_t test_vld2q_p64(poly64_t const * ptr) {
- return vld2q_p64(ptr);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x3_t @test_vld3_p64(
-// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[PTR]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly64x1x3_t test_vld3_p64(poly64_t const * ptr) {
- return vld3_p64(ptr);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x3_t @test_vld3q_p64(
-// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[PTR]])
-// CHECK-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 0
-// CHECK-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 1
-// CHECK-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 2
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_2_INSERT]]
-//
-poly64x2x3_t test_vld3q_p64(poly64_t const * ptr) {
- return vld3q_p64(ptr);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x1x4_t @test_vld4_p64(
-// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[PTR]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly64x1x4_t test_vld4_p64(poly64_t const * ptr) {
- return vld4_p64(ptr);
-}
-
-// CHECK-LABEL: define dso_local %struct.poly64x2x4_t @test_vld4q_p64(
-// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[PTR]])
-// CHECK-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 0
-// CHECK-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 1
-// CHECK-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 2
-// CHECK-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 3
-// CHECK-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 0
-// CHECK-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 1
-// CHECK-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 2
-// CHECK-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 3
-// CHECK-NEXT: ret [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_3_INSERT]]
-//
-poly64x2x4_t test_vld4q_p64(poly64_t const * ptr) {
- return vld4q_p64(ptr);
-}
-
// CHECK-LABEL: define dso_local <1 x i64> @test_vext_p64(
// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
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