[clang] [compiler-rt] [llvm] Add SuperH (1-4a) target (PR #181287)

[via cfe-commits]

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@@ -80,6 +80,8 @@ class Triple {
     riscv64,     // RISC-V (64-bit, little endian): riscv64
     riscv32be,   // RISC-V (32-bit, big endian): riscv32be
     riscv64be,   // RISC-V (64-bit, big endian): riscv64be
+    sh,          // SuperH (big endian): sh
+    shl,         // SuperH (little endian): shl
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LunaTheFoxgirl wrote:

Also note that GCC's SH backend only has differing endianess for those triples because it's hard coded to "for reasons". The actual cpu name doesn't define the endianness, you use separate compiler flags in gcc and gnu ld to select that (`-m=-<eb/el>` in gcc, `-EL/-EB` in gnu ld)

https://github.com/llvm/llvm-project/pull/181287