[clang] [Clang] Fix __builtin_clear_padding() for bitfields (PR #216063)
Victor Campos via cfe-commits
cfe-commits at lists.llvm.org
Wed Sep 16 05:24:27 PDT 2026
https://github.com/vhscampos updated https://github.com/llvm/llvm-project/pull/216063
>From 53e7461cf1dcff3e645e908d375457873d2ee936 Mon Sep 17 00:00:00 2001
From: Victor Campos <victor.campos at arm.com>
Date: Wed, 5 Aug 2026 16:05:21 +0100
Subject: [PATCH 1/3] [Clang] Fix __builtin_clear_padding() for bitfields
This patch fixes the padding clearing logic for bitfields.
The padding clearing logic for bitfields is wrong for these cases:
- Over-sized bitfields don't have their padding bits recognised as
such.
- In big endian mode, the occupied bits are wrongly determined because
the different byte order is dismissed.
A big number of new tests have also been added to cover many different
scenarios that involve bitfields. Preexisting tests had their check
patterns regenerated with the updater script.
Assisted-by: Codex. Used to help debugging and to generate tests.
---
clang/lib/AST/ASTContext.cpp | 78 +-
.../CodeGen/builtin-clear-padding-codegen.c | 4493 +++++++++-
.../builtin-clear-padding-codegen.cpp | 7235 +++++++++++++++--
3 files changed, 10654 insertions(+), 1152 deletions(-)
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index ad80074723817..61936e44f6278 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -15860,9 +15860,7 @@ struct PaddingCalculator {
auto FieldOffset = ASTLayout.getFieldOffset(Field->getFieldIndex());
if (Field->isBitField()) {
- OccuppiedIntervals.push_back(ASTContext::BitInterval{
- StartBitOffset + FieldOffset,
- StartBitOffset + FieldOffset + Field->getBitWidthValue()});
+ VisitBitfield(Field, StartBitOffset + FieldOffset);
} else {
Stack.push_back(Data{StartBitOffset + FieldOffset,
Field->getType().getCanonicalType(),
@@ -15871,6 +15869,80 @@ struct PaddingCalculator {
}
}
+ void VisitBitfield(const FieldDecl *Field, uint64_t StartBitOffset) {
+ assert(Field->isBitField() && !Field->isUnnamedBitField());
+ if (Field->isZeroLengthBitField())
+ return;
+
+ const uint64_t DeclaredSizeInBits = Field->getBitWidthValue();
+
+ // Handle over-sized bitfields:
+ // unsigned char a : 12;
+ // In this case, DeclaredSizeInBits is 12, but the actually occupied bit
+ // size is 8, while the remaining 4 bits are padding.
+ const uint64_t OccupiedSizeInBits =
+ std::min(DeclaredSizeInBits,
+ static_cast<uint64_t>(Ctx.getIntWidth(Field->getType())));
+
+ if (Ctx.getTargetInfo().isLittleEndian()) {
+ OccuppiedIntervals.push_back(
+ {StartBitOffset, StartBitOffset + OccupiedSizeInBits});
+ return;
+ }
+
+ // In big endian mode, the sequence of occupied bits traverses bytes in
+ // increasing address order, just like in little endian. However, within
+ // each byte, the traversal starts from the most significant bit. This is
+ // where it differs from little endian.
+ //
+ // If the interval contains whole bytes in the middle, then for these
+ // nothing changes, and they constitute a contiguous interval. However for
+ // the partially occupied bytes in either end, if present, their bit
+ // intervals need to be adjusted so that they count from the MSB instead.
+ //
+ // FIXME: For over-sized bitfields in BE, Clang allocates padding bits
+ // before the occupied bits. This violates the ABI rules, which say that
+ // padding should be allocated after, regardless of endianness. The current
+ // code accommodates for Clang's current behaviour though, and bumps Start
+ // forward to skip the leading padding bits.
+ const uint64_t Start =
+ StartBitOffset + DeclaredSizeInBits - OccupiedSizeInBits;
+ const uint64_t End = Start + OccupiedSizeInBits;
+ const uint64_t CharWidth = Ctx.getCharWidth();
+
+ // Special case: all the occupied bits are contained within a single byte.
+ const uint64_t ByteStart = llvm::alignDown(Start, CharWidth);
+ const uint64_t ByteEnd = llvm::alignTo(End, CharWidth);
+ if (ByteStart == ByteEnd - CharWidth) {
+ const uint64_t Length = End - Start;
+ const uint64_t Offset = Start - ByteStart;
+ OccuppiedIntervals.push_back(
+ {ByteEnd - Offset - Length, ByteEnd - Offset});
+ return;
+ }
+
+ // Compute the contiguous interval in the middle, comprised of whole bytes,
+ // if any.
+ const uint64_t MiddleIntervalStart = llvm::alignTo(Start, CharWidth);
+ const uint64_t MiddleIntervalEnd = llvm::alignDown(End, CharWidth);
+ if (MiddleIntervalStart != MiddleIntervalEnd)
+ OccuppiedIntervals.push_back({MiddleIntervalStart, MiddleIntervalEnd});
+
+ // Compute the partially occupied first byte's interval, if any, counting
+ // from the MSB.
+ if (Start != MiddleIntervalStart) {
+ const uint64_t Length = MiddleIntervalStart - Start;
+ OccuppiedIntervals.push_back({ByteStart, ByteStart + Length});
+ }
+
+ // Compute the partially occupied last byte's interval, if any, counting
+ // from the MSB.
+ if (End != MiddleIntervalEnd) {
+ const uint64_t Length = End - MiddleIntervalEnd;
+ OccuppiedIntervals.push_back({ByteEnd - Length, ByteEnd});
+ }
+ }
+
void VisitComplex(const ComplexType *CT, uint64_t StartBitOffset) {
QualType ElementQualType = CT->getElementType().getCanonicalType();
auto ElementSize = Ctx.getTypeSizeInChars(ElementQualType);
diff --git a/clang/test/CodeGen/builtin-clear-padding-codegen.c b/clang/test/CodeGen/builtin-clear-padding-codegen.c
index fceb7b623ba6d..2265414fb5f2e 100644
--- a/clang/test/CodeGen/builtin-clear-padding-codegen.c
+++ b/clang/test/CodeGen/builtin-clear-padding-codegen.c
@@ -3,8 +3,8 @@
// RUN: %clang_cc1 -std=c11 -triple=x86_64-pc-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=WINDOWS
// RUN: %clang_cc1 -std=c11 -triple=armv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-LE
// RUN: %clang_cc1 -std=c11 -triple=armebv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-BE
-// RUN: %clang_cc1 -std=c11 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-LE
-// RUN: %clang_cc1 -std=c11 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-BE
+// RUN: %clang_cc1 -std=c11 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-LE
+// RUN: %clang_cc1 -std=c11 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-BE
struct Empty {};
@@ -16,20 +16,53 @@ struct Empty {};
// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testEmpty(ptr noundef %e) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %e.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %e, ptr %e.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %e.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testEmpty(
+// WINDOWS-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testEmpty(
+// ARM-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testEmpty(
+// ARM-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testEmpty(
+// AARCH64-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testEmpty(
+// AARCH64-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
//
void testEmpty(struct Empty *e) {
// Emtpy struct is empty in C in Itanium ABI, no padding
@@ -46,12 +79,45 @@ void testEmpty(struct Empty *e) {
// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testPrimitiveNoPadding(ptr noundef %i) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %i.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %i, ptr %i.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %i.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testPrimitiveNoPadding(
+// WINDOWS-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// ARM-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// ARM-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// AARCH64-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// AARCH64-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
//
void testPrimitiveNoPadding(int *i) {
// This should not clear any padding, since int has no padding.
@@ -79,12 +145,45 @@ void testPrimitiveNoPadding(int *i) {
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testPrimitiveLongDouble(ptr noundef %ld) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %ld.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %ld, ptr %ld.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %ld.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testPrimitiveLongDouble(
+// WINDOWS-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// ARM-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// ARM-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// AARCH64-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// AARCH64-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
//
void testPrimitiveLongDouble(long double *ld) {
// padding [10, 15] on x86
@@ -109,100 +208,273 @@ void testPrimitiveLongDouble(long double *ld) {
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testBitInt(ptr noundef %bi) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %bi.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %bi, ptr %bi.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %bi.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 12
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 4
-// WINDOWS-NEXT: %3 = and i8 %2, 1
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 4
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testBitInt(
+// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitInt(
-// ARM-LE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-LE-NEXT: [[BYTE12:%.*]] = getelementptr i8, ptr [[OBJ]], i32 12
-// ARM-LE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-LE-NEXT: store i8 [[MASKED]], ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[BYTE13:%.*]] = getelementptr i8, ptr [[OBJ]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE13]], align 1
-// ARM-LE-NEXT: [[BYTE14:%.*]] = getelementptr i8, ptr [[OBJ]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE14]], align 2
-// ARM-LE-NEXT: [[BYTE15:%.*]] = getelementptr i8, ptr [[OBJ]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE15]], align 1
-// ARM-LE-NEXT: ret void
+// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
//
// ARM-BE-LABEL: define dso_local void @testBitInt(
-// ARM-BE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE0:%.*]] = getelementptr i8, ptr [[OBJ]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE0]], align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE1:%.*]] = getelementptr i8, ptr [[OBJ]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE1]], align 1
-// ARM-BE-NEXT: [[BYTE2:%.*]] = getelementptr i8, ptr [[OBJ]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE2]], align 2
-// ARM-BE-NEXT: [[BYTE3:%.*]] = getelementptr i8, ptr [[OBJ]], i32 3
-// ARM-BE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-BE-NEXT: store i8 [[MASKED]], ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: ret void
+// ARM-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitInt(
+// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitInt(
+// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testBitInt(_BitInt(97) *bi) {
// Storage is widened to 128 bits; clear bits [97, 128).
__builtin_clear_padding(bi);
}
+// LINUX-LABEL: define dso_local void @testBitIntByteAligned(
+// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitIntByteAligned(
+// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
// ARM-LE-LABEL: define dso_local void @testBitIntByteAligned(
-// ARM-LE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-LE-NEXT: [[BYTE3:%.*]] = getelementptr i8, ptr [[OBJ]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE3]], align 1
-// ARM-LE-NEXT: ret void
+// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
//
// ARM-BE-LABEL: define dso_local void @testBitIntByteAligned(
-// ARM-BE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE0:%.*]] = getelementptr i8, ptr [[OBJ]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE0]], align 4
-// ARM-BE-NEXT: ret void
+// ARM-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitIntByteAligned(
+// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitIntByteAligned(
+// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: ret void
//
void testBitIntByteAligned(_BitInt(24) *bi) {
// Storage is widened to 32 bits; clear the leading or trailing byte.
__builtin_clear_padding(bi);
}
+// LINUX-LABEL: define dso_local void @testVolatileBitInt(
+// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testVolatileBitInt(
+// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: ret void
+//
// ARM-LE-LABEL: define dso_local void @testVolatileBitInt(
-// ARM-LE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-LE-NEXT: [[BYTE12:%.*]] = getelementptr i8, ptr [[OBJ]], i32 12
-// ARM-LE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-LE-NEXT: store i8 [[MASKED]], ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[BYTE13:%.*]] = getelementptr i8, ptr [[OBJ]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE13]], align 1
-// ARM-LE-NEXT: [[BYTE14:%.*]] = getelementptr i8, ptr [[OBJ]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE14]], align 2
-// ARM-LE-NEXT: [[BYTE15:%.*]] = getelementptr i8, ptr [[OBJ]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE15]], align 1
-// ARM-LE-NEXT: ret void
+// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
//
// ARM-BE-LABEL: define dso_local void @testVolatileBitInt(
-// ARM-BE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE0:%.*]] = getelementptr i8, ptr [[OBJ]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE0]], align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE1:%.*]] = getelementptr i8, ptr [[OBJ]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE1]], align 1
-// ARM-BE-NEXT: [[BYTE2:%.*]] = getelementptr i8, ptr [[OBJ]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE2]], align 2
-// ARM-BE-NEXT: [[BYTE3:%.*]] = getelementptr i8, ptr [[OBJ]], i32 3
-// ARM-BE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-BE-NEXT: store i8 [[MASKED]], ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: ret void
+// ARM-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileBitInt(
+// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileBitInt(
+// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testVolatileBitInt(volatile _BitInt(97) *bi) {
__builtin_clear_padding(bi);
@@ -241,12 +513,45 @@ void testVolatileBitInt(volatile _BitInt(97) *bi) {
// LINUX-NEXT: store i8 0, ptr [[TMP12]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testPrimitiveComplexLongDouble(ptr noundef %c) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %c.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %c, ptr %c.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %c.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// WINDOWS-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// ARM-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// ARM-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// AARCH64-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// AARCH64-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
//
void testPrimitiveComplexLongDouble(_Complex long double *c) {
// padding [10, 15] and [26, 31] on x86
@@ -266,12 +571,45 @@ union U1 {
// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnionDifferentLength(ptr noundef %u) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %u.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %u, ptr %u.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %u.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnionDifferentLength(
+// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnionDifferentLength(
+// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnionDifferentLength(
+// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnionDifferentLength(
+// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnionDifferentLength(
+// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
//
void testUnionDifferentLength(union U1 *u) {
// This should not clear the object representation bits of the non-active member.
@@ -309,26 +647,115 @@ union U2 {
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(ptr noundef %u) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %u.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %u, ptr %u.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %u.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 4
-// WINDOWS-NEXT: store i8 0, ptr %4, align 4
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %6, align 2
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testUnionTailPaddingOfLongestMember(union U2 *u) {
// This should clear the tail padding of the longest member.
@@ -381,26 +808,115 @@ struct __attribute__((aligned(4))) Baz {
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testStructPaddingInBetweenMembers(ptr noundef %baz) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %baz.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %baz, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testStructPaddingInBetweenMembers(struct Baz *baz) {
// this should clear all the padding in between various members
@@ -429,26 +945,115 @@ void testStructPaddingInBetweenMembers(struct Baz *baz) {
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testStructVolatile(ptr noundef %baz) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %baz.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %baz, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testStructVolatile(
+// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructVolatile(
+// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructVolatile(
+// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructVolatile(
+// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructVolatile(
+// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testStructVolatile(volatile struct Baz *baz) {
// this should clear all the padding in between various members
@@ -513,26 +1118,147 @@ struct S3 {
// LINUX-NEXT: store i8 0, ptr [[TMP21]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testStructWithLongDouble(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 10
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %4, align 4
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %6, align 2
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testStructWithLongDouble(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructWithLongDouble(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructWithLongDouble(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructWithLongDouble(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 8
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 4
+// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 1
+// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 2
+// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructWithLongDouble(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 8
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 1
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 2
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testStructWithLongDouble(struct S3 *s) {
// "long double data[0-9]", PAD [10-15], "b", PAD [17-31]
@@ -559,20 +1285,348 @@ struct S11 {
// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testBitFields(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, 31
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testBitFields(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitFields(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitFields(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitFields(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitFields(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testBitFields(struct S11 *s) {
// "b1" [0-2], "b2" [3-4], PAD [5-7], "b3" [8-13], "b4" [14-15]
- // to clear 5-7, we should AND 0b00011111 (31)
+ // Little endian: preserve byte 0 with 0x1f. Big endian: use 0xf8.
+ __builtin_clear_padding(s);
+}
+
+
+struct VolatileBitfield {
+ volatile unsigned char a : 5;
+ int b : 7;
+ volatile int c : 27;
+};
+
+// LINUX-LABEL: define dso_local void @testVolatileBitfields(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testVolatileBitfields(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 127
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 7
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVolatileBitfields(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ARM-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileBitfields(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfields(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfields(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testVolatileBitfields(struct VolatileBitfield *s) {
+ __builtin_clear_padding(s);
+}
+
+// LINUX-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 127
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 7
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ARM-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testVolatileBitfieldsVolatileStruct(volatile struct VolatileBitfield *s) {
__builtin_clear_padding(s);
}
@@ -583,10 +1637,35 @@ void testBitFields(struct S11 *s) {
// LINUX-NEXT: [[I:%.*]] = alloca [4 x i32], align 16
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testArrayNoPadding() #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %i = alloca [4 x i32], align 4
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testArrayNoPadding(
+// WINDOWS-SAME: ) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrayNoPadding(
+// ARM-LE-SAME: ) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrayNoPadding(
+// ARM-BE-SAME: ) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrayNoPadding(
+// AARCH64-LE-SAME: ) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrayNoPadding(
+// AARCH64-BE-SAME: ) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// AARCH64-BE-NEXT: ret void
//
void testArrayNoPadding(void) {
int i[4];
@@ -624,10 +1703,35 @@ void testArrayNoPadding(void) {
// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testArrayLongDouble() #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %ld = alloca [2 x double], align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testArrayLongDouble(
+// WINDOWS-SAME: ) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrayLongDouble(
+// ARM-LE-SAME: ) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrayLongDouble(
+// ARM-BE-SAME: ) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrayLongDouble(
+// AARCH64-LE-SAME: ) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrayLongDouble(
+// AARCH64-BE-SAME: ) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
+// AARCH64-BE-NEXT: ret void
//
void testArrayLongDouble() {
// long double 0, [0-9] PAD [10-15]
@@ -666,34 +1770,155 @@ void testArrayLongDouble() {
// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testArrayOfStruct() #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s = alloca [2 x %struct.S_local], align 4
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %0, align 1
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %1, align 2
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 21
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %s, i32 22
-// WINDOWS-NEXT: store i8 0, ptr %7, align 2
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %s, i32 23
-// WINDOWS-NEXT: store i8 0, ptr %8, align 1
-// WINDOWS-NEXT: %9 = getelementptr i8, ptr %s, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %9, align 1
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %s, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %10, align 2
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %s, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %11, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testArrayOfStruct(
+// WINDOWS-SAME: ) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 1
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrayOfStruct(
+// ARM-LE-SAME: ) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// ARM-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrayOfStruct(
+// ARM-BE-SAME: ) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// ARM-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrayOfStruct(
+// AARCH64-LE-SAME: ) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrayOfStruct(
+// AARCH64-BE-SAME: ) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testArrayOfStruct(void) {
struct S_local {
@@ -736,20 +1961,85 @@ struct ArrOfStructsWithPadding {
// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testArrOfStructsWithPadding(ptr noundef %arr) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %arr.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %arr, ptr %arr.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %arr.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// WINDOWS-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// ARM-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// ARM-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// AARCH64-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// AARCH64-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testArrOfStructsWithPadding(struct ArrOfStructsWithPadding *arr) {
__builtin_clear_padding(arr);
@@ -767,16 +2057,65 @@ void testArrOfStructsWithPadding(struct ArrOfStructsWithPadding *arr) {
// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testAtomic(ptr noundef %bar) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %bar.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %bar, ptr %bar.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %bar.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testAtomic(
+// WINDOWS-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testAtomic(
+// ARM-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testAtomic(
+// ARM-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testAtomic(
+// AARCH64-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testAtomic(
+// AARCH64-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testAtomic(_Atomic(struct Bar)* bar) {
__builtin_clear_padding(bar);
@@ -801,20 +2140,85 @@ typedef long double LongDouble3Vec __attribute__((ext_vector_type(3)));
// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testAttributedType(ptr noundef %v) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %v.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %v, ptr %v.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %v.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %1, align 4
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %3, align 2
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testAttributedType(
+// WINDOWS-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testAttributedType(
+// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testAttributedType(
+// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testAttributedType(
+// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testAttributedType(
+// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testAttributedType(Float3Vec* v) {
__builtin_clear_padding(v);
@@ -896,28 +2300,157 @@ void testAttributedType(Float3Vec* v) {
// LINUX-NEXT: store i8 0, ptr [[TMP34]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testAttributedLongDoubleType(ptr noundef %v) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %v.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %v, ptr %v.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %v.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 24
-// WINDOWS-NEXT: store i8 0, ptr %1, align 8
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 25
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 26
-// WINDOWS-NEXT: store i8 0, ptr %3, align 2
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 27
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 28
-// WINDOWS-NEXT: store i8 0, ptr %5, align 4
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %7, align 2
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %0, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %8, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testAttributedLongDoubleType(
+// WINDOWS-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 8
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 8
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 4
+// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 1
+// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 2
+// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 4
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 1
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 2
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testAttributedLongDoubleType(LongDouble3Vec *v) {
// long double elements occupy [0-9], [16-25], [32-41] on x86.
@@ -942,20 +2475,69 @@ struct UnnamedBitfieldSingleBit {
// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, -9
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -17
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -17
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testUnnamedBitfieldSingleBit(struct UnnamedBitfieldSingleBit *s) {
- // byte 0: a[bits 0-2], unnamed[bit 3], b[bits 4-7]
- // bit 3 must be cleared
+ // Little endian: a[bits 0-2], unnamed[bit 3], b[bits 4-7].
+ // Clear bit 3 on little endian, or bit 4 on big endian.
// Mask: 0b11110111 == -9
__builtin_clear_padding(s);
}
@@ -978,16 +2560,65 @@ struct UnnamedBitfieldMiddle {
// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMiddle(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, -25
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testUnnamedBitfieldMiddle(struct UnnamedBitfieldMiddle *s) {
// byte 0: a[0-2], unnamed[3-4], b[5-7]
@@ -1018,20 +2649,85 @@ struct UnnamedBitfieldSurrounding {
// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, -4
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %5 = load i8, ptr %4, align 1
-// WINDOWS-NEXT: %6 = and i8 %5, 63
-// WINDOWS-NEXT: store i8 %6, ptr %4, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testUnnamedBitfieldSurrounding(struct UnnamedBitfieldSurrounding *s) {
// byte 0: unnamed[0-1], a[2-5], unnamed[6-7]
@@ -1076,34 +2772,148 @@ struct UnnamedZeroWidthBitfield {
// LINUX-NEXT: store i8 0, ptr [[TMP12]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 4
-// WINDOWS-NEXT: %3 = and i8 %2, 15
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 4
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 4
-// WINDOWS-NEXT: %8 = load i8, ptr %7, align 4
-// WINDOWS-NEXT: %9 = and i8 %8, 15
-// WINDOWS-NEXT: store i8 %9, ptr %7, align 4
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %10, align 1
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %11, align 2
-// WINDOWS-NEXT: %12 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %12, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// ARM-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// ARM-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// ARM-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// ARM-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// ARM-BE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], -16
+// ARM-BE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// ARM-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testUnnamedZeroWidthBitfield(struct UnnamedZeroWidthBitfield *s) {
+ // The masks below describe little endian; big endian uses 0xf0.
// byte 0: a[0-3], unnamed[4-7]
// bytes 1-3: struct padding
// bytes 4-7: b[bits 0-3], tail padding[bits 4-31]
@@ -1142,22 +2952,88 @@ struct UnnamedBitfieldMultiByte {
// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 2
-// WINDOWS-NEXT: %3 = and i8 %2, 15
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 2
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: %5 = load i8, ptr %4, align 1
-// WINDOWS-NEXT: %6 = and i8 %5, -16
-// WINDOWS-NEXT: store i8 %6, ptr %4, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 15
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 15
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
//
void testUnnamedBitfieldMultiByte(struct UnnamedBitfieldMultiByte *s) {
+ // The masks below describe little endian; big endian swaps them.
// 2 bytes: a[0-3], unnamed[4-11], b[12-15]
// byte 0: clear bits 4-7
// byte 1: clear bits 0-3
@@ -1167,3 +3043,1870 @@ void testUnnamedBitfieldMultiByte(struct UnnamedBitfieldMultiByte *s) {
// 0b11110000 == -16
__builtin_clear_padding(s);
}
+
+// Complete bytes require no clearing, including a full 64-bit bitfield.
+struct BitfieldFullBytes {
+ unsigned char first : 8;
+ unsigned char second : 8;
+ unsigned short half : 16;
+ unsigned int word : 32;
+ unsigned long long wide : 64;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldFullBytes(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldFullBytes(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldFullBytes(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldFullBytes(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldFullBytes(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldFullBytes(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldFullBytes(struct BitfieldFullBytes *s) {
+ __builtin_clear_padding(s);
+}
+
+// The value ends exactly at a byte boundary. Preserve masks are 0xf8, 0xff
+// on little endian and 0x1f, 0xff on big endian.
+struct BitfieldEndAligned {
+ unsigned short : 3;
+ unsigned short value : 13;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldEndAligned(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldEndAligned(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldEndAligned(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldEndAligned(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldEndAligned(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldEndAligned(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldEndAligned(struct BitfieldEndAligned *s) {
+ __builtin_clear_padding(s);
+}
+
+// A normal field with two partial endpoints and a complete middle byte.
+// Preserve masks are 0xf8, 0xff, 0x1f, 0x00 on little endian and
+// 0x1f, 0xff, 0xf8, 0x00 on big endian.
+struct BitfieldPartialEnds {
+ unsigned int : 3;
+ unsigned int value : 18;
+ unsigned int : 11;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldPartialEnds(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldPartialEnds(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldPartialEnds(struct BitfieldPartialEnds *s) {
+ __builtin_clear_padding(s);
+}
+
+// An asymmetric single-bit interval catches endpoint and reflection errors.
+struct BitfieldSingleValueBit {
+ unsigned char : 2;
+ unsigned char value : 1;
+ unsigned char : 5;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldSingleValueBit(struct BitfieldSingleValueBit *s) {
+ __builtin_clear_padding(s);
+}
+
+// Ordinary members share bitfield containers on Arm, and separate two runs of
+// bitfields. Clearing padding must preserve every ordinary member.
+struct BitfieldMixedMembers {
+ unsigned char prefix;
+ unsigned int first : 3;
+ unsigned char separator;
+ unsigned int second : 5;
+ unsigned short suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldMixedMembers(struct BitfieldMixedMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldMixedMembersVolatileObject(
+ volatile struct BitfieldMixedMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+struct BitfieldMixedVolatileMembers {
+ unsigned char prefix;
+ volatile unsigned int first : 3;
+ unsigned char separator;
+ volatile unsigned int second : 5;
+ unsigned short suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldMixedVolatileMembers(struct BitfieldMixedVolatileMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldMixedVolatileMembersAndObject(
+ volatile struct BitfieldMixedVolatileMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// Both array elements have partial-byte padding, and neither starts at offset
+// zero in the enclosing object. Preserve the prefix and suffix too.
+struct BitfieldNestedArray {
+ unsigned char prefix[3];
+ struct BitfieldPartialEnds elements[2];
+ unsigned char suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldNestedArray(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// LINUX-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// LINUX-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// LINUX-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// LINUX-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// LINUX-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// LINUX-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// LINUX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// LINUX-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// LINUX-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// LINUX-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// LINUX-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP15]], align 1
+// LINUX-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP16]], align 1
+// LINUX-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP17]], align 2
+// LINUX-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP18]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldNestedArray(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// WINDOWS-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// WINDOWS-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// WINDOWS-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// WINDOWS-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// WINDOWS-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// WINDOWS-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// WINDOWS-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldNestedArray(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// ARM-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// ARM-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// ARM-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// ARM-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// ARM-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// ARM-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// ARM-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// ARM-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldNestedArray(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 31
+// ARM-BE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], -8
+// ARM-BE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// ARM-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// ARM-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -8
+// ARM-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// ARM-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// ARM-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// ARM-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldNestedArray(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// AARCH64-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// AARCH64-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldNestedArray(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// AARCH64-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldNestedArray(struct BitfieldNestedArray *s) {
+ __builtin_clear_padding(s);
+}
+
+// The raw member occupies the first byte, including padding in the fields
+// member. Only padding shared by both union alternatives may be cleared.
+union BitfieldUnionOverlay {
+ struct BitfieldPartialEnds fields;
+ unsigned char raw;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldUnionOverlay(union BitfieldUnionOverlay *s) {
+ __builtin_clear_padding(s);
+}
+
+enum BitfieldState { StateZero, StateOne, StateTwo, StateThree };
+struct BitfieldBoolEnum {
+ _Bool flag : 1;
+ enum BitfieldState state : 2;
+ unsigned char payload : 3;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldBoolEnum(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldBoolEnum(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 3
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 7
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldBoolEnum(struct BitfieldBoolEnum *s) {
+ __builtin_clear_padding(s);
+}
+
+// Exercise bit-precise declared types and an occupied width greater than 32.
+struct BitfieldBitIntMembers {
+ unsigned _BitInt(9) small : 5;
+ signed _BitInt(17) medium : 13;
+ unsigned _BitInt(65) wide : 61;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 4
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 2
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 8
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 8
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// WINDOWS-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 16
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 8
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 4
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP21]], align 2
+// WINDOWS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP22]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -2
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -2
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldBitIntMembers(struct BitfieldBitIntMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// Packing permits the wide field to straddle its declared type's usual
+// storage-unit boundary on Arm. Ordinary members surround the bitfield run.
+struct __attribute__((packed)) BitfieldPackedMembers {
+ unsigned char prefix;
+ unsigned int first : 5;
+ unsigned long long wide : 60;
+ unsigned char suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldPackedMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldPackedMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -128
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -128
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldPackedMembers(struct BitfieldPackedMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// There are no occupied intervals: clear the entire object representation.
+struct BitfieldUnnamedOnly {
+ unsigned int : 3;
+ unsigned int : 0;
+ unsigned char : 2;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+void testBitfieldUnnamedOnly(struct BitfieldUnnamedOnly *s) {
+ __builtin_clear_padding(s);
+}
diff --git a/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp b/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
index 2de4645fa62a8..858b43168a67d 100644
--- a/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
+++ b/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
@@ -1,15 +1,16 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
+// Test functions use C linkage so the updater recognizes their Windows names.
// RUN: %clang_cc1 -std=c++20 -triple=x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=LINUX
// RUN: %clang_cc1 -std=c++20 -triple=x86_64-pc-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=WINDOWS
// RUN: %clang_cc1 -std=c++20 -triple=armv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-LE
// RUN: %clang_cc1 -std=c++20 -triple=armebv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-BE
-// RUN: %clang_cc1 -std=c++20 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-LE
-// RUN: %clang_cc1 -std=c++20 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-BE
+// RUN: %clang_cc1 -std=c++20 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-LE
+// RUN: %clang_cc1 -std=c++20 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-BE
struct Empty {};
-// LINUX-LABEL: define dso_local void @_Z9testEmptyP5Empty(
+// LINUX-LABEL: define dso_local void @testEmpty(
// LINUX-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
@@ -19,22 +20,64 @@ struct Empty {};
// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testEmpty@@YAXPEAUEmpty@@@Z"(ptr noundef %e) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %e.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %e, ptr %e.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %e.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testEmpty(
+// WINDOWS-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
//
-void testEmpty(Empty *e) {
+// ARM-LE-LABEL: define dso_local void @testEmpty(
+// ARM-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testEmpty(
+// ARM-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testEmpty(
+// AARCH64-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testEmpty(
+// AARCH64-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testEmpty(Empty *e) {
// This should clear the one byte that Empty occupies.
__builtin_clear_padding(e);
}
-// LINUX-LABEL: define dso_local void @_Z22testPrimitiveNoPaddingPi(
+
+// LINUX-LABEL: define dso_local void @testPrimitiveNoPadding(
// LINUX-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
@@ -42,20 +85,54 @@ void testEmpty(Empty *e) {
// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testPrimitiveNoPadding@@YAXPEAH at Z"(ptr noundef %i) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %i.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %i, ptr %i.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %i.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testPrimitiveNoPadding(
+// WINDOWS-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// ARM-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// ARM-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// AARCH64-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
//
-void testPrimitiveNoPadding(int *i) {
+// AARCH64-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
+// AARCH64-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testPrimitiveNoPadding(int *i) {
// This should not clear any padding, since int has no padding.
__builtin_clear_padding(i);
}
-// LINUX-LABEL: define dso_local void @_Z23testPrimitiveLongDoublePe(
+
+// LINUX-LABEL: define dso_local void @testPrimitiveLongDouble(
// LINUX-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
@@ -75,19 +152,53 @@ void testPrimitiveNoPadding(int *i) {
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testPrimitiveLongDouble@@YAXPEAO at Z"(ptr noundef %ld) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %ld.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %ld, ptr %ld.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %ld.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testPrimitiveLongDouble(
+// WINDOWS-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// ARM-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// ARM-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
+// ARM-BE-NEXT: ret void
//
-void testPrimitiveLongDouble(long double *ld) {
+// AARCH64-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// AARCH64-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
+// AARCH64-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testPrimitiveLongDouble(long double *ld) {
// padding [10, 15] on x86
__builtin_clear_padding(ld);
}
-// LINUX-LABEL: define dso_local void @_Z10testBitIntPDB97_(
+
+// LINUX-LABEL: define dso_local void @testBitInt(
// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
@@ -105,107 +216,281 @@ void testPrimitiveLongDouble(long double *ld) {
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testBitInt@@YAXPEAU?$_BitInt@$0GB@@__clang@@@Z"(ptr noundef %bi) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %bi.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %bi, ptr %bi.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %bi.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 12
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 4
-// WINDOWS-NEXT: %3 = and i8 %2, 1
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 4
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @_Z10testBitIntPDB97_(
-// ARM-LE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-LE-NEXT: [[BYTE12:%.*]] = getelementptr i8, ptr [[OBJ]], i32 12
-// ARM-LE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-LE-NEXT: store i8 [[MASKED]], ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[BYTE13:%.*]] = getelementptr i8, ptr [[OBJ]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE13]], align 1
-// ARM-LE-NEXT: [[BYTE14:%.*]] = getelementptr i8, ptr [[OBJ]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE14]], align 2
-// ARM-LE-NEXT: [[BYTE15:%.*]] = getelementptr i8, ptr [[OBJ]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE15]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @_Z10testBitIntPDB97_(
-// ARM-BE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE0:%.*]] = getelementptr i8, ptr [[OBJ]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE0]], align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE1:%.*]] = getelementptr i8, ptr [[OBJ]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE1]], align 1
-// ARM-BE-NEXT: [[BYTE2:%.*]] = getelementptr i8, ptr [[OBJ]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE2]], align 2
-// ARM-BE-NEXT: [[BYTE3:%.*]] = getelementptr i8, ptr [[OBJ]], i32 3
-// ARM-BE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-BE-NEXT: store i8 [[MASKED]], ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: ret void
-//
-void testBitInt(_BitInt(97) *bi) {
+// WINDOWS-LABEL: define dso_local void @testBitInt(
+// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitInt(
+// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitInt(
+// ARM-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitInt(
+// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitInt(
+// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitInt(_BitInt(97) *bi) {
// Storage is widened to 128 bits; clear bits [97, 128).
__builtin_clear_padding(bi);
}
-// ARM-LE-LABEL: define dso_local void @_Z21testBitIntByteAlignedPDB24_(
-// ARM-LE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-LE-NEXT: [[BYTE3:%.*]] = getelementptr i8, ptr [[OBJ]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE3]], align 1
-// ARM-LE-NEXT: ret void
+
+// LINUX-LABEL: define dso_local void @testBitIntByteAligned(
+// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitIntByteAligned(
+// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitIntByteAligned(
+// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitIntByteAligned(
+// ARM-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitIntByteAligned(
+// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
//
-// ARM-BE-LABEL: define dso_local void @_Z21testBitIntByteAlignedPDB24_(
-// ARM-BE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE0:%.*]] = getelementptr i8, ptr [[OBJ]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE0]], align 4
-// ARM-BE-NEXT: ret void
+// AARCH64-BE-LABEL: define dso_local void @testBitIntByteAligned(
+// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: ret void
//
-void testBitIntByteAligned(_BitInt(24) *bi) {
+extern "C" void testBitIntByteAligned(_BitInt(24) *bi) {
// Storage is widened to 32 bits; clear the leading or trailing byte.
__builtin_clear_padding(bi);
}
-// ARM-LE-LABEL: define dso_local void @_Z18testVolatileBitIntPVDB97_(
-// ARM-LE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-LE-NEXT: [[BYTE12:%.*]] = getelementptr i8, ptr [[OBJ]], i32 12
-// ARM-LE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-LE-NEXT: store i8 [[MASKED]], ptr [[BYTE12]], align 4
-// ARM-LE-NEXT: [[BYTE13:%.*]] = getelementptr i8, ptr [[OBJ]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE13]], align 1
-// ARM-LE-NEXT: [[BYTE14:%.*]] = getelementptr i8, ptr [[OBJ]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE14]], align 2
-// ARM-LE-NEXT: [[BYTE15:%.*]] = getelementptr i8, ptr [[OBJ]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[BYTE15]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @_Z18testVolatileBitIntPVDB97_(
-// ARM-BE: [[OBJ:%.*]] = load ptr, ptr {{.*}}, align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE0:%.*]] = getelementptr i8, ptr [[OBJ]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE0]], align {{[0-9]+}}
-// ARM-BE-NEXT: [[BYTE1:%.*]] = getelementptr i8, ptr [[OBJ]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE1]], align 1
-// ARM-BE-NEXT: [[BYTE2:%.*]] = getelementptr i8, ptr [[OBJ]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[BYTE2]], align 2
-// ARM-BE-NEXT: [[BYTE3:%.*]] = getelementptr i8, ptr [[OBJ]], i32 3
-// ARM-BE-NEXT: [[VALUE:%.*]] = load i8, ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: [[MASKED:%.*]] = and i8 [[VALUE]], 1
-// ARM-BE-NEXT: store i8 [[MASKED]], ptr [[BYTE3]], align 1
-// ARM-BE-NEXT: ret void
-//
-void testVolatileBitInt(volatile _BitInt(97) *bi) {
+// LINUX-LABEL: define dso_local void @testVolatileBitInt(
+// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testVolatileBitInt(
+// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVolatileBitInt(
+// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileBitInt(
+// ARM-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileBitInt(
+// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileBitInt(
+// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVolatileBitInt(volatile _BitInt(97) *bi) {
__builtin_clear_padding(bi);
}
-// LINUX-LABEL: define dso_local void @_Z30testPrimitiveComplexLongDoublePCe(
+// LINUX-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
// LINUX-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
@@ -237,24 +522,58 @@ void testVolatileBitInt(volatile _BitInt(97) *bi) {
// LINUX-NEXT: store i8 0, ptr [[TMP12]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testPrimitiveComplexLongDouble@@YAXPEAU?$_Complex at O@__clang@@@Z"(ptr noundef %c) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %c.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %c, ptr %c.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %c.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// WINDOWS-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// ARM-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// ARM-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
+// ARM-BE-NEXT: ret void
//
-void testPrimitiveComplexLongDouble(_Complex long double *c) {
+// AARCH64-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// AARCH64-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// AARCH64-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testPrimitiveComplexLongDouble(_Complex long double *c) {
// padding [10, 15] and [26, 31] on x86
__builtin_clear_padding(c);
}
+
union U1 {
int i;
char c;
};
-// LINUX-LABEL: define dso_local void @_Z24testUnionDifferentLengthP2U1(
+// LINUX-LABEL: define dso_local void @testUnionDifferentLength(
// LINUX-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
@@ -262,19 +581,53 @@ union U1 {
// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnionDifferentLength@@YAXPEATU1@@@Z"(ptr noundef %u) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %u.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %u, ptr %u.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %u.addr, align 8
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testUnionDifferentLength(
+// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnionDifferentLength(
+// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: ret void
//
-void testUnionDifferentLength(U1 *u) {
+// ARM-BE-LABEL: define dso_local void @testUnionDifferentLength(
+// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnionDifferentLength(
+// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnionDifferentLength(
+// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnionDifferentLength(U1 *u) {
// This should not clear the object representation bits of the non-active member.
__builtin_clear_padding(u);
}
+
struct S {
alignas(8) char c1;
};
@@ -284,7 +637,7 @@ union U2 {
char c2;
};
-// LINUX-LABEL: define dso_local void @_Z35testUnionTailPaddingOfLongestMemberP2U2(
+// LINUX-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
// LINUX-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
@@ -306,34 +659,124 @@ union U2 {
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnionTailPaddingOfLongestMember@@YAXPEATU2@@@Z"(ptr noundef %u) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %u.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %u, ptr %u.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %u.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 4
-// WINDOWS-NEXT: store i8 0, ptr %4, align 4
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %6, align 2
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
-//
-void testUnionTailPaddingOfLongestMember(U2 *u) {
+// WINDOWS-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnionTailPaddingOfLongestMember(U2 *u) {
// This should clear the tail padding of the longest member.
// [1 - 7]
__builtin_clear_padding(u);
}
+
struct alignas(4) Foo {
char a;
alignas(2) char b;
@@ -355,7 +798,7 @@ struct alignas(4) Baz : Foo {
// %struct.Foo = type { i8, i8, i8, i8 }
// %struct.Bar = type { i8, i8, i8, i8 }
-// LINUX-LABEL: define dso_local void @_Z33testStructPaddingInBetweenMembersP3Baz(
+// LINUX-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
// LINUX-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
@@ -377,33 +820,123 @@ struct alignas(4) Baz : Foo {
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testStructPaddingInBetweenMembers@@YAXPEAUBaz@@@Z"(ptr noundef %baz) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %baz.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %baz, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
-//
-void testStructPaddingInBetweenMembers(Baz *baz) {
+// WINDOWS-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testStructPaddingInBetweenMembers(Baz *baz) {
// this should clear all the padding in between various members
__builtin_clear_padding(baz);
}
-// LINUX-LABEL: define dso_local void @_Z18testStructVolatilePV3Baz(
+
+// LINUX-LABEL: define dso_local void @testStructVolatile(
// LINUX-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
@@ -425,32 +958,122 @@ void testStructPaddingInBetweenMembers(Baz *baz) {
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testStructVolatile@@YAXPECUBaz@@@Z"(ptr noundef %baz) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %baz.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %baz, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %baz.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
-//
-void testStructVolatile(volatile Baz *baz) {
+// WINDOWS-LABEL: define dso_local void @testStructVolatile(
+// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructVolatile(
+// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructVolatile(
+// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructVolatile(
+// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructVolatile(
+// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testStructVolatile(volatile Baz *baz) {
// this should clear all the padding in between various members
__builtin_clear_padding(baz);
}
+
class S1 {
int x;
char c;
@@ -461,7 +1084,7 @@ class S2 {
bool b;
};
-// LINUX-LABEL: define dso_local void @_Z19testNoUniqueAddressP2S2(
+// LINUX-LABEL: define dso_local void @testNoUniqueAddress(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -473,36 +1096,86 @@ class S2 {
// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testNoUniqueAddress@@YAXPEAVS2@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 10
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: ret void
-//
-void testNoUniqueAddress(S2 *s) {
+// WINDOWS-LABEL: define dso_local void @testNoUniqueAddress(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testNoUniqueAddress(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testNoUniqueAddress(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testNoUniqueAddress(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testNoUniqueAddress(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testNoUniqueAddress(S2 *s) {
// "x [0-3]", "c" , "b", PAD [6-7]
__builtin_clear_padding(s);
}
+
struct S3 {
long double l;
bool b;
};
-// LINUX-LABEL: define dso_local void @_Z24testStructWithLongDoubleP2S3(
+// LINUX-LABEL: define dso_local void @testStructWithLongDouble(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -552,32 +1225,154 @@ struct S3 {
// LINUX-NEXT: store i8 0, ptr [[TMP21]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testStructWithLongDouble@@YAXPEAUS3@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 9
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 10
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 11
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %4, align 4
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %6, align 2
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: ret void
-//
-void testStructWithLongDouble(S3 *s) {
+// WINDOWS-LABEL: define dso_local void @testStructWithLongDouble(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructWithLongDouble(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructWithLongDouble(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructWithLongDouble(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 8
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 4
+// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 1
+// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 2
+// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructWithLongDouble(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 8
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 1
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 2
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testStructWithLongDouble(S3 *s) {
// "long double data[0-9]", PAD [10-15], "b", PAD [17-31]
__builtin_clear_padding(s);
}
+
struct B {
int i;
};
@@ -585,7 +1380,7 @@ struct S4 : Empty, B {
bool b;
};
-// LINUX-LABEL: define dso_local void @_Z23testStructWithEmptyBaseP2S4(
+// LINUX-LABEL: define dso_local void @testStructWithEmptyBase(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -599,24 +1394,82 @@ struct S4 : Empty, B {
// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testStructWithEmptyBase@@YAXPEAUS4@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: ret void
-//
-void testStructWithEmptyBase(S4 *s) {
+// WINDOWS-LABEL: define dso_local void @testStructWithEmptyBase(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testStructWithEmptyBase(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testStructWithEmptyBase(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testStructWithEmptyBase(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testStructWithEmptyBase(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testStructWithEmptyBase(S4 *s) {
// "i" [0-3], "b" [4], PAD [5-7]
__builtin_clear_padding(s);
}
+
struct B1 {
char c1;
};
@@ -626,7 +1479,7 @@ struct B2 {
struct S5 : B1, B2 {
};
-// LINUX-LABEL: define dso_local void @_Z23testPaddingBetweenBasesP2S5(
+// LINUX-LABEL: define dso_local void @testPaddingBetweenBases(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -646,30 +1499,112 @@ struct S5 : B1, B2 {
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testPaddingBetweenBases@@YAXPEAUS5@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: ret void
-//
-void testPaddingBetweenBases(S5 *s) {
+// WINDOWS-LABEL: define dso_local void @testPaddingBetweenBases(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPaddingBetweenBases(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPaddingBetweenBases(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testPaddingBetweenBases(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPaddingBetweenBases(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testPaddingBetweenBases(S5 *s) {
// "c1" [0], PAD [1-3] , "c2" [4], PAD [5-7]
__builtin_clear_padding(s);
}
+
struct B3 {
char c1;
};
@@ -682,7 +1617,7 @@ struct S6 : B3, B4 {
alignas(4) char c3;
};
-// LINUX-LABEL: define dso_local void @_Z24testPaddingAfterLastBaseP2S6(
+// LINUX-LABEL: define dso_local void @testPaddingAfterLastBase(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -700,32 +1635,108 @@ struct S6 : B3, B4 {
// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testPaddingAfterLastBase@@YAXPEAUS6@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %1, align 2
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: ret void
-//
-void testPaddingAfterLastBase(S6 *s) {
+// WINDOWS-LABEL: define dso_local void @testPaddingAfterLastBase(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testPaddingAfterLastBase(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testPaddingAfterLastBase(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testPaddingAfterLastBase(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testPaddingAfterLastBase(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testPaddingAfterLastBase(S6 *s) {
// "c1"[0], "c2"[1], PAD [2-3], "c3" [4], PAD [5-7]
__builtin_clear_padding(s);
}
+
struct VirtualBase {
unsigned int x;
+//
virtual int call() { return x; };
+//
virtual ~VirtualBase() = default;
};
@@ -734,11 +1745,12 @@ struct NonVirtualBase {
};
struct S7 : VirtualBase, NonVirtualBase {
+//
virtual int call() override { return 5; }
bool z;
};
-// LINUX-LABEL: define dso_local void @_Z10testVtable2S7(
+// LINUX-LABEL: define dso_local void @testVtable(
// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
@@ -749,52 +1761,101 @@ struct S7 : VirtualBase, NonVirtualBase {
// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testVtable@@YAXUS7@@@Z"(ptr nofreeobj noundef align 8 dead_on_return dereferenceable(24) %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.indirect_addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.indirect_addr, align 8
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %0, align 4
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 18
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 19
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 20
-// WINDOWS-NEXT: store i8 0, ptr %6, align 4
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %s, i32 21
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %s, i32 22
-// WINDOWS-NEXT: store i8 0, ptr %8, align 2
-// WINDOWS-NEXT: %9 = getelementptr i8, ptr %s, i32 23
-// WINDOWS-NEXT: store i8 0, ptr %9, align 1
-// WINDOWS-NEXT: call void @"??1S7@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(24) dereferenceable(24) %s) #1
-// WINDOWS-NEXT: ret void
-//
-void testVtable(S7 s) {
+// WINDOWS-LABEL: define dso_local void @testVtable(
+// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 4
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: call void @"??1S7@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(24) dereferenceable(24) [[S]]) #[[ATTR1:[0-9]+]]
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVtable(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVtable(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVtable(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVtable(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVtable(S7 s) {
// "vtable ptr" [0-7], "x" [8-11], "y" [12], "z" [13], PAD [14-15]
__builtin_clear_padding(&s);
}
+
struct VirtualBase1 {
unsigned int x1;
+//
virtual int call1() { return x1; };
virtual ~VirtualBase1() = default;
};
struct VirtualBase2 {
unsigned int x2;
+//
virtual int call2() { return x2; };
virtual ~VirtualBase2() = default;
};
struct VirtualBase3 {
unsigned int x3;
+//
virtual int call3() { return x3; };
virtual ~VirtualBase3() = default;
};
@@ -803,11 +1864,12 @@ struct NonVirtualBase1 {
char y;
};
struct S8 : VirtualBase1, VirtualBase2, NonVirtualBase1, VirtualBase3 {
+//
virtual int call1() override { return 5; }
bool z;
};
-// LINUX-LABEL: define dso_local void @_Z23testMultipleBasesVtable2S8(
+// LINUX-LABEL: define dso_local void @testMultipleBasesVtable(
// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
@@ -834,70 +1896,167 @@ struct S8 : VirtualBase1, VirtualBase2, NonVirtualBase1, VirtualBase3 {
// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testMultipleBasesVtable@@YAXUS8@@@Z"(ptr nofreeobj noundef align 8 dead_on_return dereferenceable(56) %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.indirect_addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.indirect_addr, align 8
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %0, align 4
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 28
-// WINDOWS-NEXT: store i8 0, ptr %4, align 4
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %6, align 2
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %s, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %s, i32 44
-// WINDOWS-NEXT: store i8 0, ptr %8, align 4
-// WINDOWS-NEXT: %9 = getelementptr i8, ptr %s, i32 45
-// WINDOWS-NEXT: store i8 0, ptr %9, align 1
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %s, i32 46
-// WINDOWS-NEXT: store i8 0, ptr %10, align 2
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %s, i32 47
-// WINDOWS-NEXT: store i8 0, ptr %11, align 1
-// WINDOWS-NEXT: %12 = getelementptr i8, ptr %s, i32 50
-// WINDOWS-NEXT: store i8 0, ptr %12, align 2
-// WINDOWS-NEXT: %13 = getelementptr i8, ptr %s, i32 51
-// WINDOWS-NEXT: store i8 0, ptr %13, align 1
-// WINDOWS-NEXT: %14 = getelementptr i8, ptr %s, i32 52
-// WINDOWS-NEXT: store i8 0, ptr %14, align 4
-// WINDOWS-NEXT: %15 = getelementptr i8, ptr %s, i32 53
-// WINDOWS-NEXT: store i8 0, ptr %15, align 1
-// WINDOWS-NEXT: %16 = getelementptr i8, ptr %s, i32 54
-// WINDOWS-NEXT: store i8 0, ptr %16, align 2
-// WINDOWS-NEXT: %17 = getelementptr i8, ptr %s, i32 55
-// WINDOWS-NEXT: store i8 0, ptr %17, align 1
-// WINDOWS-NEXT: call void @"??1S8@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(56) dereferenceable(56) %s) #1
-// WINDOWS-NEXT: ret void
-//
-void testMultipleBasesVtable(S8 s) {
+// WINDOWS-LABEL: define dso_local void @testMultipleBasesVtable(
+// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(56) [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 4
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 28
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 44
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 45
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 46
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 47
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[S]], i32 50
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 2
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[S]], i32 51
+// WINDOWS-NEXT: store i8 0, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[S]], i32 52
+// WINDOWS-NEXT: store i8 0, ptr [[TMP14]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[S]], i32 53
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[S]], i32 54
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 2
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[S]], i32 55
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 1
+// WINDOWS-NEXT: call void @"??1S8@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(56) dereferenceable(56) [[S]]) #[[ATTR1]]
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testMultipleBasesVtable(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 17
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testMultipleBasesVtable(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 17
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testMultipleBasesVtable(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 4
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 45
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 46
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 47
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testMultipleBasesVtable(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 4
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 45
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 46
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 47
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testMultipleBasesVtable(S8 s) {
// "vtable ptr" [0-7], "x1" [8-11], PAD "[12-15]",
// "vtable ptr" [16-23], "x2" [24-27], "y" [28], PAD "[29-31]",
// "vtable_ptr" [32-39], "x3" [40-43], "z" [44], PAD [45-47]
__builtin_clear_padding(&s);
}
+
struct VirtualChain1 {
unsigned int x1;
+//
virtual int call1() { return x1; };
virtual ~VirtualChain1() = default;
};
struct VirtualChain2 : VirtualChain1 {
unsigned int x2;
+//
virtual int call2() { return x2; };
virtual ~VirtualChain2() = default;
};
struct VirtualChain3 : VirtualChain2 {
unsigned int x3;
+//
virtual int call3() { return x3; };
virtual ~VirtualChain3() = default;
};
@@ -910,7 +2069,7 @@ struct S9 : NonVirtualBase2, VirtualChain3 {
bool z;
};
-// LINUX-LABEL: define dso_local void @_Z16testVirtualChain2S9(
+// LINUX-LABEL: define dso_local void @testVirtualChain(
// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
@@ -921,50 +2080,95 @@ struct S9 : NonVirtualBase2, VirtualChain3 {
// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testVirtualChain@@YAXUS9@@@Z"(ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.indirect_addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.indirect_addr, align 8
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %0, align 4
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 20
-// WINDOWS-NEXT: store i8 0, ptr %4, align 4
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 21
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 22
-// WINDOWS-NEXT: store i8 0, ptr %6, align 2
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %s, i32 23
-// WINDOWS-NEXT: store i8 0, ptr %7, align 1
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %s, i32 28
-// WINDOWS-NEXT: store i8 0, ptr %8, align 4
-// WINDOWS-NEXT: %9 = getelementptr i8, ptr %s, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %9, align 1
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %s, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %10, align 2
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %s, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %11, align 1
-// WINDOWS-NEXT: %12 = getelementptr i8, ptr %s, i32 34
-// WINDOWS-NEXT: store i8 0, ptr %12, align 2
-// WINDOWS-NEXT: %13 = getelementptr i8, ptr %s, i32 35
-// WINDOWS-NEXT: store i8 0, ptr %13, align 1
-// WINDOWS-NEXT: %14 = getelementptr i8, ptr %s, i32 36
-// WINDOWS-NEXT: store i8 0, ptr %14, align 4
-// WINDOWS-NEXT: %15 = getelementptr i8, ptr %s, i32 37
-// WINDOWS-NEXT: store i8 0, ptr %15, align 1
-// WINDOWS-NEXT: %16 = getelementptr i8, ptr %s, i32 38
-// WINDOWS-NEXT: store i8 0, ptr %16, align 2
-// WINDOWS-NEXT: %17 = getelementptr i8, ptr %s, i32 39
-// WINDOWS-NEXT: store i8 0, ptr %17, align 1
-// WINDOWS-NEXT: call void @"??1S9@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(40) dereferenceable(40) %s) #1
-// WINDOWS-NEXT: ret void
-//
-void testVirtualChain(S9 s) {
+// WINDOWS-LABEL: define dso_local void @testVirtualChain(
+// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 4
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 28
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[S]], i32 34
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 2
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[S]], i32 35
+// WINDOWS-NEXT: store i8 0, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[S]], i32 36
+// WINDOWS-NEXT: store i8 0, ptr [[TMP14]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[S]], i32 37
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[S]], i32 38
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 2
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[S]], i32 39
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 1
+// WINDOWS-NEXT: call void @"??1S9@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(40) dereferenceable(40) [[S]]) #[[ATTR1]]
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVirtualChain(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(20) [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVirtualChain(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(20) [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVirtualChain(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVirtualChain(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVirtualChain(S9 s) {
// This should clear the padding after the bool z.
// base reordered
// "vtable ptr" [0-7], "x1" [8-11], x2 [12-15], x3 [16-19],
@@ -973,6 +2177,7 @@ void testVirtualChain(S9 s) {
}
+
struct Base {
int x;
};
@@ -990,7 +2195,7 @@ struct S10 : D1, D2 {
bool s;
};
-// LINUX-LABEL: define dso_local void @_Z22testVirtualInheritance3S10(
+// LINUX-LABEL: define dso_local void @testVirtualInheritance(
// LINUX-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
@@ -1015,47 +2220,132 @@ struct S10 : D1, D2 {
// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testVirtualInheritance@@YAXUS10@@@Z"(ptr nofreeobj noundef align 8 dead_on_return dereferenceable(48) %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.indirect_addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.indirect_addr, align 8
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %0, align 1
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %1, align 2
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 33
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %s, i32 34
-// WINDOWS-NEXT: store i8 0, ptr %7, align 2
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %s, i32 35
-// WINDOWS-NEXT: store i8 0, ptr %8, align 1
-// WINDOWS-NEXT: %9 = getelementptr i8, ptr %s, i32 36
-// WINDOWS-NEXT: store i8 0, ptr %9, align 4
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %s, i32 37
-// WINDOWS-NEXT: store i8 0, ptr %10, align 1
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %s, i32 38
-// WINDOWS-NEXT: store i8 0, ptr %11, align 2
-// WINDOWS-NEXT: %12 = getelementptr i8, ptr %s, i32 39
-// WINDOWS-NEXT: store i8 0, ptr %12, align 1
-// WINDOWS-NEXT: %13 = getelementptr i8, ptr %s, i32 44
-// WINDOWS-NEXT: store i8 0, ptr %13, align 4
-// WINDOWS-NEXT: %14 = getelementptr i8, ptr %s, i32 45
-// WINDOWS-NEXT: store i8 0, ptr %14, align 1
-// WINDOWS-NEXT: %15 = getelementptr i8, ptr %s, i32 46
-// WINDOWS-NEXT: store i8 0, ptr %15, align 2
-// WINDOWS-NEXT: %16 = getelementptr i8, ptr %s, i32 47
-// WINDOWS-NEXT: store i8 0, ptr %16, align 1
-// WINDOWS-NEXT: ret void
-//
-void testVirtualInheritance(S10 s) {
+// WINDOWS-LABEL: define dso_local void @testVirtualInheritance(
+// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 1
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 33
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 34
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 35
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 36
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 37
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 38
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[S]], i32 39
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[S]], i32 44
+// WINDOWS-NEXT: store i8 0, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[S]], i32 45
+// WINDOWS-NEXT: store i8 0, ptr [[TMP14]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[S]], i32 46
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 2
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[S]], i32 47
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVirtualInheritance(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(28) [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVirtualInheritance(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(28) [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVirtualInheritance(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 36
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 37
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 38
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 39
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVirtualInheritance(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 36
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 37
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 38
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 39
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVirtualInheritance(S10 s) {
// note derived member placed before the virtual base
// "vtable ptr" [0-7], "d1" [8-11], "b1" [12], PAD [13-15],
// "vtable ptr" [16-23], "d2" [24-27], "b2" [28], s [29], PAD [30-31],
@@ -1063,13 +2353,14 @@ void testVirtualInheritance(S10 s) {
__builtin_clear_padding(&s);
}
+
struct S10_2 : virtual Base {
int d1;
bool b;
virtual ~S10_2() = default;
};
-// LINUX-LABEL: define dso_local void @_Z40testVirtualInheritanceAndVirtualFunction5S10_2(
+// LINUX-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
@@ -1090,31 +2381,101 @@ struct S10_2 : virtual Base {
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testVirtualInheritanceAndVirtualFunction@@YAXUS10_2@@@Z"(ptr nofreeobj noundef align 8 dead_on_return dereferenceable(32) %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.indirect_addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.indirect_addr, align 8
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 21
-// WINDOWS-NEXT: store i8 0, ptr %0, align 1
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 22
-// WINDOWS-NEXT: store i8 0, ptr %1, align 2
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 23
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 28
-// WINDOWS-NEXT: store i8 0, ptr %3, align 4
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: call void @"??_DS10_2@@QEAAXXZ"(ptr noundef nonnull align 8 dereferenceable(24) %s) #1
-// WINDOWS-NEXT: ret void
-//
-void testVirtualInheritanceAndVirtualFunction(S10_2 s) {
+// WINDOWS-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 1
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 28
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: call void @"??_DS10_2@@QEAAXXZ"(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR1]]
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVirtualInheritanceAndVirtualFunction(S10_2 s) {
__builtin_clear_padding(&s);
}
+
struct S11 {
// will usually occupy 2 bytes:
unsigned char b1 : 3; // 1st 3 bits (in 1st byte) are b1
@@ -1123,7 +2484,7 @@ struct S11 {
unsigned char b4 : 2; // 2 bits for b4 - next (and final) bits in the 2nd byte
};
-// LINUX-LABEL: define dso_local void @_Z13testBitFieldsP3S11(
+// LINUX-LABEL: define dso_local void @testBitFields(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -1135,96 +2496,1053 @@ struct S11 {
// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testBitFields@@YAXPEAUS11@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, 31
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: ret void
-//
-void testBitFields(S11 *s) {
+// WINDOWS-LABEL: define dso_local void @testBitFields(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitFields(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitFields(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitFields(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitFields(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitFields(S11 *s) {
// "b1" [0-2], "b2" [3-4], PAD [5-7], "b3" [8-13], "b4" [14-15]
- // to clear 5-7, we should AND 0b00011111 (31)
+ // Little endian: preserve byte 0 with 0x1f. Big endian: use 0xf8.
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @_Z18testArrayNoPaddingv(
-// LINUX-SAME: ) #[[ATTR0]] {
+struct VolatileBitfield {
+ volatile unsigned char a : 5;
+ int b : 7;
+ volatile int c : 27;
+};
+
+// LINUX-LABEL: define dso_local void @testVolatileBitfields(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[I:%.*]] = alloca [4 x i32], align 16
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testArrayNoPadding@@YAXXZ"() #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %i = alloca [4 x i32], align 4
-// WINDOWS-NEXT: ret void
+// WINDOWS-LABEL: define dso_local void @testVolatileBitfields(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 127
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 7
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 1
+// WINDOWS-NEXT: ret void
//
-void testArrayNoPadding() {
- int i[4];
- // there is no padding in the array.
- __builtin_clear_padding(&i);
+// ARM-LE-LABEL: define dso_local void @testVolatileBitfields(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ARM-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileBitfields(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfields(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfields(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVolatileBitfields(struct VolatileBitfield *s) {
+ __builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @_Z19testArrayLongDoublev(
-// LINUX-SAME: ) #[[ATTR0]] {
+// LINUX-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[LD:%.*]] = alloca [2 x x86_fp80], align 16
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[LD]], i32 10
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 2
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[LD]], i32 11
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 127
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 7
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ARM-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVolatileBitfieldsVolatileStruct(
+ volatile struct VolatileBitfield *s) {
+ __builtin_clear_padding(s);
+}
+
+#ifndef _WIN32
+
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wbitfield-width"
+
+struct OversizedBitfield {
+ unsigned char a : 10;
+ int b;
+ int c : 35;
+};
+
+// LINUX-LABEL: define dso_local void @testOversizedBitfield(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[LD]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[LD]], i32 13
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[LD]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[LD]], i32 15
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[LD]], i32 26
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[LD]], i32 27
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[LD]], i32 28
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 4
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[LD]], i32 29
-// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
-// LINUX-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[LD]], i32 30
-// LINUX-NEXT: store i8 0, ptr [[TMP10]], align 2
-// LINUX-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[LD]], i32 31
-// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testArrayLongDouble@@YAXXZ"() #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %ld = alloca [2 x double], align 8
-// WINDOWS-NEXT: ret void
+// ARM-LE-LABEL: define dso_local void @testOversizedBitfield(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
//
-void testArrayLongDouble() {
- // long double 0, [0-9] PAD [10-15]
- // long double 1, [16-25] PAD [26-31]
- long double ld[2];
- __builtin_clear_padding(&ld);
+// ARM-BE-LABEL: define dso_local void @testOversizedBitfield(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// ARM-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// ARM-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// ARM-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testOversizedBitfield(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testOversizedBitfield(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// AARCH64-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testOversizedBitfield(struct OversizedBitfield *s) {
+ __builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @_Z17testArrayOfStructv(
-// LINUX-SAME: ) #[[ATTR0]] {
+// LINUX-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 16
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// ARM-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// ARM-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// ARM-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// AARCH64-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testOversizedBitfieldVolatileStruct(
+ volatile struct OversizedBitfield *s) {
+ __builtin_clear_padding(s);
+}
+
+struct VolatileOversizedBitfield {
+ volatile unsigned char a : 10;
+ int b;
+ volatile int c : 35;
+};
+
+// LINUX-LABEL: define dso_local void @testVolatileOversizedBitfield(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVolatileOversizedBitfield(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileOversizedBitfield(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// ARM-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// ARM-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// ARM-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileOversizedBitfield(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileOversizedBitfield(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// AARCH64-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVolatileOversizedBitfield(
+ struct VolatileOversizedBitfield *s) {
+ __builtin_clear_padding(s);
+}
+
+// LINUX-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// ARM-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// ARM-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// ARM-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// ARM-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -64
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 4
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 2
+// AARCH64-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testVolatileOversizedBitfieldVolatileStruct(
+ volatile struct VolatileOversizedBitfield *s) {
+ __builtin_clear_padding(s);
+}
+
+#pragma clang diagnostic pop
+
+#endif // _WIN32
+
+
+// LINUX-LABEL: define dso_local void @testArrayNoPadding(
+// LINUX-SAME: ) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[I:%.*]] = alloca [4 x i32], align 16
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testArrayNoPadding(
+// WINDOWS-SAME: ) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrayNoPadding(
+// ARM-LE-SAME: ) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrayNoPadding(
+// ARM-BE-SAME: ) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrayNoPadding(
+// AARCH64-LE-SAME: ) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrayNoPadding(
+// AARCH64-BE-SAME: ) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testArrayNoPadding() {
+ int i[4];
+ // there is no padding in the array.
+ __builtin_clear_padding(&i);
+}
+
+
+// LINUX-LABEL: define dso_local void @testArrayLongDouble(
+// LINUX-SAME: ) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[LD:%.*]] = alloca [2 x x86_fp80], align 16
+// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[LD]], i32 10
+// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 2
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[LD]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[LD]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[LD]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[LD]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[LD]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[LD]], i32 26
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[LD]], i32 27
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[LD]], i32 28
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 4
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[LD]], i32 29
+// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
+// LINUX-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[LD]], i32 30
+// LINUX-NEXT: store i8 0, ptr [[TMP10]], align 2
+// LINUX-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[LD]], i32 31
+// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testArrayLongDouble(
+// WINDOWS-SAME: ) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrayLongDouble(
+// ARM-LE-SAME: ) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrayLongDouble(
+// ARM-BE-SAME: ) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrayLongDouble(
+// AARCH64-LE-SAME: ) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrayLongDouble(
+// AARCH64-BE-SAME: ) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testArrayLongDouble() {
+ // long double 0, [0-9] PAD [10-15]
+ // long double 1, [16-25] PAD [26-31]
+ long double ld[2];
+ __builtin_clear_padding(&ld);
+}
+
+
+// LINUX-LABEL: define dso_local void @testArrayOfStruct(
+// LINUX-SAME: ) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 16
+// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
@@ -1242,36 +3560,157 @@ void testArrayLongDouble() {
// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testArrayOfStruct@@YAXXZ"() #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s = alloca [2 x %struct.S.0], align 4
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %s, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %0, align 1
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %s, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %1, align 2
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %s, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %s, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %s, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %4, align 2
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %s, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %5, align 1
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %s, i32 21
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %s, i32 22
-// WINDOWS-NEXT: store i8 0, ptr %7, align 2
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %s, i32 23
-// WINDOWS-NEXT: store i8 0, ptr %8, align 1
-// WINDOWS-NEXT: %9 = getelementptr i8, ptr %s, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %9, align 1
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %s, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %10, align 2
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %s, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %11, align 1
-// WINDOWS-NEXT: ret void
-//
-void testArrayOfStruct() {
+// WINDOWS-LABEL: define dso_local void @testArrayOfStruct(
+// WINDOWS-SAME: ) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 1
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrayOfStruct(
+// ARM-LE-SAME: ) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// ARM-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrayOfStruct(
+// ARM-BE-SAME: ) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// ARM-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrayOfStruct(
+// AARCH64-LE-SAME: ) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrayOfStruct(
+// AARCH64-BE-SAME: ) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testArrayOfStruct() {
struct S {
int i1;
char c1;
@@ -1288,6 +3727,7 @@ void testArrayOfStruct() {
__builtin_clear_padding(&s);
}
+
struct ArrOfStructsWithPadding {
Bar bars[2];
};
@@ -1296,7 +3736,7 @@ struct ArrOfStructsWithPadding {
// "c" (1), PAD_1, "d" (1), PAD_2, "c" (2), PAD_3, "d" (2), PAD_4
// %struct.ArrOfStructsWithPadding = type { [2 x %struct.Bar] }
-// LINUX-LABEL: define dso_local void @_Z27testArrOfStructsWithPaddingP23ArrOfStructsWithPadding(
+// LINUX-LABEL: define dso_local void @testArrOfStructsWithPadding(
// LINUX-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
@@ -1312,32 +3752,98 @@ struct ArrOfStructsWithPadding {
// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testArrOfStructsWithPadding@@YAXPEAUArrOfStructsWithPadding@@@Z"(ptr noundef %arr) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %arr.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %arr, ptr %arr.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %arr.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: ret void
-//
-void testArrOfStructsWithPadding(ArrOfStructsWithPadding *arr) {
+// WINDOWS-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// WINDOWS-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// ARM-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// ARM-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// AARCH64-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// AARCH64-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testArrOfStructsWithPadding(ArrOfStructsWithPadding *arr) {
__builtin_clear_padding(arr);
}
+
template <class T>
struct S12 {
T t;
char c;
};
-// LINUX-LABEL: define dso_local void @_Z18testTemplateStructP3S12IiE(
+// LINUX-LABEL: define dso_local void @testTemplateStruct(
// LINUX-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
@@ -1351,24 +3857,82 @@ struct S12 {
// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testTemplateStruct@@YAXPEAU?$S12 at H@@@Z"(ptr noundef %s12) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s12.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s12, ptr %s12.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s12.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %2, align 2
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %3, align 1
-// WINDOWS-NEXT: ret void
-//
-void testTemplateStruct(S12<int>* s12) {
+// WINDOWS-LABEL: define dso_local void @testTemplateStruct(
+// WINDOWS-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testTemplateStruct(
+// ARM-LE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testTemplateStruct(
+// ARM-BE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testTemplateStruct(
+// AARCH64-LE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testTemplateStruct(
+// AARCH64-BE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testTemplateStruct(S12<int>* s12) {
__builtin_clear_padding(s12);
}
-// LINUX-LABEL: define dso_local void @_Z10testAtomicPU7_Atomic3Bar(
+
+// LINUX-LABEL: define dso_local void @testAtomic(
// LINUX-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
@@ -1380,32 +3944,85 @@ void testTemplateStruct(S12<int>* s12) {
// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testAtomic@@YAXPEAU?$_Atomic at UBar@@@__clang@@@Z"(ptr noundef %bar) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %bar.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %bar, ptr %bar.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %bar.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %1, align 1
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: ret void
-//
-void testAtomic(_Atomic(Bar)* bar) {
+// WINDOWS-LABEL: define dso_local void @testAtomic(
+// WINDOWS-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testAtomic(
+// ARM-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testAtomic(
+// ARM-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testAtomic(
+// AARCH64-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testAtomic(
+// AARCH64-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testAtomic(_Atomic(Bar)* bar) {
__builtin_clear_padding(bar);
}
+
struct NonTriviallyCopyable {
int i;
char c;
+//
NonTriviallyCopyable(){}
+//
NonTriviallyCopyable(const NonTriviallyCopyable&) {}
+//
~NonTriviallyCopyable() {}
};
-// LINUX-LABEL: define dso_local void @_Z24testNonTriviallyCopyable20NonTriviallyCopyable(
+// LINUX-LABEL: define dso_local void @testNonTriviallyCopyable(
// LINUX-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
@@ -1418,27 +4035,81 @@ struct NonTriviallyCopyable {
// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testNonTriviallyCopyable@@YAXUNonTriviallyCopyable@@@Z"(ptr nofreeobj noundef align 4 dead_on_return dereferenceable(8) %ntc) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %ntc.indirect_addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %ntc, ptr %ntc.indirect_addr, align 8
-// WINDOWS-NEXT: %0 = getelementptr i8, ptr %ntc, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %0, align 1
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %ntc, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %1, align 2
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %ntc, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: call void @"??1NonTriviallyCopyable@@QEAA at XZ"(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) %ntc) #1
-// WINDOWS-NEXT: ret void
-//
-void testNonTriviallyCopyable(NonTriviallyCopyable ntc) {
+// WINDOWS-LABEL: define dso_local void @testNonTriviallyCopyable(
+// WINDOWS-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 1
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: call void @"??1NonTriviallyCopyable@@QEAA at XZ"(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[NTC]]) #[[ATTR1]]
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testNonTriviallyCopyable(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testNonTriviallyCopyable(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testNonTriviallyCopyable(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testNonTriviallyCopyable(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testNonTriviallyCopyable(NonTriviallyCopyable ntc) {
__builtin_clear_padding(&ntc);
}
+
typedef float Float3Vec __attribute__((ext_vector_type(3)));
typedef long double LongDouble3Vec __attribute__((ext_vector_type(3)));
-// LINUX-LABEL: define dso_local void @_Z18testAttributedTypePDv3_f(
+// LINUX-LABEL: define dso_local void @testAttributedType(
// LINUX-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
@@ -1454,26 +4125,92 @@ typedef long double LongDouble3Vec __attribute__((ext_vector_type(3)));
// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testAttributedType@@YAXPEAT?$__vector at M$02 at __clang@@@Z"(ptr noundef %v) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %v.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %v, ptr %v.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %v.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 12
-// WINDOWS-NEXT: store i8 0, ptr %1, align 4
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 13
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 14
-// WINDOWS-NEXT: store i8 0, ptr %3, align 2
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 15
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: ret void
-//
-void testAttributedType(Float3Vec* v) {
+// WINDOWS-LABEL: define dso_local void @testAttributedType(
+// WINDOWS-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testAttributedType(
+// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testAttributedType(
+// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testAttributedType(
+// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testAttributedType(
+// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testAttributedType(Float3Vec* v) {
__builtin_clear_padding(v);
}
-// LINUX-LABEL: define dso_local void @_Z28testAttributedLongDoubleTypePDv3_e(
+
+// LINUX-LABEL: define dso_local void @testAttributedLongDoubleType(
// LINUX-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
@@ -1549,41 +4286,171 @@ void testAttributedType(Float3Vec* v) {
// LINUX-NEXT: store i8 0, ptr [[TMP34]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testAttributedLongDoubleType@@YAXPEAT?$__vector at O$02 at __clang@@@Z"(ptr noundef %v) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %v.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %v, ptr %v.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %v.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 24
-// WINDOWS-NEXT: store i8 0, ptr %1, align 8
-// WINDOWS-NEXT: %2 = getelementptr i8, ptr %0, i32 25
-// WINDOWS-NEXT: store i8 0, ptr %2, align 1
-// WINDOWS-NEXT: %3 = getelementptr i8, ptr %0, i32 26
-// WINDOWS-NEXT: store i8 0, ptr %3, align 2
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 27
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 28
-// WINDOWS-NEXT: store i8 0, ptr %5, align 4
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 29
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 30
-// WINDOWS-NEXT: store i8 0, ptr %7, align 2
-// WINDOWS-NEXT: %8 = getelementptr i8, ptr %0, i32 31
-// WINDOWS-NEXT: store i8 0, ptr %8, align 1
-// WINDOWS-NEXT: ret void
-//
-void testAttributedLongDoubleType(LongDouble3Vec *v) {
+// WINDOWS-LABEL: define dso_local void @testAttributedLongDoubleType(
+// WINDOWS-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 8
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 8
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 4
+// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 1
+// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 2
+// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
+// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 4
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 1
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 2
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testAttributedLongDoubleType(LongDouble3Vec *v) {
// long double elements occupy [0-9], [16-25], [32-41] on x86.
__builtin_clear_padding(v);
}
+
struct UnnamedBitfieldSingleBit {
unsigned char a : 3;
unsigned char : 1;
unsigned char b : 4;
};
-// LINUX-LABEL: define dso_local void @_Z28testUnnamedBitfieldSingleBitP24UnnamedBitfieldSingleBit(
+// LINUX-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -1595,31 +4462,82 @@ struct UnnamedBitfieldSingleBit {
// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnnamedBitfieldSingleBit@@YAXPEAUUnnamedBitfieldSingleBit@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, -9
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: ret void
-//
-void testUnnamedBitfieldSingleBit(struct UnnamedBitfieldSingleBit *s) {
- // byte 0: a[bits 0-2], unnamed[bit 3], b[bits 4-7]
- // bit 3 must be cleared
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -17
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -17
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnnamedBitfieldSingleBit(
+ struct UnnamedBitfieldSingleBit *s) {
+ // Little endian: a[bits 0-2], unnamed[bit 3], b[bits 4-7].
+ // Clear bit 3 on little endian, or bit 4 on big endian.
// Mask: 0b11110111 == -9
__builtin_clear_padding(s);
}
+
struct UnnamedBitfieldMiddle {
unsigned char a : 3;
unsigned char : 2;
unsigned char b : 3;
};
-// LINUX-LABEL: define dso_local void @_Z25testUnnamedBitfieldMiddleP21UnnamedBitfieldMiddle(
+// LINUX-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -1631,31 +4549,81 @@ struct UnnamedBitfieldMiddle {
// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnnamedBitfieldMiddle@@YAXPEAUUnnamedBitfieldMiddle@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, -25
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: ret void
-//
-void testUnnamedBitfieldMiddle(struct UnnamedBitfieldMiddle *s) {
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnnamedBitfieldMiddle(struct UnnamedBitfieldMiddle *s) {
// byte 0: a[0-2], unnamed[3-4], b[5-7]
// bits 3-4 must be cleared
// Mask: 0b11100111 == -25
__builtin_clear_padding(s);
}
+
struct UnnamedBitfieldSurrounding {
unsigned char : 2;
unsigned char a : 4;
unsigned char : 2;
};
-// LINUX-LABEL: define dso_local void @_Z30testUnnamedBitfieldSurroundingP26UnnamedBitfieldSurrounding(
+// LINUX-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -1671,22 +4639,88 @@ struct UnnamedBitfieldSurrounding {
// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnnamedBitfieldSurrounding@@YAXPEAUUnnamedBitfieldSurrounding@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 1
-// WINDOWS-NEXT: %3 = and i8 %2, -4
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 1
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %5 = load i8, ptr %4, align 1
-// WINDOWS-NEXT: %6 = and i8 %5, 63
-// WINDOWS-NEXT: store i8 %6, ptr %4, align 1
-// WINDOWS-NEXT: ret void
-//
-void testUnnamedBitfieldSurrounding(struct UnnamedBitfieldSurrounding *s) {
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnnamedBitfieldSurrounding(
+ struct UnnamedBitfieldSurrounding *s) {
// byte 0: unnamed[0-1], a[2-5], unnamed[6-7]
// bits 0-1 and 6-7 must be cleared
// Masks:
@@ -1695,13 +4729,14 @@ void testUnnamedBitfieldSurrounding(struct UnnamedBitfieldSurrounding *s) {
__builtin_clear_padding(s);
}
+
struct UnnamedZeroWidthBitfield {
unsigned char a : 4;
unsigned int : 0;
unsigned int b : 4;
};
-// LINUX-LABEL: define dso_local void @_Z28testUnnamedZeroWidthBitfieldP24UnnamedZeroWidthBitfield(
+// LINUX-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -1729,34 +4764,149 @@ struct UnnamedZeroWidthBitfield {
// LINUX-NEXT: store i8 0, ptr [[TMP12]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnnamedZeroWidthBitfield@@YAXPEAUUnnamedZeroWidthBitfield@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 4
-// WINDOWS-NEXT: %3 = and i8 %2, 15
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 4
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: store i8 0, ptr %4, align 1
-// WINDOWS-NEXT: %5 = getelementptr i8, ptr %0, i32 2
-// WINDOWS-NEXT: store i8 0, ptr %5, align 2
-// WINDOWS-NEXT: %6 = getelementptr i8, ptr %0, i32 3
-// WINDOWS-NEXT: store i8 0, ptr %6, align 1
-// WINDOWS-NEXT: %7 = getelementptr i8, ptr %0, i32 4
-// WINDOWS-NEXT: %8 = load i8, ptr %7, align 4
-// WINDOWS-NEXT: %9 = and i8 %8, 15
-// WINDOWS-NEXT: store i8 %9, ptr %7, align 4
-// WINDOWS-NEXT: %10 = getelementptr i8, ptr %0, i32 5
-// WINDOWS-NEXT: store i8 0, ptr %10, align 1
-// WINDOWS-NEXT: %11 = getelementptr i8, ptr %0, i32 6
-// WINDOWS-NEXT: store i8 0, ptr %11, align 2
-// WINDOWS-NEXT: %12 = getelementptr i8, ptr %0, i32 7
-// WINDOWS-NEXT: store i8 0, ptr %12, align 1
-// WINDOWS-NEXT: ret void
-//
-void testUnnamedZeroWidthBitfield(struct UnnamedZeroWidthBitfield *s) {
+// WINDOWS-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// ARM-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// ARM-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// ARM-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// ARM-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// ARM-BE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], -16
+// ARM-BE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// ARM-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnnamedZeroWidthBitfield(
+ struct UnnamedZeroWidthBitfield *s) {
+ // The masks below describe little endian; big endian uses 0xf0.
// byte 0: a[0-3], unnamed[4-7]
// bytes 1-3: struct padding
// bytes 4-7: b[bits 0-3], tail padding[bits 4-31]
@@ -1773,13 +4923,14 @@ void testUnnamedZeroWidthBitfield(struct UnnamedZeroWidthBitfield *s) {
__builtin_clear_padding(s);
}
+
struct UnnamedBitfieldMultiByte {
unsigned short a : 4;
unsigned short : 8;
unsigned short b : 4;
};
-// LINUX-LABEL: define dso_local void @_Z28testUnnamedBitfieldMultiByteP24UnnamedBitfieldMultiByte(
+// LINUX-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// LINUX-NEXT: [[ENTRY:.*:]]
// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
@@ -1795,22 +4946,89 @@ struct UnnamedBitfieldMultiByte {
// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// LINUX-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @"?testUnnamedBitfieldMultiByte@@YAXPEAUUnnamedBitfieldMultiByte@@@Z"(ptr noundef %s) #0 {
-// WINDOWS-NEXT: entry:
-// WINDOWS-NEXT: %s.addr = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr %s, ptr %s.addr, align 8
-// WINDOWS-NEXT: %0 = load ptr, ptr %s.addr, align 8
-// WINDOWS-NEXT: %1 = getelementptr i8, ptr %0, i32 0
-// WINDOWS-NEXT: %2 = load i8, ptr %1, align 2
-// WINDOWS-NEXT: %3 = and i8 %2, 15
-// WINDOWS-NEXT: store i8 %3, ptr %1, align 2
-// WINDOWS-NEXT: %4 = getelementptr i8, ptr %0, i32 1
-// WINDOWS-NEXT: %5 = load i8, ptr %4, align 1
-// WINDOWS-NEXT: %6 = and i8 %5, -16
-// WINDOWS-NEXT: store i8 %6, ptr %4, align 1
-// WINDOWS-NEXT: ret void
-//
-void testUnnamedBitfieldMultiByte(struct UnnamedBitfieldMultiByte *s) {
+// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 15
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 15
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testUnnamedBitfieldMultiByte(
+ struct UnnamedBitfieldMultiByte *s) {
+ // The masks below describe little endian; big endian swaps them.
// 2 bytes: a[0-3], unnamed[4-11], b[12-15]
// byte 0: clear bits 4-7
// byte 1: clear bits 0-3
@@ -1820,3 +5038,2472 @@ void testUnnamedBitfieldMultiByte(struct UnnamedBitfieldMultiByte *s) {
// 0b11110000 == -16
__builtin_clear_padding(s);
}
+
+
+// Complete bytes require no clearing, including a full 64-bit bitfield.
+struct BitfieldFullBytes {
+ unsigned char first : 8;
+ unsigned char second : 8;
+ unsigned short half : 16;
+ unsigned int word : 32;
+ unsigned long long wide : 64;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldFullBytes(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldFullBytes(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldFullBytes(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldFullBytes(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldFullBytes(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldFullBytes(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldFullBytes(struct BitfieldFullBytes *s) {
+ __builtin_clear_padding(s);
+}
+
+// The value ends exactly at a byte boundary. Preserve masks are 0xf8, 0xff
+// on little endian and 0x1f, 0xff on big endian.
+struct BitfieldEndAligned {
+ unsigned short : 3;
+ unsigned short value : 13;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldEndAligned(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldEndAligned(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldEndAligned(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldEndAligned(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldEndAligned(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldEndAligned(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldEndAligned(struct BitfieldEndAligned *s) {
+ __builtin_clear_padding(s);
+}
+
+// A normal field with two partial endpoints and a complete middle byte.
+// Preserve masks are 0xf8, 0xff, 0x1f, 0x00 on little endian and
+// 0x1f, 0xff, 0xf8, 0x00 on big endian.
+struct BitfieldPartialEnds {
+ unsigned int : 3;
+ unsigned int value : 18;
+ unsigned int : 11;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldPartialEnds(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldPartialEnds(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldPartialEnds(struct BitfieldPartialEnds *s) {
+ __builtin_clear_padding(s);
+}
+
+// An asymmetric single-bit interval catches endpoint and reflection errors.
+struct BitfieldSingleValueBit {
+ unsigned char : 2;
+ unsigned char value : 1;
+ unsigned char : 5;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldSingleValueBit(struct BitfieldSingleValueBit *s) {
+ __builtin_clear_padding(s);
+}
+
+// Ordinary members share bitfield containers on Arm, and separate two runs of
+// bitfields. Clearing padding must preserve every ordinary member.
+struct BitfieldMixedMembers {
+ unsigned char prefix;
+ unsigned int first : 3;
+ unsigned char separator;
+ unsigned int second : 5;
+ unsigned short suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldMixedMembers(struct BitfieldMixedMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldMixedMembersVolatileObject(
+ volatile struct BitfieldMixedMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+struct BitfieldMixedVolatileMembers {
+ unsigned char prefix;
+ volatile unsigned int first : 3;
+ unsigned char separator;
+ volatile unsigned int second : 5;
+ unsigned short suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldMixedVolatileMembers(
+ struct BitfieldMixedVolatileMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 31
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 2
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldMixedVolatileMembersAndObject(
+ volatile struct BitfieldMixedVolatileMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// Both array elements have partial-byte padding, and neither starts at offset
+// zero in the enclosing object. Preserve the prefix and suffix too.
+struct BitfieldNestedArray {
+ unsigned char prefix[3];
+ struct BitfieldPartialEnds elements[2];
+ unsigned char suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldNestedArray(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// LINUX-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// LINUX-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// LINUX-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// LINUX-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// LINUX-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// LINUX-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// LINUX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// LINUX-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// LINUX-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// LINUX-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// LINUX-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP15]], align 1
+// LINUX-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP16]], align 1
+// LINUX-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP17]], align 2
+// LINUX-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP18]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldNestedArray(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// WINDOWS-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// WINDOWS-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// WINDOWS-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// WINDOWS-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// WINDOWS-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// WINDOWS-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// WINDOWS-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldNestedArray(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// ARM-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// ARM-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// ARM-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// ARM-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// ARM-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// ARM-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// ARM-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// ARM-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldNestedArray(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 31
+// ARM-BE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], -8
+// ARM-BE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// ARM-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// ARM-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// ARM-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// ARM-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -8
+// ARM-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// ARM-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// ARM-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// ARM-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// ARM-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldNestedArray(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// AARCH64-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// AARCH64-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldNestedArray(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-BE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// AARCH64-BE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-BE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// AARCH64-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldNestedArray(struct BitfieldNestedArray *s) {
+ __builtin_clear_padding(s);
+}
+
+// The raw member occupies the first byte, including padding in the fields
+// member. Only padding shared by both union alternatives may be cleared.
+union BitfieldUnionOverlay {
+ struct BitfieldPartialEnds fields;
+ unsigned char raw;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldUnionOverlay(union BitfieldUnionOverlay *s) {
+ __builtin_clear_padding(s);
+}
+
+enum BitfieldState { StateZero, StateOne, StateTwo, StateThree };
+struct BitfieldBoolEnum {
+ bool flag : 1;
+ enum BitfieldState state : 2;
+ unsigned char payload : 3;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldBoolEnum(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldBoolEnum(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 3
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// WINDOWS-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = and i8 [[TMP14]], 7
+// WINDOWS-NEXT: store i8 [[TMP15]], ptr [[TMP13]], align 4
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldBoolEnum(struct BitfieldBoolEnum *s) {
+ __builtin_clear_padding(s);
+}
+
+// Exercise bit-precise declared types and an occupied width greater than 32.
+struct BitfieldBitIntMembers {
+ unsigned _BitInt(9) small : 5;
+ signed _BitInt(17) medium : 13;
+ unsigned _BitInt(65) wide : 61;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 4
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 2
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 8
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 8
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
+// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// WINDOWS-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// WINDOWS-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 1
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 16
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 8
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
+// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
+// WINDOWS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// WINDOWS-NEXT: store i8 0, ptr [[TMP19]], align 4
+// WINDOWS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP20]], align 1
+// WINDOWS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP21]], align 2
+// WINDOWS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP22]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -2
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -2
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldBitIntMembers(struct BitfieldBitIntMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// Packing permits the wide field to straddle its declared type's usual
+// storage-unit boundary on Arm. Ordinary members surround the bitfield run.
+struct __attribute__((packed)) BitfieldPackedMembers {
+ unsigned char prefix;
+ unsigned int first : 5;
+ unsigned long long wide : 60;
+ unsigned char suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldPackedMembers(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldPackedMembers(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -128
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -128
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldPackedMembers(struct BitfieldPackedMembers *s) {
+ __builtin_clear_padding(s);
+}
+
+// There are no occupied intervals: clear the entire object representation.
+struct BitfieldUnnamedOnly {
+ unsigned int : 3;
+ unsigned int : 0;
+ unsigned char : 2;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
+// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 4
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 2
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldUnnamedOnly(struct BitfieldUnnamedOnly *s) {
+ __builtin_clear_padding(s);
+}
+
+#ifndef _WIN32
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wbitfield-width"
+
+// Match Clang's existing oversized-field representation. On big endian the
+// occupied byte is byte 1, so clearing padding must leave that byte intact.
+struct BitfieldOversizedAligned {
+ unsigned char value : 16;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldOversizedAligned(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldOversizedAligned(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldOversizedAligned(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldOversizedAligned(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldOversizedAligned(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldOversizedAligned(BitfieldOversizedAligned *s) {
+ __builtin_clear_padding(s);
+}
+
+// The occupied bits cross a byte boundary after more than one byte of leading
+// padding on big endian. The declared width also exceeds the allocation type.
+struct BitfieldOversizedBeyondBoundary {
+ unsigned char value : 17;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
+// LINUX-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 127
+// ARM-BE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], -128
+// ARM-BE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 127
+// AARCH64-BE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], -128
+// AARCH64-BE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldOversizedBeyondBoundary(
+ BitfieldOversizedBeyondBoundary *s) {
+ __builtin_clear_padding(s);
+}
+
+// Value widths differ from both the declared bitfield widths and, for bool and
+// _BitInt, their storage sizes.
+enum class BitfieldSmallEnum : unsigned char { Zero, One };
+struct BitfieldOversizedValueTypes {
+ bool flag : 3;
+ BitfieldSmallEnum state : 12;
+ unsigned _BitInt(9) precise : 12;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// LINUX-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// LINUX-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
+// LINUX-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// LINUX-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
+// ARM-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// ARM-BE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-BE-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 2
+// ARM-BE-NEXT: [[TMP12:%.*]] = and i8 [[TMP11]], -15
+// ARM-BE-NEXT: store i8 [[TMP12]], ptr [[TMP10]], align 2
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -32
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// AARCH64-BE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-BE-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 2
+// AARCH64-BE-NEXT: [[TMP12:%.*]] = and i8 [[TMP11]], -15
+// AARCH64-BE-NEXT: store i8 [[TMP12]], ptr [[TMP10]], align 2
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldOversizedValueTypes(
+ BitfieldOversizedValueTypes *s) {
+ __builtin_clear_padding(s);
+}
+
+#pragma clang diagnostic pop
+#endif
+
+struct BitfieldPrefixBase {
+ unsigned int prefix;
+};
+
+struct BitfieldDerived : BitfieldPrefixBase, BitfieldPartialEnds {
+ unsigned char suffix;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldBaseOffset(
+// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
+// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 2
+// LINUX-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP10]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldBaseOffset(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 2
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldBaseOffset(
+// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 2
+// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldBaseOffset(
+// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 2
+// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldBaseOffset(
+// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 2
+// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldBaseOffset(
+// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 2
+// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldBaseOffset(BitfieldDerived *s) {
+ __builtin_clear_padding(s);
+}
+
+struct BitfieldVirtualDerived : virtual BitfieldPartialEnds {
+ unsigned char tag;
+};
+
+// LINUX-LABEL: define dso_local void @testBitfieldVirtualBase(
+// LINUX-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// LINUX-NEXT: [[ENTRY:.*:]]
+// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
+// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
+// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
+// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// LINUX-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
+// LINUX-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], -8
+// LINUX-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
+// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
+// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 31
+// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
+// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
+// LINUX-NEXT: ret void
+//
+// WINDOWS-LABEL: define dso_local void @testBitfieldVirtualBase(
+// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// WINDOWS-NEXT: [[ENTRY:.*:]]
+// WINDOWS-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// WINDOWS-NEXT: store i8 0, ptr [[TMP0]], align 1
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
+// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
+// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 4
+// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
+// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 16
+// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 8
+// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], -8
+// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 8
+// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// WINDOWS-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP12:%.*]] = and i8 [[TMP11]], 31
+// WINDOWS-NEXT: store i8 [[TMP12]], ptr [[TMP10]], align 2
+// WINDOWS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// WINDOWS-NEXT: store i8 0, ptr [[TMP13]], align 1
+// WINDOWS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// WINDOWS-NEXT: store i8 0, ptr [[TMP14]], align 4
+// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
+// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 2
+// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 1
+// WINDOWS-NEXT: ret void
+//
+// ARM-LE-LABEL: define dso_local void @testBitfieldVirtualBase(
+// ARM-LE-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
+// ARM-LE-NEXT: [[ENTRY:.*:]]
+// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 8
+// ARM-LE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
+// ARM-LE-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], -8
+// ARM-LE-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
+// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 31
+// ARM-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
+// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-LE-NEXT: ret void
+//
+// ARM-BE-LABEL: define dso_local void @testBitfieldVirtualBase(
+// ARM-BE-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
+// ARM-BE-NEXT: [[ENTRY:.*:]]
+// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 8
+// ARM-BE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
+// ARM-BE-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], 31
+// ARM-BE-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
+// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
+// ARM-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -8
+// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
+// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-BE-NEXT: ret void
+//
+// AARCH64-LE-LABEL: define dso_local void @testBitfieldVirtualBase(
+// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-LE-NEXT: [[ENTRY:.*:]]
+// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// AARCH64-LE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
+// AARCH64-LE-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], -8
+// AARCH64-LE-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
+// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 31
+// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
+// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-LE-NEXT: ret void
+//
+// AARCH64-BE-LABEL: define dso_local void @testBitfieldVirtualBase(
+// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-BE-NEXT: [[ENTRY:.*:]]
+// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], 31
+// AARCH64-BE-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
+// AARCH64-BE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], -8
+// AARCH64-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
+// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-BE-NEXT: ret void
+//
+extern "C" void testBitfieldVirtualBase(BitfieldVirtualDerived s) {
+ __builtin_clear_padding(&s);
+}
>From e73aff989a57af697a5cc74b57d877ecde9087b2 Mon Sep 17 00:00:00 2001
From: Victor Campos <victor.campos at arm.com>
Date: Wed, 16 Sep 2026 11:42:37 +0100
Subject: [PATCH 2/3] Add citation to the Itanium C++ ABI
---
clang/lib/AST/ASTContext.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 61936e44f6278..d89a40856ca1e 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -15902,9 +15902,10 @@ struct PaddingCalculator {
//
// FIXME: For over-sized bitfields in BE, Clang allocates padding bits
// before the occupied bits. This violates the ABI rules, which say that
- // padding should be allocated after, regardless of endianness. The current
- // code accommodates for Clang's current behaviour though, and bumps Start
- // forward to skip the leading padding bits.
+ // padding should be allocated after, regardless of endianness (Itanium C++
+ // ABI §2.4, II.1(b)). The current code accommodates for Clang's current
+ // behaviour though, and bumps Start forward to skip the leading padding
+ // bits.
const uint64_t Start =
StartBitOffset + DeclaredSizeInBits - OccupiedSizeInBits;
const uint64_t End = Start + OccupiedSizeInBits;
>From a1f2382726dae0f1e8df0a169016284595824cf3 Mon Sep 17 00:00:00 2001
From: Victor Campos <victor.campos at arm.com>
Date: Wed, 16 Sep 2026 13:18:21 +0100
Subject: [PATCH 3/3] Added more FileCheck prefixes in order to reduce pattern
duplication
---
.../CodeGen/builtin-clear-padding-codegen.c | 3554 +++--------
.../builtin-clear-padding-codegen.cpp | 5437 +++++------------
2 files changed, 2532 insertions(+), 6459 deletions(-)
diff --git a/clang/test/CodeGen/builtin-clear-padding-codegen.c b/clang/test/CodeGen/builtin-clear-padding-codegen.c
index 2265414fb5f2e..317b86e6014c4 100644
--- a/clang/test/CodeGen/builtin-clear-padding-codegen.c
+++ b/clang/test/CodeGen/builtin-clear-padding-codegen.c
@@ -1,20 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -std=c11 -triple=x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=LINUX
-// RUN: %clang_cc1 -std=c11 -triple=x86_64-pc-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=WINDOWS
-// RUN: %clang_cc1 -std=c11 -triple=armv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-LE
-// RUN: %clang_cc1 -std=c11 -triple=armebv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-BE
-// RUN: %clang_cc1 -std=c11 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-LE
-// RUN: %clang_cc1 -std=c11 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-BE
+// RUN: %clang_cc1 -std=c11 -triple=x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,CHECK64-LE,ITANIUM64,ITANIUM64-LE,LINUX
+// RUN: %clang_cc1 -std=c11 -triple=x86_64-pc-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,CHECK64-LE,WINDOWS
+// RUN: %clang_cc1 -std=c11 -triple=armv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM,ARM-LE
+// RUN: %clang_cc1 -std=c11 -triple=armebv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM,ARM-BE
+// RUN: %clang_cc1 -std=c11 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,CHECK64-LE,ITANIUM64,ITANIUM64-LE,AARCH64
+// RUN: %clang_cc1 -std=c11 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,ITANIUM64,AARCH64,AARCH64-BE
struct Empty {};
-// LINUX-LABEL: define dso_local void @testEmpty(
-// LINUX-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testEmpty(
+// ITANIUM64-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testEmpty(
// WINDOWS-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
@@ -32,37 +32,13 @@ struct Empty {};
// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testEmpty(
-// ARM-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testEmpty(
-// ARM-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testEmpty(
-// AARCH64-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testEmpty(
-// AARCH64-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testEmpty(
+// ARM-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
+// ARM-NEXT: ret void
//
void testEmpty(struct Empty *e) {
// Emtpy struct is empty in C in Itanium ABI, no padding
@@ -71,53 +47,21 @@ void testEmpty(struct Empty *e) {
}
-// LINUX-LABEL: define dso_local void @testPrimitiveNoPadding(
-// LINUX-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testPrimitiveNoPadding(
-// WINDOWS-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// WINDOWS-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testPrimitiveNoPadding(
+// CHECK64-SAME: ptr noundef [[I:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// CHECK64-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// ARM-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// ARM-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// AARCH64-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// AARCH64-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testPrimitiveNoPadding(
+// ARM-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
+// ARM-NEXT: ret void
//
void testPrimitiveNoPadding(int *i) {
// This should not clear any padding, since int has no padding.
@@ -153,78 +97,44 @@ void testPrimitiveNoPadding(int *i) {
// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// ARM-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// ARM-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// AARCH64-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// AARCH64-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testPrimitiveLongDouble(
+// ARM-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testPrimitiveLongDouble(
+// AARCH64-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// AARCH64-NEXT: ret void
//
void testPrimitiveLongDouble(long double *ld) {
// padding [10, 15] on x86
__builtin_clear_padding(ld);
}
-// LINUX-LABEL: define dso_local void @testBitInt(
-// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitInt(
-// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitInt(
+// CHECK64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitInt(
// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
@@ -262,24 +172,6 @@ void testPrimitiveLongDouble(long double *ld) {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitInt(
-// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitInt(
// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -303,25 +195,15 @@ void testBitInt(_BitInt(97) *bi) {
__builtin_clear_padding(bi);
}
-// LINUX-LABEL: define dso_local void @testBitIntByteAligned(
-// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitIntByteAligned(
-// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitIntByteAligned(
+// CHECK64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitIntByteAligned(
// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
@@ -343,16 +225,6 @@ void testBitInt(_BitInt(97) *bi) {
// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitIntByteAligned(
-// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitIntByteAligned(
// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -368,41 +240,23 @@ void testBitIntByteAligned(_BitInt(24) *bi) {
__builtin_clear_padding(bi);
}
-// LINUX-LABEL: define dso_local void @testVolatileBitInt(
-// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testVolatileBitInt(
-// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testVolatileBitInt(
+// CHECK64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testVolatileBitInt(
// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
@@ -440,24 +294,6 @@ void testBitIntByteAligned(_BitInt(24) *bi) {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileBitInt(
-// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileBitInt(
// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -521,37 +357,21 @@ void testVolatileBitInt(volatile _BitInt(97) *bi) {
// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// ARM-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// ARM-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// AARCH64-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// AARCH64-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// ARM-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// AARCH64-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// AARCH64-NEXT: ret void
//
void testPrimitiveComplexLongDouble(_Complex long double *c) {
// padding [10, 15] and [26, 31] on x86
@@ -563,53 +383,21 @@ union U1 {
char c;
};
-// LINUX-LABEL: define dso_local void @testUnionDifferentLength(
-// LINUX-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnionDifferentLength(
-// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnionDifferentLength(
-// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnionDifferentLength(
-// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnionDifferentLength(
-// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnionDifferentLength(
-// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnionDifferentLength(
+// CHECK64-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnionDifferentLength(
+// ARM-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-NEXT: ret void
//
void testUnionDifferentLength(union U1 *u) {
// This should not clear the object representation bits of the non-active member.
@@ -625,137 +413,49 @@ union U2 {
char c2;
};
-// LINUX-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// LINUX-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// CHECK64-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 4
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 2
+// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// ARM-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
//
void testUnionTailPaddingOfLongestMember(union U2 *u) {
// This should clear the tail padding of the longest member.
@@ -786,274 +486,98 @@ struct __attribute__((aligned(4))) Baz {
// %struct.Foo = type { i8, i8, i8, i8 }
// %struct.Bar = type { i8, i8, i8, i8 }
-// LINUX-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// LINUX-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// CHECK64-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// ARM-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
//
void testStructPaddingInBetweenMembers(struct Baz *baz) {
// this should clear all the padding in between various members
__builtin_clear_padding(baz);
}
-// LINUX-LABEL: define dso_local void @testStructVolatile(
-// LINUX-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testStructVolatile(
-// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testStructVolatile(
-// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructVolatile(
-// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructVolatile(
-// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructVolatile(
-// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testStructVolatile(
+// CHECK64-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testStructVolatile(
+// ARM-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
//
void testStructVolatile(volatile struct Baz *baz) {
// this should clear all the padding in between various members
@@ -1140,125 +664,65 @@ struct S3 {
// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testStructWithLongDouble(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructWithLongDouble(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructWithLongDouble(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 8
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 4
-// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 1
-// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 2
-// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructWithLongDouble(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 8
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 4
-// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 1
-// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 2
-// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testStructWithLongDouble(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testStructWithLongDouble(
+// AARCH64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 8
+// AARCH64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// AARCH64-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// AARCH64-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// AARCH64-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// AARCH64-NEXT: store i8 0, ptr [[TMP12]], align 4
+// AARCH64-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// AARCH64-NEXT: store i8 0, ptr [[TMP13]], align 1
+// AARCH64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// AARCH64-NEXT: store i8 0, ptr [[TMP14]], align 2
+// AARCH64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// AARCH64-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-NEXT: ret void
//
void testStructWithLongDouble(struct S3 *s) {
// "long double data[0-9]", PAD [10-15], "b", PAD [17-31]
@@ -1273,29 +737,17 @@ struct S11 {
unsigned char b4 : 2; // 2 bits for b4 - next (and final) bits in the 2nd byte
};
-// LINUX-LABEL: define dso_local void @testBitFields(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitFields(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitFields(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitFields(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -1321,18 +773,6 @@ struct S11 {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitFields(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitFields(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -1358,25 +798,25 @@ struct VolatileBitfield {
volatile int c : 27;
};
-// LINUX-LABEL: define dso_local void @testVolatileBitfields(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testVolatileBitfields(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVolatileBitfields(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -1450,26 +890,6 @@ struct VolatileBitfield {
// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfields(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfields(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -1494,25 +914,25 @@ void testVolatileBitfields(struct VolatileBitfield *s) {
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -1586,26 +1006,6 @@ void testVolatileBitfields(struct VolatileBitfield *s) {
// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -1643,29 +1043,17 @@ void testVolatileBitfieldsVolatileStruct(volatile struct VolatileBitfield *s) {
// WINDOWS-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testArrayNoPadding(
-// ARM-LE-SAME: ) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// ARM-LE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testArrayNoPadding(
+// ARM-SAME: ) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// ARM-NEXT: ret void
//
-// ARM-BE-LABEL: define dso_local void @testArrayNoPadding(
-// ARM-BE-SAME: ) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrayNoPadding(
-// AARCH64-LE-SAME: ) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrayNoPadding(
-// AARCH64-BE-SAME: ) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// AARCH64-BE-NEXT: ret void
+// AARCH64-LABEL: define dso_local void @testArrayNoPadding(
+// AARCH64-SAME: ) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// AARCH64-NEXT: ret void
//
void testArrayNoPadding(void) {
int i[4];
@@ -1709,29 +1097,17 @@ void testArrayNoPadding(void) {
// WINDOWS-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testArrayLongDouble(
-// ARM-LE-SAME: ) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
-// ARM-LE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testArrayLongDouble(
+// ARM-SAME: ) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// ARM-NEXT: ret void
//
-// ARM-BE-LABEL: define dso_local void @testArrayLongDouble(
-// ARM-BE-SAME: ) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrayLongDouble(
-// AARCH64-LE-SAME: ) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrayLongDouble(
-// AARCH64-BE-SAME: ) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
-// AARCH64-BE-NEXT: ret void
+// AARCH64-LABEL: define dso_local void @testArrayLongDouble(
+// AARCH64-SAME: ) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
+// AARCH64-NEXT: ret void
//
void testArrayLongDouble() {
// long double 0, [0-9] PAD [10-15]
@@ -1800,125 +1176,65 @@ void testArrayLongDouble() {
// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testArrayOfStruct(
-// ARM-LE-SAME: ) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// ARM-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// ARM-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testArrayOfStruct(
-// ARM-BE-SAME: ) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// ARM-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// ARM-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrayOfStruct(
-// AARCH64-LE-SAME: ) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrayOfStruct(
-// AARCH64-BE-SAME: ) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testArrayOfStruct(
+// ARM-SAME: ) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-NEXT: store i8 0, ptr [[TMP10]], align 2
+// ARM-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-NEXT: store i8 0, ptr [[TMP11]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testArrayOfStruct(
+// AARCH64-SAME: ) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_LOCAL:%.*]]], align 4
+// AARCH64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// AARCH64-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-NEXT: ret void
//
void testArrayOfStruct(void) {
struct S_local {
@@ -1945,177 +1261,65 @@ struct ArrOfStructsWithPadding {
// "c" (1), PAD_1, "d" (1), PAD_2, "c" (2), PAD_3, "d" (2), PAD_4
// %struct.ArrOfStructsWithPadding = type { [2 x %struct.Bar] }
-// LINUX-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// LINUX-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// WINDOWS-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// ARM-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// ARM-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// AARCH64-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// AARCH64-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// CHECK64-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// ARM-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
void testArrOfStructsWithPadding(struct ArrOfStructsWithPadding *arr) {
__builtin_clear_padding(arr);
}
-// LINUX-LABEL: define dso_local void @testAtomic(
-// LINUX-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testAtomic(
-// WINDOWS-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testAtomic(
-// ARM-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testAtomic(
-// ARM-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testAtomic(
-// AARCH64-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testAtomic(
-// AARCH64-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testAtomic(
+// CHECK64-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testAtomic(
+// ARM-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: ret void
//
void testAtomic(_Atomic(struct Bar)* bar) {
__builtin_clear_padding(bar);
@@ -2124,101 +1328,37 @@ void testAtomic(_Atomic(struct Bar)* bar) {
typedef float Float3Vec __attribute__((ext_vector_type(3)));
typedef long double LongDouble3Vec __attribute__((ext_vector_type(3)));
-// LINUX-LABEL: define dso_local void @testAttributedType(
-// LINUX-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testAttributedType(
-// WINDOWS-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testAttributedType(
-// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testAttributedType(
-// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testAttributedType(
-// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testAttributedType(
-// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testAttributedType(
+// CHECK64-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 4
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testAttributedType(
+// ARM-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
void testAttributedType(Float3Vec* v) {
__builtin_clear_padding(v);
@@ -2324,133 +1464,69 @@ void testAttributedType(Float3Vec* v) {
// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 8
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 16
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 8
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
-// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 4
-// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 1
-// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 2
-// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 8
-// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
-// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
-// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 4
-// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 1
-// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 2
-// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testAttributedLongDoubleType(
+// ARM-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// ARM-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testAttributedLongDoubleType(
+// AARCH64-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
+// AARCH64-NEXT: store i8 0, ptr [[TMP9]], align 8
+// AARCH64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
+// AARCH64-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
+// AARCH64-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
+// AARCH64-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
+// AARCH64-NEXT: store i8 0, ptr [[TMP13]], align 4
+// AARCH64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
+// AARCH64-NEXT: store i8 0, ptr [[TMP14]], align 1
+// AARCH64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
+// AARCH64-NEXT: store i8 0, ptr [[TMP15]], align 2
+// AARCH64-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
+// AARCH64-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-NEXT: ret void
//
void testAttributedLongDoubleType(LongDouble3Vec *v) {
// long double elements occupy [0-9], [16-25], [32-41] on x86.
@@ -2463,29 +1539,17 @@ struct UnnamedBitfieldSingleBit {
unsigned char b : 4;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -2511,18 +1575,6 @@ struct UnnamedBitfieldSingleBit {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -2548,77 +1600,29 @@ struct UnnamedBitfieldMiddle {
unsigned char b : 3;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// CHECK64-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// ARM-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-NEXT: ret void
//
void testUnnamedBitfieldMiddle(struct UnnamedBitfieldMiddle *s) {
// byte 0: a[0-2], unnamed[3-4], b[5-7]
@@ -2633,101 +1637,37 @@ struct UnnamedBitfieldSurrounding {
unsigned char : 2;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// CHECK64-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// CHECK64-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
void testUnnamedBitfieldSurrounding(struct UnnamedBitfieldSurrounding *s) {
// byte 0: unnamed[0-1], a[2-5], unnamed[6-7]
@@ -2744,61 +1684,33 @@ struct UnnamedZeroWidthBitfield {
unsigned int b : 4;
};
-// LINUX-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
-// LINUX-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
-// LINUX-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
-// LINUX-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP10]], align 1
-// LINUX-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 2
-// LINUX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP12]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
-// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
-// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
-// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
-// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
-// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// CHECK64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// CHECK64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// CHECK64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// CHECK64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// CHECK64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -2856,34 +1768,6 @@ struct UnnamedZeroWidthBitfield {
// ARM-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -2936,37 +1820,21 @@ struct UnnamedBitfieldMultiByte {
unsigned short b : 4;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3000,22 +1868,6 @@ struct UnnamedBitfieldMultiByte {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3025,82 +1877,50 @@ struct UnnamedBitfieldMultiByte {
// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -16
-// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 15
-// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
-//
-void testUnnamedBitfieldMultiByte(struct UnnamedBitfieldMultiByte *s) {
- // The masks below describe little endian; big endian swaps them.
- // 2 bytes: a[0-3], unnamed[4-11], b[12-15]
- // byte 0: clear bits 4-7
- // byte 1: clear bits 0-3
- //
- // Masks:
- // 0b00001111 == 15
- // 0b11110000 == -16
- __builtin_clear_padding(s);
-}
-
-// Complete bytes require no clearing, including a full 64-bit bitfield.
-struct BitfieldFullBytes {
- unsigned char first : 8;
- unsigned char second : 8;
- unsigned short half : 16;
- unsigned int word : 32;
- unsigned long long wide : 64;
-};
-
-// LINUX-LABEL: define dso_local void @testBitfieldFullBytes(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldFullBytes(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testBitfieldFullBytes(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testBitfieldFullBytes(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldFullBytes(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testBitfieldFullBytes(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 15
+// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// AARCH64-BE-NEXT: ret void
//
+void testUnnamedBitfieldMultiByte(struct UnnamedBitfieldMultiByte *s) {
+ // The masks below describe little endian; big endian swaps them.
+ // 2 bytes: a[0-3], unnamed[4-11], b[12-15]
+ // byte 0: clear bits 4-7
+ // byte 1: clear bits 0-3
+ //
+ // Masks:
+ // 0b00001111 == 15
+ // 0b11110000 == -16
+ __builtin_clear_padding(s);
+}
+
+// Complete bytes require no clearing, including a full 64-bit bitfield.
+struct BitfieldFullBytes {
+ unsigned char first : 8;
+ unsigned char second : 8;
+ unsigned short half : 16;
+ unsigned int word : 32;
+ unsigned long long wide : 64;
+};
+
+// CHECK64-LABEL: define dso_local void @testBitfieldFullBytes(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testBitfieldFullBytes(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: ret void
+//
void testBitfieldFullBytes(struct BitfieldFullBytes *s) {
__builtin_clear_padding(s);
}
@@ -3112,29 +1932,17 @@ struct BitfieldEndAligned {
unsigned short value : 13;
};
-// LINUX-LABEL: define dso_local void @testBitfieldEndAligned(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldEndAligned(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldEndAligned(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldEndAligned(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3160,18 +1968,6 @@ struct BitfieldEndAligned {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldEndAligned(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldEndAligned(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3197,41 +1993,23 @@ struct BitfieldPartialEnds {
unsigned int : 11;
};
-// LINUX-LABEL: define dso_local void @testBitfieldPartialEnds(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldPartialEnds(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3269,24 +2047,6 @@ struct BitfieldPartialEnds {
// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldPartialEnds(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3316,37 +2076,21 @@ struct BitfieldSingleValueBit {
unsigned char : 5;
};
-// LINUX-LABEL: define dso_local void @testBitfieldSingleValueBit(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldSingleValueBit(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3380,22 +2124,6 @@ struct BitfieldSingleValueBit {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldSingleValueBit(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3426,25 +2154,25 @@ struct BitfieldMixedMembers {
unsigned short suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldMixedMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3530,26 +2258,6 @@ struct BitfieldMixedMembers {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3574,25 +2282,25 @@ void testBitfieldMixedMembers(struct BitfieldMixedMembers *s) {
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3678,26 +2386,6 @@ void testBitfieldMixedMembers(struct BitfieldMixedMembers *s) {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3731,25 +2419,25 @@ struct BitfieldMixedVolatileMembers {
unsigned short suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3835,26 +2523,6 @@ struct BitfieldMixedVolatileMembers {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3879,25 +2547,25 @@ void testBitfieldMixedVolatileMembers(struct BitfieldMixedVolatileMembers *s) {
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3983,26 +2651,6 @@ void testBitfieldMixedVolatileMembers(struct BitfieldMixedVolatileMembers *s) {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4036,77 +2684,41 @@ struct BitfieldNestedArray {
unsigned char suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldNestedArray(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
-// LINUX-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
-// LINUX-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
-// LINUX-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// LINUX-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
-// LINUX-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
-// LINUX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// LINUX-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
-// LINUX-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
-// LINUX-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
-// LINUX-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP15]], align 1
-// LINUX-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP16]], align 1
-// LINUX-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP17]], align 2
-// LINUX-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP18]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldNestedArray(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
-// WINDOWS-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
-// WINDOWS-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
-// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
-// WINDOWS-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// WINDOWS-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
-// WINDOWS-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
-// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// WINDOWS-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
-// WINDOWS-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
-// WINDOWS-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
-// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
-// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
-// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
-// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldNestedArray(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// CHECK64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// CHECK64-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// CHECK64-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// CHECK64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// CHECK64-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// CHECK64-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// CHECK64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// CHECK64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// CHECK64-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// CHECK64-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldNestedArray(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4180,42 +2792,6 @@ struct BitfieldNestedArray {
// ARM-BE-NEXT: store i8 0, ptr [[TMP18]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldNestedArray(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// AARCH64-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
-// AARCH64-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
-// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
-// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
-// AARCH64-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
-// AARCH64-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldNestedArray(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4263,33 +2839,19 @@ union BitfieldUnionOverlay {
unsigned char raw;
};
-// LINUX-LABEL: define dso_local void @testBitfieldUnionOverlay(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldUnionOverlay(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4319,20 +2881,6 @@ union BitfieldUnionOverlay {
// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnionOverlay(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4358,23 +2906,23 @@ struct BitfieldBoolEnum {
unsigned char payload : 3;
};
-// LINUX-LABEL: define dso_local void @testBitfieldBoolEnum(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldBoolEnum(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4450,24 +2998,6 @@ struct BitfieldBoolEnum {
// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldBoolEnum(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4497,29 +3027,29 @@ struct BitfieldBitIntMembers {
unsigned _BitInt(65) wide : 61;
};
-// LINUX-LABEL: define dso_local void @testBitfieldBitIntMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 4
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 2
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ITANIUM64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldBitIntMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4615,30 +3145,6 @@ struct BitfieldBitIntMembers {
// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldBitIntMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4676,17 +3182,17 @@ struct __attribute__((packed)) BitfieldPackedMembers {
unsigned char suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldPackedMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldPackedMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4734,18 +3240,6 @@ struct __attribute__((packed)) BitfieldPackedMembers {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldPackedMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4811,101 +3305,53 @@ struct BitfieldUnnamedOnly {
// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// AARCH64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-NEXT: ret void
//
void testBitfieldUnnamedOnly(struct BitfieldUnnamedOnly *s) {
__builtin_clear_padding(s);
diff --git a/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp b/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
index 858b43168a67d..55651e21b3a40 100644
--- a/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
+++ b/clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
@@ -1,74 +1,34 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
// Test functions use C linkage so the updater recognizes their Windows names.
-// RUN: %clang_cc1 -std=c++20 -triple=x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=LINUX
-// RUN: %clang_cc1 -std=c++20 -triple=x86_64-pc-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=WINDOWS
-// RUN: %clang_cc1 -std=c++20 -triple=armv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-LE
-// RUN: %clang_cc1 -std=c++20 -triple=armebv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM-BE
-// RUN: %clang_cc1 -std=c++20 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-LE
-// RUN: %clang_cc1 -std=c++20 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefix=AARCH64-BE
+// RUN: %clang_cc1 -std=c++20 -triple=x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,CHECK64-LE,ITANIUM64,ITANIUM64-LE,LINUX
+// RUN: %clang_cc1 -std=c++20 -triple=x86_64-pc-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,CHECK64-LE,WINDOWS
+// RUN: %clang_cc1 -std=c++20 -triple=armv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM,ARM-LE
+// RUN: %clang_cc1 -std=c++20 -triple=armebv7a-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM,ARM-BE
+// RUN: %clang_cc1 -std=c++20 -triple=aarch64-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,CHECK64-LE,ITANIUM64,ITANIUM64-LE,AARCH64
+// RUN: %clang_cc1 -std=c++20 -triple=aarch64_be-none-eabi -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK64,ITANIUM64,AARCH64,AARCH64-BE
struct Empty {};
-// LINUX-LABEL: define dso_local void @testEmpty(
-// LINUX-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testEmpty(
-// WINDOWS-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testEmpty(
-// ARM-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testEmpty(
-// ARM-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testEmpty(
-// AARCH64-LE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testEmpty(
-// AARCH64-BE-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testEmpty(
+// CHECK64-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testEmpty(
+// ARM-SAME: ptr noundef [[E:%.*]]) #[[ATTR0:[0-9]+]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testEmpty(Empty *e) {
// This should clear the one byte that Empty occupies.
@@ -77,53 +37,21 @@ extern "C" void testEmpty(Empty *e) {
-// LINUX-LABEL: define dso_local void @testPrimitiveNoPadding(
-// LINUX-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testPrimitiveNoPadding(
-// WINDOWS-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// ARM-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
-// ARM-LE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testPrimitiveNoPadding(
+// CHECK64-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
+// CHECK64-NEXT: ret void
//
-// ARM-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// ARM-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// AARCH64-LE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPrimitiveNoPadding(
-// AARCH64-BE-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testPrimitiveNoPadding(
+// ARM-SAME: ptr noundef [[I:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
+// ARM-NEXT: ret void
//
extern "C" void testPrimitiveNoPadding(int *i) {
// This should not clear any padding, since int has no padding.
@@ -160,37 +88,21 @@ extern "C" void testPrimitiveNoPadding(int *i) {
// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// ARM-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// ARM-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// AARCH64-LE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPrimitiveLongDouble(
-// AARCH64-BE-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testPrimitiveLongDouble(
+// ARM-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 4
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testPrimitiveLongDouble(
+// AARCH64-SAME: ptr noundef [[LD:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[LD_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[LD]], ptr [[LD_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LD_ADDR]], align 8
+// AARCH64-NEXT: ret void
//
extern "C" void testPrimitiveLongDouble(long double *ld) {
// padding [10, 15] on x86
@@ -198,41 +110,23 @@ extern "C" void testPrimitiveLongDouble(long double *ld) {
}
-// LINUX-LABEL: define dso_local void @testBitInt(
-// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitInt(
-// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitInt(
+// CHECK64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitInt(
// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
@@ -270,24 +164,6 @@ extern "C" void testPrimitiveLongDouble(long double *ld) {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitInt(
-// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitInt(
// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -312,25 +188,15 @@ extern "C" void testBitInt(_BitInt(97) *bi) {
}
-// LINUX-LABEL: define dso_local void @testBitIntByteAligned(
-// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitIntByteAligned(
-// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitIntByteAligned(
+// CHECK64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitIntByteAligned(
// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
@@ -352,16 +218,6 @@ extern "C" void testBitInt(_BitInt(97) *bi) {
// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitIntByteAligned(
-// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitIntByteAligned(
// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -377,41 +233,23 @@ extern "C" void testBitIntByteAligned(_BitInt(24) *bi) {
__builtin_clear_padding(bi);
}
-// LINUX-LABEL: define dso_local void @testVolatileBitInt(
-// LINUX-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testVolatileBitInt(
-// WINDOWS-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testVolatileBitInt(
+// CHECK64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testVolatileBitInt(
// ARM-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
@@ -449,24 +287,6 @@ extern "C" void testBitIntByteAligned(_BitInt(24) *bi) {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileBitInt(
-// AARCH64-LE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BI_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BI]], ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BI_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileBitInt(
// AARCH64-BE-SAME: ptr noundef [[BI:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -530,37 +350,21 @@ extern "C" void testVolatileBitInt(volatile _BitInt(97) *bi) {
// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// ARM-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// ARM-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// AARCH64-LE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
-// AARCH64-BE-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// ARM-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testPrimitiveComplexLongDouble(
+// AARCH64-SAME: ptr noundef [[C:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
+// AARCH64-NEXT: ret void
//
extern "C" void testPrimitiveComplexLongDouble(_Complex long double *c) {
// padding [10, 15] and [26, 31] on x86
@@ -573,53 +377,21 @@ union U1 {
char c;
};
-// LINUX-LABEL: define dso_local void @testUnionDifferentLength(
-// LINUX-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnionDifferentLength(
-// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnionDifferentLength(
-// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnionDifferentLength(
-// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnionDifferentLength(
-// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnionDifferentLength(
-// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnionDifferentLength(
+// CHECK64-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnionDifferentLength(
+// ARM-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-NEXT: ret void
//
extern "C" void testUnionDifferentLength(U1 *u) {
// This should not clear the object representation bits of the non-active member.
@@ -637,137 +409,49 @@ union U2 {
char c2;
};
-// LINUX-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// LINUX-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// WINDOWS-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 4
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// ARM-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// ARM-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// AARCH64-LE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
-// AARCH64-BE-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// CHECK64-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 4
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 2
+// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnionTailPaddingOfLongestMember(
+// ARM-SAME: ptr noundef [[U:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[U_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[U]], ptr [[U_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[U_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testUnionTailPaddingOfLongestMember(U2 *u) {
// This should clear the tail padding of the longest member.
@@ -798,137 +482,49 @@ struct alignas(4) Baz : Foo {
// %struct.Foo = type { i8, i8, i8, i8 }
// %struct.Bar = type { i8, i8, i8, i8 }
-// LINUX-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// LINUX-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
-// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// CHECK64-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testStructPaddingInBetweenMembers(
+// ARM-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testStructPaddingInBetweenMembers(Baz *baz) {
// this should clear all the padding in between various members
@@ -936,173 +532,85 @@ extern "C" void testStructPaddingInBetweenMembers(Baz *baz) {
}
-// LINUX-LABEL: define dso_local void @testStructVolatile(
-// LINUX-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testStructVolatile(
+// CHECK64-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testStructVolatile(
+// ARM-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
+//
+extern "C" void testStructVolatile(volatile Baz *baz) {
+ // this should clear all the padding in between various members
+ __builtin_clear_padding(baz);
+}
+
+
+class S1 {
+ int x;
+ char c;
+};
+
+class S2 {
+ [[no_unique_address]] S1 s1;
+ bool b;
+};
+
+// ITANIUM64-LABEL: define dso_local void @testNoUniqueAddress(
+// ITANIUM64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ITANIUM64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ITANIUM64-NEXT: ret void
//
-// WINDOWS-LABEL: define dso_local void @testStructVolatile(
-// WINDOWS-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
+// WINDOWS-LABEL: define dso_local void @testNoUniqueAddress(
+// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testStructVolatile(
-// ARM-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructVolatile(
-// ARM-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructVolatile(
-// AARCH64-LE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructVolatile(
-// AARCH64-BE-SAME: ptr noundef [[BAZ:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[BAZ_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[BAZ]], ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAZ_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: ret void
-//
-extern "C" void testStructVolatile(volatile Baz *baz) {
- // this should clear all the padding in between various members
- __builtin_clear_padding(baz);
-}
-
-
-class S1 {
- int x;
- char c;
-};
-
-class S2 {
- [[no_unique_address]] S1 s1;
- bool b;
-};
-
-// LINUX-LABEL: define dso_local void @testNoUniqueAddress(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testNoUniqueAddress(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
@@ -1116,53 +624,17 @@ class S2 {
// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testNoUniqueAddress(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testNoUniqueAddress(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testNoUniqueAddress(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testNoUniqueAddress(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testNoUniqueAddress(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testNoUniqueAddress(S2 *s) {
// "x [0-3]", "c" , "b", PAD [6-7]
@@ -1247,125 +719,65 @@ struct S3 {
// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testStructWithLongDouble(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructWithLongDouble(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructWithLongDouble(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 8
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 4
-// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 1
-// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 2
-// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructWithLongDouble(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 8
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 4
-// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 1
-// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 2
-// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testStructWithLongDouble(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testStructWithLongDouble(
+// AARCH64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 17
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 18
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 19
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 20
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 4
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 21
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 22
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 2
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 23
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 8
+// AARCH64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// AARCH64-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// AARCH64-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// AARCH64-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// AARCH64-NEXT: store i8 0, ptr [[TMP12]], align 4
+// AARCH64-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// AARCH64-NEXT: store i8 0, ptr [[TMP13]], align 1
+// AARCH64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// AARCH64-NEXT: store i8 0, ptr [[TMP14]], align 2
+// AARCH64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// AARCH64-NEXT: store i8 0, ptr [[TMP15]], align 1
+// AARCH64-NEXT: ret void
//
extern "C" void testStructWithLongDouble(S3 *s) {
// "long double data[0-9]", PAD [10-15], "b", PAD [17-31]
@@ -1380,89 +792,33 @@ struct S4 : Empty, B {
bool b;
};
-// LINUX-LABEL: define dso_local void @testStructWithEmptyBase(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testStructWithEmptyBase(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testStructWithEmptyBase(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testStructWithEmptyBase(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testStructWithEmptyBase(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testStructWithEmptyBase(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testStructWithEmptyBase(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testStructWithEmptyBase(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testStructWithEmptyBase(S4 *s) {
// "i" [0-3], "b" [4], PAD [5-7]
@@ -1479,125 +835,45 @@ struct B2 {
struct S5 : B1, B2 {
};
-// LINUX-LABEL: define dso_local void @testPaddingBetweenBases(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testPaddingBetweenBases(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testPaddingBetweenBases(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPaddingBetweenBases(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPaddingBetweenBases(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPaddingBetweenBases(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testPaddingBetweenBases(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testPaddingBetweenBases(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testPaddingBetweenBases(S5 *s) {
// "c1" [0], PAD [1-3] , "c2" [4], PAD [5-7]
@@ -1617,113 +893,41 @@ struct S6 : B3, B4 {
alignas(4) char c3;
};
-// LINUX-LABEL: define dso_local void @testPaddingAfterLastBase(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testPaddingAfterLastBase(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testPaddingAfterLastBase(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testPaddingAfterLastBase(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testPaddingAfterLastBase(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testPaddingAfterLastBase(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testPaddingAfterLastBase(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// CHECK64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testPaddingAfterLastBase(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testPaddingAfterLastBase(S6 *s) {
// "c1"[0], "c2"[1], PAD [2-3], "c3" [4], PAD [5-7]
@@ -1750,16 +954,16 @@ struct S7 : VirtualBase, NonVirtualBase {
bool z;
};
-// LINUX-LABEL: define dso_local void @testVtable(
-// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 2
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testVtable(
+// ITANIUM64-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVtable(
// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
@@ -1777,61 +981,28 @@ struct S7 : VirtualBase, NonVirtualBase {
// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 18
// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 2
// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 19
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 20
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 4
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
-// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
-// WINDOWS-NEXT: call void @"??1S7@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(24) dereferenceable(24) [[S]]) #[[ATTR1:[0-9]+]]
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testVtable(
-// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testVtable(
-// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: ret void
+// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 1
+// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 4
+// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
+// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 2
+// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 1
+// WINDOWS-NEXT: call void @"??1S7@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(24) dereferenceable(24) [[S]]) #[[ATTR1:[0-9]+]]
+// WINDOWS-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVtable(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testVtable(
-// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testVtable(
+// ARM-SAME: ptr nofreeobj noundef align 4 dereferenceable(12) [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testVtable(S7 s) {
// "vtable ptr" [0-7], "x" [8-11], "y" [12], "z" [13], PAD [14-15]
@@ -1869,32 +1040,32 @@ struct S8 : VirtualBase1, VirtualBase2, NonVirtualBase1, VirtualBase3 {
bool z;
};
-// LINUX-LABEL: define dso_local void @testMultipleBasesVtable(
-// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 4
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 45
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 46
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 2
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 47
-// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testMultipleBasesVtable(
+// ITANIUM64-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP0]], align 4
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ITANIUM64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ITANIUM64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ITANIUM64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ITANIUM64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ITANIUM64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 45
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 46
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ITANIUM64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 47
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testMultipleBasesVtable(
// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(56) [[S:%.*]]) #[[ATTR0]] {
@@ -1940,97 +1111,24 @@ struct S8 : VirtualBase1, VirtualBase2, NonVirtualBase1, VirtualBase3 {
// WINDOWS-NEXT: call void @"??1S8@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(56) dereferenceable(56) [[S]]) #[[ATTR1]]
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testMultipleBasesVtable(
-// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 17
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 18
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 19
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testMultipleBasesVtable(
-// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 17
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 18
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 19
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testMultipleBasesVtable(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 4
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 45
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 46
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 47
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testMultipleBasesVtable(
-// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 12
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 4
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 45
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 46
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 2
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 47
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testMultipleBasesVtable(
+// ARM-SAME: ptr nofreeobj noundef align 4 dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 17
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testMultipleBasesVtable(S8 s) {
// "vtable ptr" [0-7], "x1" [8-11], PAD "[12-15]",
@@ -2069,16 +1167,16 @@ struct S9 : NonVirtualBase2, VirtualChain3 {
bool z;
};
-// LINUX-LABEL: define dso_local void @testVirtualChain(
-// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 2
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testVirtualChain(
+// ITANIUM64-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVirtualChain(
// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
@@ -2124,49 +1222,16 @@ struct S9 : NonVirtualBase2, VirtualChain3 {
// WINDOWS-NEXT: call void @"??1S9@@UEAA at XZ"(ptr noundef nonnull align 8 dead_on_return(40) dereferenceable(40) [[S]]) #[[ATTR1]]
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testVirtualChain(
-// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(20) [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 18
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 19
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testVirtualChain(
-// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(20) [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 18
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 19
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testVirtualChain(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testVirtualChain(
-// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 2
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testVirtualChain(
+// ARM-SAME: ptr nofreeobj noundef align 4 dereferenceable(20) [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 18
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 2
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 19
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testVirtualChain(S9 s) {
// This should clear the padding after the bool z.
@@ -2195,30 +1260,30 @@ struct S10 : D1, D2 {
bool s;
};
-// LINUX-LABEL: define dso_local void @testVirtualInheritance(
-// LINUX-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 36
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 4
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 37
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 38
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 39
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testVirtualInheritance(
+// ITANIUM64-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ITANIUM64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ITANIUM64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ITANIUM64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ITANIUM64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 36
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ITANIUM64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 37
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ITANIUM64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 38
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 39
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVirtualInheritance(
// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(48) [[S:%.*]]) #[[ATTR0]] {
@@ -2261,89 +1326,22 @@ struct S10 : D1, D2 {
// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testVirtualInheritance(
-// ARM-LE-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(28) [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testVirtualInheritance(
-// ARM-BE-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(28) [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testVirtualInheritance(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 36
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 37
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 38
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 39
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testVirtualInheritance(
-// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(40) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 36
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 37
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 38
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 39
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testVirtualInheritance(
+// ARM-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(28) [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testVirtualInheritance(S10 s) {
// note derived member placed before the virtual base
@@ -2360,26 +1358,26 @@ struct S10_2 : virtual Base {
virtual ~S10_2() = default;
};
-// LINUX-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
-// LINUX-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 20
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// ITANIUM64-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ITANIUM64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ITANIUM64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 20
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP3]], align 4
+// ITANIUM64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ITANIUM64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ITANIUM64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(32) [[S:%.*]]) #[[ATTR0]] {
@@ -2403,73 +1401,18 @@ struct S10_2 : virtual Base {
// WINDOWS-NEXT: call void @"??_DS10_2@@QEAAXXZ"(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR1]]
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
-// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
-// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 20
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
-// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 20
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 4
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testVirtualInheritanceAndVirtualFunction(
+// ARM-SAME: ptr nofreeobj noundef align 4 dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testVirtualInheritanceAndVirtualFunction(S10_2 s) {
__builtin_clear_padding(&s);
@@ -2484,29 +1427,17 @@ struct S11 {
unsigned char b4 : 2; // 2 bits for b4 - next (and final) bits in the 2nd byte
};
-// LINUX-LABEL: define dso_local void @testBitFields(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitFields(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitFields(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitFields(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -2532,18 +1463,6 @@ struct S11 {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitFields(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitFields(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -2569,25 +1488,25 @@ struct VolatileBitfield {
volatile int c : 27;
};
-// LINUX-LABEL: define dso_local void @testVolatileBitfields(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testVolatileBitfields(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVolatileBitfields(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -2661,26 +1580,6 @@ struct VolatileBitfield {
// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfields(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfields(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -2705,25 +1604,25 @@ extern "C" void testVolatileBitfields(struct VolatileBitfield *s) {
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -2797,26 +1696,6 @@ extern "C" void testVolatileBitfields(struct VolatileBitfield *s) {
// ARM-BE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileBitfieldsVolatileStruct(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -2853,27 +1732,27 @@ struct OversizedBitfield {
int c : 35;
};
-// LINUX-LABEL: define dso_local void @testOversizedBitfield(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testOversizedBitfield(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testOversizedBitfield(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -2931,28 +1810,6 @@ struct OversizedBitfield {
// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testOversizedBitfield(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testOversizedBitfield(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -2991,27 +1848,27 @@ extern "C" void testOversizedBitfield(struct OversizedBitfield *s) {
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3069,28 +1926,6 @@ extern "C" void testOversizedBitfield(struct OversizedBitfield *s) {
// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testOversizedBitfieldVolatileStruct(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3136,27 +1971,27 @@ struct VolatileOversizedBitfield {
volatile int c : 35;
};
-// LINUX-LABEL: define dso_local void @testVolatileOversizedBitfield(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testVolatileOversizedBitfield(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testVolatileOversizedBitfield(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3214,28 +2049,6 @@ struct VolatileOversizedBitfield {
// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileOversizedBitfield(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileOversizedBitfield(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3275,27 +2088,27 @@ extern "C" void testVolatileOversizedBitfield(
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -3353,28 +2166,6 @@ extern "C" void testVolatileOversizedBitfield(
// ARM-BE-NEXT: store i8 0, ptr [[TMP17]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testVolatileOversizedBitfieldVolatileStruct(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -3431,29 +2222,17 @@ extern "C" void testVolatileOversizedBitfieldVolatileStruct(
// WINDOWS-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testArrayNoPadding(
-// ARM-LE-SAME: ) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testArrayNoPadding(
-// ARM-BE-SAME: ) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrayNoPadding(
-// AARCH64-LE-SAME: ) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// AARCH64-LE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testArrayNoPadding(
+// ARM-SAME: ) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// ARM-NEXT: ret void
//
-// AARCH64-BE-LABEL: define dso_local void @testArrayNoPadding(
-// AARCH64-BE-SAME: ) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
-// AARCH64-BE-NEXT: ret void
+// AARCH64-LABEL: define dso_local void @testArrayNoPadding(
+// AARCH64-SAME: ) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[I:%.*]] = alloca [4 x i32], align 4
+// AARCH64-NEXT: ret void
//
extern "C" void testArrayNoPadding() {
int i[4];
@@ -3498,29 +2277,17 @@ extern "C" void testArrayNoPadding() {
// WINDOWS-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testArrayLongDouble(
-// ARM-LE-SAME: ) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testArrayLongDouble(
-// ARM-BE-SAME: ) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrayLongDouble(
-// AARCH64-LE-SAME: ) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrayLongDouble(
-// AARCH64-BE-SAME: ) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testArrayLongDouble(
+// ARM-SAME: ) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[LD:%.*]] = alloca [2 x double], align 8
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testArrayLongDouble(
+// AARCH64-SAME: ) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[LD:%.*]] = alloca [2 x fp128], align 16
+// AARCH64-NEXT: ret void
//
extern "C" void testArrayLongDouble() {
// long double 0, [0-9] PAD [10-15]
@@ -3590,125 +2357,65 @@ extern "C" void testArrayLongDouble() {
// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testArrayOfStruct(
-// ARM-LE-SAME: ) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// ARM-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// ARM-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// ARM-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// ARM-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// ARM-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testArrayOfStruct(
-// ARM-BE-SAME: ) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// ARM-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// ARM-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// ARM-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrayOfStruct(
-// AARCH64-LE-SAME: ) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrayOfStruct(
-// AARCH64-BE-SAME: ) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 2
-// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testArrayOfStruct(
+// ARM-SAME: ) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// ARM-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// ARM-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ARM-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// ARM-NEXT: store i8 0, ptr [[TMP10]], align 2
+// ARM-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// ARM-NEXT: store i8 0, ptr [[TMP11]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testArrayOfStruct(
+// AARCH64-SAME: ) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[S:%.*]] = alloca [2 x [[STRUCT_S_0:%.*]]], align 4
+// AARCH64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 5
+// AARCH64-NEXT: store i8 0, ptr [[TMP0]], align 1
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 6
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 7
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 13
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 2
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 1
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 21
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[S]], i32 22
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[S]], i32 23
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 29
+// AARCH64-NEXT: store i8 0, ptr [[TMP9]], align 1
+// AARCH64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[S]], i32 30
+// AARCH64-NEXT: store i8 0, ptr [[TMP10]], align 2
+// AARCH64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[S]], i32 31
+// AARCH64-NEXT: store i8 0, ptr [[TMP11]], align 1
+// AARCH64-NEXT: ret void
//
extern "C" void testArrayOfStruct() {
struct S {
@@ -3736,101 +2443,37 @@ struct ArrOfStructsWithPadding {
// "c" (1), PAD_1, "d" (1), PAD_2, "c" (2), PAD_3, "d" (2), PAD_4
// %struct.ArrOfStructsWithPadding = type { [2 x %struct.Bar] }
-// LINUX-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// LINUX-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// WINDOWS-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// ARM-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// ARM-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// AARCH64-LE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testArrOfStructsWithPadding(
-// AARCH64-BE-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// CHECK64-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testArrOfStructsWithPadding(
+// ARM-SAME: ptr noundef [[ARR:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARR_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testArrOfStructsWithPadding(ArrOfStructsWithPadding *arr) {
__builtin_clear_padding(arr);
@@ -3843,166 +2486,62 @@ struct S12 {
char c;
};
-// LINUX-LABEL: define dso_local void @testTemplateStruct(
-// LINUX-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testTemplateStruct(
-// WINDOWS-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testTemplateStruct(
-// ARM-LE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testTemplateStruct(
-// ARM-BE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testTemplateStruct(
-// AARCH64-LE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testTemplateStruct(
-// AARCH64-BE-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testTemplateStruct(
+// CHECK64-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 2
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testTemplateStruct(
+// ARM-SAME: ptr noundef [[S12:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S12_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S12]], ptr [[S12_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S12_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testTemplateStruct(S12<int>* s12) {
__builtin_clear_padding(s12);
}
-// LINUX-LABEL: define dso_local void @testAtomic(
-// LINUX-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testAtomic(
-// WINDOWS-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testAtomic(
-// ARM-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testAtomic(
-// ARM-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testAtomic(
-// AARCH64-LE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testAtomic(
-// AARCH64-BE-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testAtomic(
+// CHECK64-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testAtomic(
+// ARM-SAME: ptr noundef [[BAR:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[BAR_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[BAR]], ptr [[BAR_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BAR_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testAtomic(_Atomic(Bar)* bar) {
__builtin_clear_padding(bar);
@@ -4022,18 +2561,18 @@ struct NonTriviallyCopyable {
~NonTriviallyCopyable() {}
};
-// LINUX-LABEL: define dso_local void @testNonTriviallyCopyable(
-// LINUX-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LABEL: define dso_local void @testNonTriviallyCopyable(
+// ITANIUM64-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// ITANIUM64-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
+// ITANIUM64-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ITANIUM64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ITANIUM64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// ITANIUM64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ITANIUM64-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testNonTriviallyCopyable(
// WINDOWS-SAME: ptr nofreeobj noundef align 4 dead_on_return dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
@@ -4049,57 +2588,18 @@ struct NonTriviallyCopyable {
// WINDOWS-NEXT: call void @"??1NonTriviallyCopyable@@QEAA at XZ"(ptr noundef nonnull align 4 dead_on_return(8) dereferenceable(8) [[NTC]]) #[[ATTR1]]
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testNonTriviallyCopyable(
-// ARM-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testNonTriviallyCopyable(
-// ARM-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testNonTriviallyCopyable(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testNonTriviallyCopyable(
-// AARCH64-BE-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testNonTriviallyCopyable(
+// ARM-SAME: ptr nofreeobj noundef align 4 dereferenceable(8) [[NTC:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[NTC_INDIRECT_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[NTC]], ptr [[NTC_INDIRECT_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[NTC]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[NTC]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[NTC]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testNonTriviallyCopyable(NonTriviallyCopyable ntc) {
__builtin_clear_padding(&ntc);
@@ -4109,101 +2609,37 @@ extern "C" void testNonTriviallyCopyable(NonTriviallyCopyable ntc) {
typedef float Float3Vec __attribute__((ext_vector_type(3)));
typedef long double LongDouble3Vec __attribute__((ext_vector_type(3)));
-// LINUX-LABEL: define dso_local void @testAttributedType(
-// LINUX-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testAttributedType(
-// WINDOWS-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP2]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP3]], align 2
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testAttributedType(
-// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testAttributedType(
-// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testAttributedType(
-// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testAttributedType(
-// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testAttributedType(
+// CHECK64-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// CHECK64-NEXT: store i8 0, ptr [[TMP1]], align 4
+// CHECK64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testAttributedType(
+// ARM-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testAttributedType(Float3Vec* v) {
__builtin_clear_padding(v);
@@ -4310,169 +2746,93 @@ extern "C" void testAttributedType(Float3Vec* v) {
// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// ARM-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 8
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// ARM-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 8
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
-// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// AARCH64-LE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 16
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 8
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
-// AARCH64-LE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP13]], align 4
-// AARCH64-LE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP14]], align 1
-// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 2
-// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testAttributedLongDoubleType(
-// AARCH64-BE-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 16
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP9]], align 8
-// AARCH64-BE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP11]], align 2
-// AARCH64-BE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
-// AARCH64-BE-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP13]], align 4
-// AARCH64-BE-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP14]], align 1
-// AARCH64-BE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP15]], align 2
-// AARCH64-BE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP16]], align 1
-// AARCH64-BE-NEXT: ret void
-//
-extern "C" void testAttributedLongDoubleType(LongDouble3Vec *v) {
- // long double elements occupy [0-9], [16-25], [32-41] on x86.
- __builtin_clear_padding(v);
-}
-
-
-struct UnnamedBitfieldSingleBit {
- unsigned char a : 3;
- unsigned char : 1;
- unsigned char b : 4;
-};
-
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
+// ARM-LABEL: define dso_local void @testAttributedLongDoubleType(
+// ARM-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 24
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 8
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 25
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 26
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 27
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 28
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 29
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 30
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 31
+// ARM-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testAttributedLongDoubleType(
+// AARCH64-SAME: ptr noundef [[V:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[V_ADDR]], align 8
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 16
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 49
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 50
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 51
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 52
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 53
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 54
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 55
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 56
+// AARCH64-NEXT: store i8 0, ptr [[TMP9]], align 8
+// AARCH64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 57
+// AARCH64-NEXT: store i8 0, ptr [[TMP10]], align 1
+// AARCH64-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 58
+// AARCH64-NEXT: store i8 0, ptr [[TMP11]], align 2
+// AARCH64-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 59
+// AARCH64-NEXT: store i8 0, ptr [[TMP12]], align 1
+// AARCH64-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i32 60
+// AARCH64-NEXT: store i8 0, ptr [[TMP13]], align 4
+// AARCH64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP0]], i32 61
+// AARCH64-NEXT: store i8 0, ptr [[TMP14]], align 1
+// AARCH64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 62
+// AARCH64-NEXT: store i8 0, ptr [[TMP15]], align 2
+// AARCH64-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 63
+// AARCH64-NEXT: store i8 0, ptr [[TMP16]], align 1
+// AARCH64-NEXT: ret void
+//
+extern "C" void testAttributedLongDoubleType(LongDouble3Vec *v) {
+ // long double elements occupy [0-9], [16-25], [32-41] on x86.
+ __builtin_clear_padding(v);
+}
+
+
+struct UnnamedBitfieldSingleBit {
+ unsigned char a : 3;
+ unsigned char : 1;
+ unsigned char b : 4;
+};
+
+// CHECK64-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4498,18 +2858,6 @@ struct UnnamedBitfieldSingleBit {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -9
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSingleBit(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4537,77 +2885,29 @@ struct UnnamedBitfieldMiddle {
unsigned char b : 3;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
-// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// CHECK64-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnnamedBitfieldMiddle(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -25
+// ARM-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testUnnamedBitfieldMiddle(struct UnnamedBitfieldMiddle *s) {
// byte 0: a[0-2], unnamed[3-4], b[5-7]
@@ -4623,101 +2923,37 @@ struct UnnamedBitfieldSurrounding {
unsigned char : 2;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// ARM-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// ARM-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// AARCH64-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
-// AARCH64-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// CHECK64-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// CHECK64-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// CHECK64-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testUnnamedBitfieldSurrounding(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// ARM-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 63
+// ARM-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ARM-NEXT: ret void
//
extern "C" void testUnnamedBitfieldSurrounding(
struct UnnamedBitfieldSurrounding *s) {
@@ -4736,61 +2972,33 @@ struct UnnamedZeroWidthBitfield {
unsigned int b : 4;
};
-// LINUX-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
-// LINUX-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
-// LINUX-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
-// LINUX-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// LINUX-NEXT: store i8 0, ptr [[TMP10]], align 1
-// LINUX-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP11]], align 2
-// LINUX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP12]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: store i8 0, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP6]], align 1
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
-// WINDOWS-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
-// WINDOWS-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
-// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
-// WINDOWS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: store i8 0, ptr [[TMP11]], align 2
-// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP12]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
+// CHECK64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
+// CHECK64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
+// CHECK64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// CHECK64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
+// CHECK64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4848,34 +3056,6 @@ struct UnnamedZeroWidthBitfield {
// ARM-BE-NEXT: store i8 0, ptr [[TMP12]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 4
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 4
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP11]], align 2
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP12]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testUnnamedZeroWidthBitfield(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -4930,37 +3110,21 @@ struct UnnamedBitfieldMultiByte {
unsigned short b : 4;
};
-// LINUX-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -4994,22 +3158,6 @@ struct UnnamedBitfieldMultiByte {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 15
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testUnnamedBitfieldMultiByte(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5049,53 +3197,21 @@ struct BitfieldFullBytes {
unsigned long long wide : 64;
};
-// LINUX-LABEL: define dso_local void @testBitfieldFullBytes(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldFullBytes(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: ret void
-//
-// ARM-LE-LABEL: define dso_local void @testBitfieldFullBytes(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testBitfieldFullBytes(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldFullBytes(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testBitfieldFullBytes(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: ret void
+// CHECK64-LABEL: define dso_local void @testBitfieldFullBytes(
+// CHECK64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-NEXT: [[ENTRY:.*:]]
+// CHECK64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-NEXT: ret void
+//
+// ARM-LABEL: define dso_local void @testBitfieldFullBytes(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: ret void
//
extern "C" void testBitfieldFullBytes(struct BitfieldFullBytes *s) {
__builtin_clear_padding(s);
@@ -5108,29 +3224,17 @@ struct BitfieldEndAligned {
unsigned short value : 13;
};
-// LINUX-LABEL: define dso_local void @testBitfieldEndAligned(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldEndAligned(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldEndAligned(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldEndAligned(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5156,18 +3260,6 @@ struct BitfieldEndAligned {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldEndAligned(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldEndAligned(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5187,47 +3279,29 @@ extern "C" void testBitfieldEndAligned(struct BitfieldEndAligned *s) {
// A normal field with two partial endpoints and a complete middle byte.
// Preserve masks are 0xf8, 0xff, 0x1f, 0x00 on little endian and
// 0x1f, 0xff, 0xf8, 0x00 on big endian.
-struct BitfieldPartialEnds {
- unsigned int : 3;
- unsigned int value : 18;
- unsigned int : 11;
-};
-
-// LINUX-LABEL: define dso_local void @testBitfieldPartialEnds(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldPartialEnds(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: ret void
+struct BitfieldPartialEnds {
+ unsigned int : 3;
+ unsigned int value : 18;
+ unsigned int : 11;
+};
+
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5265,24 +3339,6 @@ struct BitfieldPartialEnds {
// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldPartialEnds(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldPartialEnds(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5312,37 +3368,21 @@ struct BitfieldSingleValueBit {
unsigned char : 5;
};
-// LINUX-LABEL: define dso_local void @testBitfieldSingleValueBit(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldSingleValueBit(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5376,22 +3416,6 @@ struct BitfieldSingleValueBit {
// ARM-BE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldSingleValueBit(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -4
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldSingleValueBit(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5422,25 +3446,25 @@ struct BitfieldMixedMembers {
unsigned short suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldMixedMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5526,26 +3550,6 @@ struct BitfieldMixedMembers {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5570,25 +3574,25 @@ extern "C" void testBitfieldMixedMembers(struct BitfieldMixedMembers *s) {
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5674,26 +3678,6 @@ extern "C" void testBitfieldMixedMembers(struct BitfieldMixedMembers *s) {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedMembersVolatileObject(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5727,25 +3711,25 @@ struct BitfieldMixedVolatileMembers {
unsigned short suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5831,26 +3815,6 @@ struct BitfieldMixedVolatileMembers {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -5876,25 +3840,25 @@ extern "C" void testBitfieldMixedVolatileMembers(
__builtin_clear_padding(s);
}
-// LINUX-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -5980,26 +3944,6 @@ extern "C" void testBitfieldMixedVolatileMembers(
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 7
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldMixedVolatileMembersAndObject(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6033,77 +3977,41 @@ struct BitfieldNestedArray {
unsigned char suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldNestedArray(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
-// LINUX-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
-// LINUX-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
-// LINUX-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// LINUX-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
-// LINUX-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
-// LINUX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// LINUX-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
-// LINUX-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
-// LINUX-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
-// LINUX-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP15]], align 1
-// LINUX-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP16]], align 1
-// LINUX-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP17]], align 2
-// LINUX-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP18]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldNestedArray(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP1]], align 1
-// WINDOWS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
-// WINDOWS-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
-// WINDOWS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
-// WINDOWS-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
-// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
-// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
-// WINDOWS-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// WINDOWS-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
-// WINDOWS-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
-// WINDOWS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// WINDOWS-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
-// WINDOWS-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
-// WINDOWS-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
-// WINDOWS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP15]], align 1
-// WINDOWS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// WINDOWS-NEXT: store i8 0, ptr [[TMP16]], align 1
-// WINDOWS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// WINDOWS-NEXT: store i8 0, ptr [[TMP17]], align 2
-// WINDOWS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// WINDOWS-NEXT: store i8 0, ptr [[TMP18]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldNestedArray(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
+// CHECK64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// CHECK64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
+// CHECK64-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
+// CHECK64-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
+// CHECK64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// CHECK64-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
+// CHECK64-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
+// CHECK64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
+// CHECK64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
+// CHECK64-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
+// CHECK64-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldNestedArray(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -6177,42 +4085,6 @@ struct BitfieldNestedArray {
// ARM-BE-NEXT: store i8 0, ptr [[TMP18]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldNestedArray(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = and i8 [[TMP6]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP7]], ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 8
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// AARCH64-LE-NEXT: [[TMP11:%.*]] = and i8 [[TMP10]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP11]], ptr [[TMP9]], align 4
-// AARCH64-LE-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// AARCH64-LE-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP12]], align 2
-// AARCH64-LE-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP14]], ptr [[TMP12]], align 2
-// AARCH64-LE-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP15]], align 1
-// AARCH64-LE-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP16]], align 1
-// AARCH64-LE-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP17]], align 2
-// AARCH64-LE-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP18]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldNestedArray(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6260,33 +4132,19 @@ union BitfieldUnionOverlay {
unsigned char raw;
};
-// LINUX-LABEL: define dso_local void @testBitfieldUnionOverlay(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldUnionOverlay(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// WINDOWS-NEXT: store i8 0, ptr [[TMP4]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -6316,20 +4174,6 @@ union BitfieldUnionOverlay {
// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnionOverlay(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnionOverlay(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6355,23 +4199,23 @@ struct BitfieldBoolEnum {
unsigned char payload : 3;
};
-// LINUX-LABEL: define dso_local void @testBitfieldBoolEnum(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 1
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldBoolEnum(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -6447,24 +4291,6 @@ struct BitfieldBoolEnum {
// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldBoolEnum(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 63
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldBoolEnum(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6494,29 +4320,29 @@ struct BitfieldBitIntMembers {
unsigned _BitInt(65) wide : 61;
};
-// LINUX-LABEL: define dso_local void @testBitfieldBitIntMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// LINUX-NEXT: store i8 0, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP5]], align 1
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// LINUX-NEXT: store i8 0, ptr [[TMP6]], align 4
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 2
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
+// ITANIUM64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldBitIntMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -6612,30 +4438,6 @@ struct BitfieldBitIntMembers {
// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldBitIntMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 127
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 1
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 12
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 4
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 13
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 14
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 2
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldBitIntMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6673,17 +4475,17 @@ struct __attribute__((packed)) BitfieldPackedMembers {
unsigned char suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldPackedMembers(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldPackedMembers(
// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -6731,18 +4533,6 @@ struct __attribute__((packed)) BitfieldPackedMembers {
// ARM-BE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldPackedMembers(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldPackedMembers(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6808,101 +4598,53 @@ struct BitfieldUnnamedOnly {
// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
// WINDOWS-NEXT: ret void
//
-// ARM-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-LE-NEXT: [[ENTRY:.*:]]
-// ARM-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-LE-NEXT: ret void
-//
-// ARM-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// ARM-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// ARM-BE-NEXT: [[ENTRY:.*:]]
-// ARM-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
-// ARM-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
-// ARM-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// ARM-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// ARM-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// ARM-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// ARM-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// ARM-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// ARM-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// ARM-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// ARM-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// ARM-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// ARM-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// ARM-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// ARM-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// ARM-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// ARM-BE-NEXT: ret void
-//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: ret void
-//
-// AARCH64-BE-LABEL: define dso_local void @testBitfieldUnnamedOnly(
-// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-BE-NEXT: [[ENTRY:.*:]]
-// AARCH64-BE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-BE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-BE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP1]], align 4
-// AARCH64-BE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-BE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP3]], align 2
-// AARCH64-BE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP4]], align 1
-// AARCH64-BE-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP5]], align 4
-// AARCH64-BE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP6]], align 1
-// AARCH64-BE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP7]], align 2
-// AARCH64-BE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-BE-NEXT: ret void
+// ARM-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// ARM-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ARM-NEXT: [[ENTRY:.*:]]
+// ARM-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4
+// ARM-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4
+// ARM-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ARM-NEXT: store i8 0, ptr [[TMP1]], align 4
+// ARM-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ARM-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ARM-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ARM-NEXT: store i8 0, ptr [[TMP3]], align 2
+// ARM-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ARM-NEXT: store i8 0, ptr [[TMP4]], align 1
+// ARM-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// ARM-NEXT: store i8 0, ptr [[TMP5]], align 4
+// ARM-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// ARM-NEXT: store i8 0, ptr [[TMP6]], align 1
+// ARM-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// ARM-NEXT: store i8 0, ptr [[TMP7]], align 2
+// ARM-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// ARM-NEXT: store i8 0, ptr [[TMP8]], align 1
+// ARM-NEXT: ret void
+//
+// AARCH64-LABEL: define dso_local void @testBitfieldUnnamedOnly(
+// AARCH64-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// AARCH64-NEXT: [[ENTRY:.*:]]
+// AARCH64-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// AARCH64-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// AARCH64-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// AARCH64-NEXT: store i8 0, ptr [[TMP1]], align 4
+// AARCH64-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// AARCH64-NEXT: store i8 0, ptr [[TMP2]], align 1
+// AARCH64-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// AARCH64-NEXT: store i8 0, ptr [[TMP3]], align 2
+// AARCH64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// AARCH64-NEXT: store i8 0, ptr [[TMP4]], align 1
+// AARCH64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// AARCH64-NEXT: store i8 0, ptr [[TMP5]], align 4
+// AARCH64-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i32 5
+// AARCH64-NEXT: store i8 0, ptr [[TMP6]], align 1
+// AARCH64-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// AARCH64-NEXT: store i8 0, ptr [[TMP7]], align 2
+// AARCH64-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// AARCH64-NEXT: store i8 0, ptr [[TMP8]], align 1
+// AARCH64-NEXT: ret void
//
extern "C" void testBitfieldUnnamedOnly(struct BitfieldUnnamedOnly *s) {
__builtin_clear_padding(s);
@@ -6918,15 +4660,15 @@ struct BitfieldOversizedAligned {
unsigned char value : 16;
};
-// LINUX-LABEL: define dso_local void @testBitfieldOversizedAligned(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldOversizedAligned(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldOversizedAligned(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -6948,16 +4690,6 @@ struct BitfieldOversizedAligned {
// ARM-BE-NEXT: store i8 0, ptr [[TMP1]], align 2
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldOversizedAligned(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldOversizedAligned(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -6978,19 +4710,19 @@ struct BitfieldOversizedBeyondBoundary {
unsigned char value : 17;
};
-// LINUX-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 1
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: store i8 0, ptr [[TMP3]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -7026,20 +4758,6 @@ struct BitfieldOversizedBeyondBoundary {
// ARM-BE-NEXT: store i8 0, ptr [[TMP8]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 1
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 1
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP3]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldOversizedBeyondBoundary(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -7074,25 +4792,25 @@ struct BitfieldOversizedValueTypes {
unsigned _BitInt(9) precise : 12;
};
-// LINUX-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// LINUX-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// LINUX-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
-// LINUX-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
+// ITANIUM64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
+// ITANIUM64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
+// ITANIUM64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -7138,26 +4856,6 @@ struct BitfieldOversizedValueTypes {
// ARM-BE-NEXT: store i8 [[TMP12]], ptr [[TMP10]], align 2
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 0
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 2
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], -16
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 3
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = and i8 [[TMP8]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP9]], ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldOversizedValueTypes(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -7198,53 +4896,29 @@ struct BitfieldDerived : BitfieldPrefixBase, BitfieldPartialEnds {
unsigned char suffix;
};
-// LINUX-LABEL: define dso_local void @testBitfieldBaseOffset(
-// LINUX-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// LINUX-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// LINUX-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// LINUX-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// LINUX-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// LINUX-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// LINUX-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// LINUX-NEXT: store i8 0, ptr [[TMP7]], align 1
-// LINUX-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// LINUX-NEXT: store i8 0, ptr [[TMP8]], align 1
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 2
-// LINUX-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP10]], align 1
-// LINUX-NEXT: ret void
-//
-// WINDOWS-LABEL: define dso_local void @testBitfieldBaseOffset(
-// WINDOWS-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// WINDOWS-NEXT: [[ENTRY:.*:]]
-// WINDOWS-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// WINDOWS-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// WINDOWS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// WINDOWS-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// WINDOWS-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// WINDOWS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// WINDOWS-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// WINDOWS-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// WINDOWS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// WINDOWS-NEXT: store i8 0, ptr [[TMP7]], align 1
-// WINDOWS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// WINDOWS-NEXT: store i8 0, ptr [[TMP8]], align 1
-// WINDOWS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// WINDOWS-NEXT: store i8 0, ptr [[TMP9]], align 2
-// WINDOWS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// WINDOWS-NEXT: store i8 0, ptr [[TMP10]], align 1
-// WINDOWS-NEXT: ret void
+// CHECK64-LE-LABEL: define dso_local void @testBitfieldBaseOffset(
+// CHECK64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
+// CHECK64-LE-NEXT: [[ENTRY:.*:]]
+// CHECK64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
+// CHECK64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
+// CHECK64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
+// CHECK64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
+// CHECK64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
+// CHECK64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
+// CHECK64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
+// CHECK64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
+// CHECK64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
+// CHECK64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
+// CHECK64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP9]], align 2
+// CHECK64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
+// CHECK64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
+// CHECK64-LE-NEXT: ret void
//
// ARM-LE-LABEL: define dso_local void @testBitfieldBaseOffset(
// ARM-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
@@ -7294,30 +4968,6 @@ struct BitfieldDerived : BitfieldPrefixBase, BitfieldPartialEnds {
// ARM-BE-NEXT: store i8 0, ptr [[TMP10]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldBaseOffset(
-// AARCH64-LE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 4
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i32 6
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP6]], ptr [[TMP4]], align 2
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i32 7
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP7]], align 1
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i32 9
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP8]], align 1
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i32 10
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 2
-// AARCH64-LE-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP10]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldBaseOffset(
// AARCH64-BE-SAME: ptr noundef [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
@@ -7350,28 +5000,28 @@ struct BitfieldVirtualDerived : virtual BitfieldPartialEnds {
unsigned char tag;
};
-// LINUX-LABEL: define dso_local void @testBitfieldVirtualBase(
-// LINUX-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// LINUX-NEXT: [[ENTRY:.*:]]
-// LINUX-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// LINUX-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// LINUX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
-// LINUX-NEXT: store i8 0, ptr [[TMP0]], align 1
-// LINUX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// LINUX-NEXT: store i8 0, ptr [[TMP1]], align 2
-// LINUX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// LINUX-NEXT: store i8 0, ptr [[TMP2]], align 1
-// LINUX-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
-// LINUX-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
-// LINUX-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], -8
-// LINUX-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
-// LINUX-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// LINUX-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 31
-// LINUX-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
-// LINUX-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// LINUX-NEXT: store i8 0, ptr [[TMP9]], align 1
-// LINUX-NEXT: ret void
+// ITANIUM64-LE-LABEL: define dso_local void @testBitfieldVirtualBase(
+// ITANIUM64-LE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
+// ITANIUM64-LE-NEXT: [[ENTRY:.*:]]
+// ITANIUM64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
+// ITANIUM64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
+// ITANIUM64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
+// ITANIUM64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
+// ITANIUM64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
+// ITANIUM64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
+// ITANIUM64-LE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
+// ITANIUM64-LE-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], -8
+// ITANIUM64-LE-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
+// ITANIUM64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 14
+// ITANIUM64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
+// ITANIUM64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 31
+// ITANIUM64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
+// ITANIUM64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 15
+// ITANIUM64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
+// ITANIUM64-LE-NEXT: ret void
//
// WINDOWS-LABEL: define dso_local void @testBitfieldVirtualBase(
// WINDOWS-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(24) [[S:%.*]]) #[[ATTR0]] {
@@ -7458,29 +5108,6 @@ struct BitfieldVirtualDerived : virtual BitfieldPartialEnds {
// ARM-BE-NEXT: store i8 0, ptr [[TMP9]], align 1
// ARM-BE-NEXT: ret void
//
-// AARCH64-LE-LABEL: define dso_local void @testBitfieldVirtualBase(
-// AARCH64-LE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
-// AARCH64-LE-NEXT: [[ENTRY:.*:]]
-// AARCH64-LE-NEXT: [[S_INDIRECT_ADDR:%.*]] = alloca ptr, align 8
-// AARCH64-LE-NEXT: store ptr [[S]], ptr [[S_INDIRECT_ADDR]], align 8
-// AARCH64-LE-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[S]], i32 9
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP0]], align 1
-// AARCH64-LE-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[S]], i32 10
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP1]], align 2
-// AARCH64-LE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[S]], i32 11
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP2]], align 1
-// AARCH64-LE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[S]], i32 12
-// AARCH64-LE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
-// AARCH64-LE-NEXT: [[TMP5:%.*]] = and i8 [[TMP4]], -8
-// AARCH64-LE-NEXT: store i8 [[TMP5]], ptr [[TMP3]], align 4
-// AARCH64-LE-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[S]], i32 14
-// AARCH64-LE-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP8:%.*]] = and i8 [[TMP7]], 31
-// AARCH64-LE-NEXT: store i8 [[TMP8]], ptr [[TMP6]], align 2
-// AARCH64-LE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S]], i32 15
-// AARCH64-LE-NEXT: store i8 0, ptr [[TMP9]], align 1
-// AARCH64-LE-NEXT: ret void
-//
// AARCH64-BE-LABEL: define dso_local void @testBitfieldVirtualBase(
// AARCH64-BE-SAME: ptr nofreeobj noundef align 8 dead_on_return dereferenceable(16) [[S:%.*]]) #[[ATTR0]] {
// AARCH64-BE-NEXT: [[ENTRY:.*:]]
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