[clang] [llvm] [mlir] [CIR] Expand callee-side va_arg on x86_64 (PR #222420)

[Adam Smith via cfe-commits]

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@@ -1059,6 +980,48 @@ void rewriteIndirectReturnCall(cir::CallOp call,
   call->erase();
 }
 
+/// Whether \p ty is an eightbyte that travels in a vector register.  An x87
+/// long double is floating-point but travels in neither register class, so it
+/// is excluded.  A caller reads a false result as the integer class.
+bool isSSERegisterClass(mlir::Type ty) {
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adams381 wrote:

I've made an update to the classifier to give us exactly what we need.  It was previously computed and thrown away.  I've made a small interface to give us exactly what we need.  `ArgInfo` and `ArgClassification` now carry the `NeededInt` and `NeededSSE` the classifier already computes and was throwing away, so `fitsOneVectorSlot`, `isWide128BitInt` and the whole register reconstruction chain are gone.

https://github.com/llvm/llvm-project/pull/222420