[clang] [OpenMP] Avoid use of ConstantExpr::getSizeOf() (PR #222662)
via cfe-commits
cfe-commits at lists.llvm.org
Thu Sep 10 06:56:17 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-clang
Author: Nikita Popov (nikic)
<details>
<summary>Changes</summary>
Support for this will be dropped as part of the ptradd migration. Replace with a constant size.
While I'm touching the code anyway, I also simplified the size calculation a bit. It's computing both the size in bytes and in elements. Avoid doing an unnecessary division followed by multiply for the size in bytes.
---
Patch is 792.34 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/222662.diff
29 Files Affected:
- (modified) clang/lib/CodeGen/CGOpenMPRuntime.cpp (+9-9)
- (modified) clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp (+151-154)
- (modified) clang/test/OpenMP/for_reduction_codegen.cpp (+296-300)
- (modified) clang/test/OpenMP/for_reduction_codegen_UDR.cpp (+250-253)
- (modified) clang/test/OpenMP/for_reduction_task_codegen.cpp (+177-180)
- (modified) clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp (+54-55)
- (modified) clang/test/OpenMP/master_taskloop_reduction_codegen.cpp (+4-5)
- (modified) clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp (+65-66)
- (modified) clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp (+4-5)
- (modified) clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp (+172-175)
- (modified) clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp (+161-164)
- (modified) clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp (+4-5)
- (modified) clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp (+4-5)
- (modified) clang/test/OpenMP/parallel_reduction_codegen.cpp (+232-235)
- (modified) clang/test/OpenMP/parallel_reduction_task_codegen.cpp (+155-158)
- (modified) clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp (+172-175)
- (modified) clang/test/OpenMP/reduction_implicit_map.cpp (+78-80)
- (modified) clang/test/OpenMP/sections_reduction_task_codegen.cpp (+177-180)
- (modified) clang/test/OpenMP/target_in_reduction_codegen.cpp (+1-1)
- (modified) clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp (+151-154)
- (modified) clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp (+134-137)
- (modified) clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp (+275-280)
- (modified) clang/test/OpenMP/task_in_reduction_codegen.cpp (+37-38)
- (modified) clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp (+1-1)
- (modified) clang/test/OpenMP/taskloop_in_reduction_codegen.cpp (+54-55)
- (modified) clang/test/OpenMP/taskloop_reduction_codegen.cpp (+4-5)
- (modified) clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp (+65-66)
- (modified) clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp (+4-5)
- (modified) clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp (+275-280)
``````````diff
diff --git a/clang/lib/CodeGen/CGOpenMPRuntime.cpp b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
index 829a245ab14f2..80d20f3259822 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntime.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
@@ -817,20 +817,20 @@ void ReductionCodeGen::emitAggregateType(CodeGenFunction &CGF, unsigned N) {
llvm::Value *Size;
llvm::Value *SizeInChars;
auto *ElemType = OrigAddresses[N].first.getAddress().getElementType();
- auto *ElemSizeOf = llvm::ConstantExpr::getSizeOf(ElemType);
+ auto *ElemSizeOf = llvm::ConstantInt::get(
+ CGF.SizeTy, CGF.CGM.getDataLayout().getTypeAllocSize(ElemType));
if (AsArraySection) {
- Size = CGF.Builder.CreatePtrDiff(ElemType,
- OrigAddresses[N].second.getPointer(CGF),
- OrigAddresses[N].first.getPointer(CGF));
- Size = CGF.Builder.CreateZExtOrTrunc(Size, ElemSizeOf->getType());
- Size = CGF.Builder.CreateNUWAdd(
- Size, llvm::ConstantInt::get(Size->getType(), /*V=*/1));
- SizeInChars = CGF.Builder.CreateNUWMul(Size, ElemSizeOf);
+ SizeInChars =
+ CGF.Builder.CreatePtrDiff(OrigAddresses[N].second.getPointer(CGF),
+ OrigAddresses[N].first.getPointer(CGF));
+ SizeInChars = CGF.Builder.CreateNUWAdd(SizeInChars, ElemSizeOf);
} else {
SizeInChars =
CGF.getTypeSize(OrigAddresses[N].first.getType().getNonReferenceType());
- Size = CGF.Builder.CreateExactUDiv(SizeInChars, ElemSizeOf);
}
+ Size = ElemSizeOf->isOne()
+ ? SizeInChars
+ : CGF.Builder.CreateExactUDiv(SizeInChars, ElemSizeOf);
Sizes.emplace_back(SizeInChars, Size);
CodeGenFunction::OpaqueValueMapping OpaqueMap(
CGF,
diff --git a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
index 6952dbc6176f3..8d0893970cf48 100644
--- a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
@@ -191,223 +191,221 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: [[TMP10:%.*]] = ptrtoaddr ptr [[ARRAYIDX2]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = sub i64 [[TMP9]], [[TMP10]]
// CHECK1-NEXT: [[TMP12:%.*]] = add nuw i64 [[TMP11]], 1
-// CHECK1-NEXT: [[TMP13:%.*]] = mul nuw i64 [[TMP12]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)
-// CHECK1-NEXT: [[TMP14:%.*]] = call ptr @llvm.stacksave.p0()
-// CHECK1-NEXT: store ptr [[TMP14]], ptr [[SAVED_STACK]], align 8
+// CHECK1-NEXT: [[TMP13:%.*]] = call ptr @llvm.stacksave.p0()
+// CHECK1-NEXT: store ptr [[TMP13]], ptr [[SAVED_STACK]], align 8
// CHECK1-NEXT: [[VLA:%.*]] = alloca i8, i64 [[TMP12]], align 16
// CHECK1-NEXT: store i64 [[TMP12]], ptr [[__VLA_EXPR0]], align 8
-// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP12]]
-// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP15]]
+// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP12]]
+// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP14]]
// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
// CHECK1: omp.arrayinit.body:
// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
// CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
-// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
+// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]
// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
// CHECK1: omp.arrayinit.done:
-// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
-// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
-// CHECK1-NEXT: [[TMP18:%.*]] = ptrtoaddr ptr [[TMP17]] to i64
-// CHECK1-NEXT: [[TMP19:%.*]] = ptrtoaddr ptr [[ARRAYIDX2]] to i64
-// CHECK1-NEXT: [[TMP20:%.*]] = sub i64 [[TMP18]], [[TMP19]]
-// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP20]]
+// CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
+// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
+// CHECK1-NEXT: [[TMP17:%.*]] = ptrtoaddr ptr [[TMP16]] to i64
+// CHECK1-NEXT: [[TMP18:%.*]] = ptrtoaddr ptr [[ARRAYIDX2]] to i64
+// CHECK1-NEXT: [[TMP19:%.*]] = sub i64 [[TMP17]], [[TMP18]]
+// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP19]]
// CHECK1-NEXT: store ptr [[_TMP6]], ptr [[_TMP5]], align 8
-// CHECK1-NEXT: store ptr [[TMP21]], ptr [[_TMP6]], align 8
+// CHECK1-NEXT: store ptr [[TMP20]], ptr [[_TMP6]], align 8
// CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [2 x [[STRUCT_KMP_TASKRED_INPUT_T]]], ptr [[DOTRD_INPUT_]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0
-// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP22]], align 8
-// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP23]], align 8
-// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2
-// CHECK1-NEXT: store i64 4, ptr [[TMP24]], align 8
-// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init., ptr [[TMP25]], align 8
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4
-// CHECK1-NEXT: store ptr null, ptr [[TMP26]], align 8
-// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP27]], align 8
-// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6
-// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP28]], i8 0, i64 4, i1 false)
+// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0
+// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP21]], align 8
+// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP22]], align 8
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2
+// CHECK1-NEXT: store i64 4, ptr [[TMP23]], align 8
+// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init., ptr [[TMP24]], align 8
+// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4
+// CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8
+// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP26]], align 8
+// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6
+// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP27]], i8 0, i64 4, i1 false)
// CHECK1-NEXT: [[DOTRD_INPUT_GEP_7:%.*]] = getelementptr inbounds nuw [2 x [[STRUCT_KMP_TASKRED_INPUT_T]]], ptr [[DOTRD_INPUT_]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
-// CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP30]], i64 0
-// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[ARRAYIDX8]], align 8
-// CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP31]], i64 0
-// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP0]], align 4
-// CHECK1-NEXT: [[TMP33:%.*]] = sext i32 [[TMP32]] to i64
-// CHECK1-NEXT: [[LB_ADD_LEN10:%.*]] = add nsw i64 -1, [[TMP33]]
-// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
-// CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP34]], i64 9
-// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8
-// CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP35]], i64 [[LB_ADD_LEN10]]
-// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP29]], align 8
-// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP36]], align 8
-// CHECK1-NEXT: [[TMP37:%.*]] = ptrtoaddr ptr [[ARRAYIDX12]] to i64
-// CHECK1-NEXT: [[TMP38:%.*]] = ptrtoaddr ptr [[ARRAYIDX9]] to i64
-// CHECK1-NEXT: [[TMP39:%.*]] = sub i64 [[TMP37]], [[TMP38]]
-// CHECK1-NEXT: [[TMP40:%.*]] = add nuw i64 [[TMP39]], 1
-// CHECK1-NEXT: [[TMP41:%.*]] = mul nuw i64 [[TMP40]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)
-// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 2
-// CHECK1-NEXT: store i64 [[TMP41]], ptr [[TMP42]], align 8
-// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 3
-// CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP43]], align 8
-// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 4
-// CHECK1-NEXT: store ptr null, ptr [[TMP44]], align 8
-// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 5
-// CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP45]], align 8
-// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 6
-// CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 8
-// CHECK1-NEXT: [[TMP47:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT: [[TMP48:%.*]] = load i32, ptr [[TMP47]], align 4
-// CHECK1-NEXT: [[TMP49:%.*]] = call ptr @__kmpc_taskred_modifier_init(ptr @[[GLOB2]], i32 [[TMP48]], i32 1, i32 2, ptr [[DOTRD_INPUT_]])
-// CHECK1-NEXT: store ptr [[TMP49]], ptr [[DOTTASK_RED_]], align 8
-// CHECK1-NEXT: [[TMP50:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4
-// CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3:[0-9]+]], i32 [[TMP51]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK1-NEXT: [[TMP52:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
-// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP52]], 9
+// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
+// CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP29]], i64 0
+// CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[ARRAYIDX8]], align 8
+// CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP30]], i64 0
+// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP0]], align 4
+// CHECK1-NEXT: [[TMP32:%.*]] = sext i32 [[TMP31]] to i64
+// CHECK1-NEXT: [[LB_ADD_LEN10:%.*]] = add nsw i64 -1, [[TMP32]]
+// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
+// CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP33]], i64 9
+// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8
+// CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP34]], i64 [[LB_ADD_LEN10]]
+// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP28]], align 8
+// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP35]], align 8
+// CHECK1-NEXT: [[TMP36:%.*]] = ptrtoaddr ptr [[ARRAYIDX12]] to i64
+// CHECK1-NEXT: [[TMP37:%.*]] = ptrtoaddr ptr [[ARRAYIDX9]] to i64
+// CHECK1-NEXT: [[TMP38:%.*]] = sub i64 [[TMP36]], [[TMP37]]
+// CHECK1-NEXT: [[TMP39:%.*]] = add nuw i64 [[TMP38]], 1
+// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 2
+// CHECK1-NEXT: store i64 [[TMP39]], ptr [[TMP40]], align 8
+// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 3
+// CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP41]], align 8
+// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 4
+// CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8
+// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 5
+// CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP43]], align 8
+// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 6
+// CHECK1-NEXT: store i32 1, ptr [[TMP44]], align 8
+// CHECK1-NEXT: [[TMP45:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[TMP45]], align 4
+// CHECK1-NEXT: [[TMP47:%.*]] = call ptr @__kmpc_taskred_modifier_init(ptr @[[GLOB2]], i32 [[TMP46]], i32 1, i32 2, ptr [[DOTRD_INPUT_]])
+// CHECK1-NEXT: store ptr [[TMP47]], ptr [[DOTTASK_RED_]], align 8
+// CHECK1-NEXT: [[TMP48:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT: [[TMP49:%.*]] = load i32, ptr [[TMP48]], align 4
+// CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3:[0-9]+]], i32 [[TMP49]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
+// CHECK1-NEXT: [[TMP50:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
+// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP50]], 9
// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
// CHECK1: cond.true:
// CHECK1-NEXT: br label [[COND_END:%.*]]
// CHECK1: cond.false:
-// CHECK1-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
+// CHECK1-NEXT: [[TMP51:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
// CHECK1-NEXT: br label [[COND_END]]
// CHECK1: cond.end:
-// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP53]], [[COND_FALSE]] ]
+// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP51]], [[COND_FALSE]] ]
// CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8
-// CHECK1-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
-// CHECK1-NEXT: store i64 [[TMP54]], ptr [[DOTOMP_IV]], align 8
+// CHECK1-NEXT: [[TMP52:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
+// CHECK1-NEXT: store i64 [[TMP52]], ptr [[DOTOMP_IV]], align 8
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// CHECK1: omp.inner.for.cond:
-// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
-// CHECK1-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
-// CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP55]], [[TMP56]]
+// CHECK1-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
+// CHECK1-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
+// CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP53]], [[TMP54]]
// CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
// CHECK1: omp.inner.for.cond.cleanup:
// CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
// CHECK1: omp.inner.for.body:
-// CHECK1-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
-// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP57]], 1
+// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
+// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP55]], 1
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL]]
// CHECK1-NEXT: store i64 [[ADD]], ptr [[I]], align 8
-// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
-// CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[TMP58]], align 8
-// CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1
-// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP59]], align 8
-// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2
-// CHECK1-NEXT: [[TMP61:%.*]] = load ptr, ptr [[_TMP5]], align 8
-// CHECK1-NEXT: store ptr [[TMP61]], ptr [[TMP60]], align 8
-// CHECK1-NEXT: [[TMP62:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT: [[TMP63:%.*]] = load i32, ptr [[TMP62]], align 4
-// CHECK1-NEXT: [[TMP64:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB2]], i32 [[TMP63]], i32 1, i64 48, i64 24, ptr @.omp_task_entry.)
-// CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP64]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP65]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP67:%.*]] = load ptr, ptr [[TMP66]], align 8
-// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP67]], ptr align 8 [[AGG_CAPTURED]], i64 24, i1 false)
-// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP64]], i32 0, i32 1
-// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP68]], i32 0, i32 0
-// CHECK1-NEXT: [[TMP70:%.*]] = load ptr, ptr [[DOTTASK_RED_]], align 8
-// CHECK1-NEXT: store ptr [[TMP70]], ptr [[TMP69]], align 8
-// CHECK1-NEXT: [[TMP71:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT: [[TMP72:%.*]] = load i32, ptr [[TMP71]], align 4
-// CHECK1-NEXT: [[TMP73:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB2]], i32 [[TMP72]], ptr [[TMP64]])
+// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
+// CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[TMP56]], align 8
+// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1
+// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP57]], align 8
+// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2
+// CHECK1-NEXT: [[TMP59:%.*]] = load ptr, ptr [[_TMP5]], align 8
+// CHECK1-NEXT: store ptr [[TMP59]], ptr [[TMP58]], align 8
+// CHECK1-NEXT: [[TMP60:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT: [[TMP61:%.*]] = load i32, ptr [[TMP60]], align 4
+// CHECK1-NEXT: [[TMP62:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB2]], i32 [[TMP61]], i32 1, i64 48, i64 24, ptr @.omp_task_entry.)
+// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP62]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP63]], i32 0, i32 0
+// CHECK1-NEXT: [[TMP65:%.*]] = load ptr, ptr [[TMP64]], align 8
+// CHECK1-NEXT: call void @ll...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/222662
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