[clang] [llvm] [LLVMABI] Add support for SVE types in the LLVM ABI library (PR #221375)

Paul Walker via cfe-commits cfe-commits at lists.llvm.org
Thu Sep 10 05:11:09 PDT 2026


================
@@ -242,11 +267,27 @@ QualTypeMapper::convertBuiltinType(const BuiltinType *BT) {
   case BuiltinType::ObjCSel:
     return createPointerTypeForPointee(QT);
 
-    // Target-specific vector/matrix types — not yet implemented.
-#define SVE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
+    // AArch64 SVE data and predicate types, including the x2/x3/x4 tuples.
+#define SVE_VECTOR_TYPE(Name, MangledName, Id, SingletonId)                    \
+  case BuiltinType::Id:
+#define SVE_PREDICATE_TYPE(Name, MangledName, Id, SingletonId)                 \
+  case BuiltinType::Id:
 #include "clang/Basic/AArch64ACLETypes.def"
+    return convertSVEBuiltinType(BT);
+
+  case BuiltinType::SveCount:
+    return Builder.getSVECountType(getTypeAlign(QT));
+
+  // TODO: __mfp8 has no floating-point semantics of its own, so representing
+  // it needs a decision about how the ABI library should model opaque
+  // floating-point data. As an mfloat8 vector element it is treated as an
+  // 8-bit integer, but that is not right for the scalar type, which is passed
+  // in a floating-point register.
----------------
paulwalker-arm wrote:

Unfortunately LLVM's target type support (specifically the support to allow them in vectors) arrived after the initial AArch64 FP8 implementation, although I do have it on my TODO list to see if I can reimplement to use it.  For mfloat8 specifically though we don't model it as a stock `i8` but rather a `<1 x i8>` to signal vector registers should be used for function parameters and returns.

https://github.com/llvm/llvm-project/pull/221375


More information about the cfe-commits mailing list