[clang] b4b7775 - [CIR] Preserve volatile semantics for atomic operations (#220874)

[via cfe-commits]

Author: Steffen Larsen
Date: 2026-09-09T08:17:47+02:00
New Revision: b4b7775cfa79d7e3382657037eb037f8c7cb2428

URL: https://github.com/llvm/llvm-project/commit/b4b7775cfa79d7e3382657037eb037f8c7cb2428
DIFF: https://github.com/llvm/llvm-project/commit/b4b7775cfa79d7e3382657037eb037f8c7cb2428.diff

LOG: [CIR] Preserve volatile semantics for atomic operations (#220874)

This commit fixes the preservation of volatile semantics for atomic RMW
operations in CIR CodeGen.

Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>

Added: 
    

Modified: 
    clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    clang/test/CIR/CodeGen/atomic-scoped.c
    clang/test/CIR/CodeGen/atomic.c

Removed: 
    


################################################################################
diff  --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
index c8f83ac7dda52..5e0f9c8985685 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -1255,7 +1255,7 @@ mlir::LogicalResult CIRToLLVMAtomicXchgOpLowering::matchAndRewrite(
   llvm::StringRef llvmSyncScope = getLLVMSyncScope(adaptor.getSyncScope());
   rewriter.replaceOpWithNewOp<mlir::LLVM::AtomicRMWOp>(
       op, mlir::LLVM::AtomicBinOp::xchg, adaptor.getPtr(), adaptor.getVal(),
-      llvmOrder, llvmSyncScope);
+      llvmOrder, llvmSyncScope, /*alignment=*/0, op.getIsVolatile());
   return mlir::success();
 }
 
@@ -1453,7 +1453,7 @@ mlir::LogicalResult CIRToLLVMAtomicFetchOpLowering::matchAndRewrite(
       getLLVMAtomicBinOp(op.getBinop(), isInt, isSignedInt);
   auto rmwVal = mlir::LLVM::AtomicRMWOp::create(
       rewriter, op.getLoc(), llvmBinOp, adaptor.getPtr(), adaptor.getVal(),
-      llvmOrder, llvmSyncScope);
+      llvmOrder, llvmSyncScope, /*alignment=*/0, op.getIsVolatile());
 
   mlir::Value result = rmwVal.getResult();
   if (!op.getFetchFirst()) {

diff  --git a/clang/test/CIR/CodeGen/atomic-scoped.c b/clang/test/CIR/CodeGen/atomic-scoped.c
index 991f19bcbbd7c..aa7571d83cdc5 100644
--- a/clang/test/CIR/CodeGen/atomic-scoped.c
+++ b/clang/test/CIR/CodeGen/atomic-scoped.c
@@ -119,6 +119,19 @@ void scoped_atomic_exchange_n(int *ptr, int value) {
   // OGCG: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
 }
 
+void scoped_atomic_exchange_n_volatile(volatile int *ptr, int value) {
+  // CIR-BEFORE-TL-LABEL: @scoped_atomic_exchange_n_volatile
+  // CIR-LABEL: @scoped_atomic_exchange_n_volatile
+  // LLVM-LABEL: @scoped_atomic_exchange_n_volatile
+  // OGCG-LABEL: @scoped_atomic_exchange_n_volatile
+
+  __scoped_atomic_exchange_n(ptr, value, __ATOMIC_RELAXED, __MEMORY_SCOPE_SYSTEM);
+  // CIR-BEFORE-TL: cir.atomic.xchg relaxed syncscope(system) volatile %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+  // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(system) volatile %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+  // LLVM: %{{.+}} = atomicrmw volatile xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
+  // OGCG: %{{.+}} = atomicrmw volatile xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
+}
+
 void scoped_atomic_cmpxchg(int *ptr, int *expected, int *desired) {
   // CIR-BEFORE-TL-LABEL: @scoped_atomic_cmpxchg
   // CIR-LABEL: @scoped_atomic_cmpxchg

diff  --git a/clang/test/CIR/CodeGen/atomic.c b/clang/test/CIR/CodeGen/atomic.c
index 96a84eeac4929..21b99331fb417 100644
--- a/clang/test/CIR/CodeGen/atomic.c
+++ b/clang/test/CIR/CodeGen/atomic.c
@@ -929,6 +929,19 @@ void atomic_exchange_n(int *ptr, int value) {
   // OGCG: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} seq_cst, align 4
 }
 
+int atomic_exchange_n_volatile(volatile int *ptr, int value) {
+  // CIR-LABEL: @atomic_exchange_n_volatile
+  // LLVM-LABEL: @atomic_exchange_n_volatile
+  // OGCG-LABEL: @atomic_exchange_n_volatile
+
+  return __atomic_exchange_n(ptr, value, __ATOMIC_SEQ_CST);
+  // CIR: %{{.+}} = cir.atomic.xchg seq_cst syncscope(system) volatile %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+
+  // LLVM: %{{.+}} = atomicrmw volatile xchg ptr %{{.+}}, i32 %{{.+}} seq_cst, align 4
+
+  // OGCG: %{{.+}} = atomicrmw volatile xchg ptr %{{.+}}, i32 %{{.+}} seq_cst, align 4
+}
+
 void test_and_set(void *p) {
   // CIR-LABEL: @test_and_set
   // LLVM-LABEL: @test_and_set
@@ -1057,6 +1070,21 @@ int atomic_fetch_add(int *ptr, int value) {
   // OGCG-NEXT: store i32 %[[RES]], ptr %{{.+}}, align 4
 }
 
+int atomic_fetch_add_volatile(volatile int *ptr, int value) {
+  // CIR-LABEL: @atomic_fetch_add_volatile
+  // LLVM-LABEL: @atomic_fetch_add_volatile
+  // OGCG-LABEL: @atomic_fetch_add_volatile
+
+  return __atomic_fetch_add(ptr, value, __ATOMIC_SEQ_CST);
+  // CIR: %{{.+}} = cir.atomic.fetch add seq_cst syncscope(system) fetch_first %{{.+}}, %{{.+}} volatile : (!cir.ptr<!s32i>, !s32i) -> !s32i
+
+  // LLVM:      %[[RES:.+]] = atomicrmw volatile add ptr %{{.+}}, i32 %{{.+}} seq_cst, align 4
+  // LLVM-NEXT: store i32 %[[RES]], ptr %{{.+}}, align 4
+
+  // OGCG:      %[[RES:.+]] = atomicrmw volatile add ptr %{{.+}}, i32 %{{.+}} seq_cst, align 4
+  // OGCG-NEXT: store i32 %[[RES]], ptr %{{.+}}, align 4
+}
+
 int *atomic_fetch_add_ptr(int **ptr, __PTRDIFF_TYPE__ value) {
   // CIR-LABEL: @atomic_fetch_add_ptr
   // LLVM-LABEL: @atomic_fetch_add_ptr