[clang] [llvm] [RISCV][P-ext] Support Packed "Q-format" Multiply Parts Accumulate (PR #217918)

[via cfe-commits]

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@@ -12181,8 +12181,8 @@ static void processVCIXOperands(SDValue OrigOp,
 // LMUL * VLEN should be greater than or equal to EGS * SEW
 static inline bool isValidEGW(int EGS, EVT VT,
                               const RISCVSubtarget &Subtarget) {
-  return (Subtarget.getRealMinVLen() *
-             VT.getSizeInBits().getKnownMinValue()) / RISCV::RVVBitsPerBlock >=
+  return (Subtarget.getRealMinVLen() * VT.getSizeInBits().getKnownMinValue()) /
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TelGome wrote:

done

https://github.com/llvm/llvm-project/pull/217918