[clang] [llvm] [RISCV][P-ext] Support Packed "Q-format" Multiply Parts Accumulate (PR #217918)

[via cfe-commits]

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@@ -1966,6 +1966,43 @@ def SDT_RISCVPackedNarrowingClipW
 def riscv_pnclipp_w  : RVSDNode<"PNCLIPP_W", SDT_RISCVPackedNarrowingClipW>;
 def riscv_pnclipup_w : RVSDNode<"PNCLIPUP_W", SDT_RISCVPackedNarrowingClipW>;
 
+// Packed "Q-format" multiply parts accumulate.
+def SDT_RISCVQFormatAccS
+    : SDTypeProfile<1, 3, [SDTCisVT<0, XLenVT>, SDTCisVT<1, XLenVT>,
+                           SDTCisVT<2, v2i16>,
+                           SDTCisSameAs<2, 3>]>;
+def SDT_RISCVQFormatAccP
+    : SDTypeProfile<1, 3, [SDTCisVT<0, v2i32>, SDTCisVT<1, v2i32>,
+                           SDTCisVT<2, v4i16>, SDTCisSameAs<2, 3>]>;
+def SDT_RISCVQFormatAccW
+    : SDTypeProfile<1, 3, [SDTCisVT<0, XLenVT>, SDTCisVT<1, XLenVT>,
+                           SDTCisVT<2, v2i32>,
+                           SDTCisSameAs<2, 3>]>;
+
+def riscv_mqacc_h00  : RVSDNode<"MQACC_H00",  SDT_RISCVQFormatAccS>;
+def riscv_mqacc_h01  : RVSDNode<"MQACC_H01",  SDT_RISCVQFormatAccS>;
+def riscv_mqacc_h11  : RVSDNode<"MQACC_H11",  SDT_RISCVQFormatAccS>;
+def riscv_mqracc_h00 : RVSDNode<"MQRACC_H00", SDT_RISCVQFormatAccS>;
+def riscv_mqracc_h01 : RVSDNode<"MQRACC_H01", SDT_RISCVQFormatAccS>;
+def riscv_mqracc_h11 : RVSDNode<"MQRACC_H11", SDT_RISCVQFormatAccS>;
+
+def riscv_pmqacc_h00  : RVSDNode<"PMQACC_W_H00",  SDT_RISCVQFormatAccP>;
+def riscv_pmqacc_h01  : RVSDNode<"PMQACC_W_H01",  SDT_RISCVQFormatAccP>;
+def riscv_pmqacc_h11  : RVSDNode<"PMQACC_W_H11",  SDT_RISCVQFormatAccP>;
+def riscv_pmqracc_h00 : RVSDNode<"PMQRACC_W_H00", SDT_RISCVQFormatAccP>;
+def riscv_pmqracc_h01 : RVSDNode<"PMQRACC_W_H01", SDT_RISCVQFormatAccP>;
+def riscv_pmqracc_h11 : RVSDNode<"PMQRACC_W_H11", SDT_RISCVQFormatAccP>;
+
+def riscv_mqacc_w00  : RVSDNode<"MQACC_W00",  SDT_RISCVQFormatAccW>;
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TelGome wrote:

Done. Merged the two into a single MQACC_00/01/11 opcode using a new ValueTypeByHwMode.

https://github.com/llvm/llvm-project/pull/217918