[clang] [X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow SSE/AVX FP2INT conversion intrinsics to be used in constexpr (PR #214611)
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Thu Aug 6 19:47:27 PDT 2026
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<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Chirag Patel (ChiragPatel8)
<details>
<summary>Changes</summary>
Adds support for below builtins,
_mm_cvtss_si32
_mm_cvt_ss2si
_mm_cvtss_si64
_mm_cvtps_pi32
_mm_cvt_ps2pi
_mm_cvttss_si32
_mm_cvtt_ss2si
_mm_cvttss_si64
_mm_cvttps_pi32
_mm_cvtt_ps2pi
_mm_cvtps_pi16
_mm_cvtps_pi8
_mm_cvtpd_epi32
_mm_cvtsd_si32
_mm_cvttpd_epi32
_mm_cvttsd_si32
_mm_cvtpd_pi32
_mm_cvttpd_pi32
_mm_cvtsd_si64
_mm_cvttsd_si64
_mm_cvtps_epi32
_mm_cvttps_epi32
_mm256_cvtpd_epi32
_mm256_cvttpd_epi32
_mm256_cvtps_epi32
_mm256_cvttps_epi32
P.S. the current implementation only allows EXACT/INBOUNDS and FINITE conversions - any special case (DENORMAL/INF/NAN/etc.) or loss of precision aren't allowed in constexpr for now as per request in issue.
Fixes #<!-- -->169374
---
Patch is 30.74 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/214611.diff
11 Files Affected:
- (modified) clang/include/clang/Basic/BuiltinsX86.td (+5-2)
- (modified) clang/include/clang/Basic/BuiltinsX86_64.td (+2-2)
- (modified) clang/lib/AST/ByteCode/InterpBuiltin.cpp (+86)
- (modified) clang/lib/AST/ExprConstant.cpp (+106)
- (modified) clang/lib/Headers/avxintrin.h (+4-4)
- (modified) clang/lib/Headers/emmintrin.h (+19-10)
- (modified) clang/lib/Headers/xmmintrin.h (+12-12)
- (modified) clang/test/CodeGen/X86/avx-builtins.c (+4)
- (modified) clang/test/CodeGen/X86/mmx-builtins.c (+7)
- (modified) clang/test/CodeGen/X86/sse-builtins.c (+10)
- (modified) clang/test/CodeGen/X86/sse2-builtins.c (+8)
``````````diff
diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td
index 9b7abefb75049..04f93db3aa0b0 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -129,7 +129,7 @@ let Features = "sse", Header = "xmmintrin.h", Attributes = [NoThrow, RequireDecl
def _mm_getcsr : X86LibBuiltin<"unsigned int()">;
}
-let Features = "sse", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
+let Features = "sse", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def cvtss2si : X86Builtin<"int(_Vector<4, float>)">;
def cvttss2si : X86Builtin<"int(_Vector<4, float>)">;
}
@@ -179,7 +179,7 @@ let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr, RequiredVecto
def cvtsd2ss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<2, double>, _Vector<4, float>, unsigned char, _Constant int)">;
}
-let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
+let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def cvtpd2dq : X86Builtin<"_Vector<4, int>(_Vector<2, double>)">;
def cvttpd2dq : X86Builtin<"_Vector<4, int>(_Vector<2, double>)">;
def cvtsd2si : X86Builtin<"int(_Vector<2, double>)">;
@@ -475,6 +475,9 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in
def dpps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant char)">;
def cmppd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Constant char)">;
def cmpps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant char)">;
+}
+
+let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
def cvtps2dq256 : X86Builtin<"_Vector<8, int>(_Vector<8, float>)">;
def cvttpd2dq256 : X86Builtin<"_Vector<4, int>(_Vector<4, double>)">;
def cvtpd2dq256 : X86Builtin<"_Vector<4, int>(_Vector<4, double>)">;
diff --git a/clang/include/clang/Basic/BuiltinsX86_64.td b/clang/include/clang/Basic/BuiltinsX86_64.td
index 0a98b3049df34..cf76d9a257614 100644
--- a/clang/include/clang/Basic/BuiltinsX86_64.td
+++ b/clang/include/clang/Basic/BuiltinsX86_64.td
@@ -42,12 +42,12 @@ let Attributes = [NoThrow] in {
def writeeflags_u64 : X86Builtin<"void(unsigned long long int)">;
}
-let Features = "sse", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
+let Features = "sse", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def cvtss2si64 : X86Builtin<"long long int(_Vector<4, float>)">;
def cvttss2si64 : X86Builtin<"long long int(_Vector<4, float>)">;
}
-let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
+let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def cvtsd2si64 : X86Builtin<"long long int(_Vector<2, double>)">;
def cvttsd2si64 : X86Builtin<"long long int(_Vector<2, double>)">;
}
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 0e81059a0f6cf..c9ba00b48c443 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -4668,6 +4668,60 @@ static bool interp__builtin_ia32_bmac(InterpState &S, CodePtr OpPC,
return true;
}
+static bool
+interp_builtin_ia32_cvt_scalar_to_int(InterpState &S, CodePtr OpPC,
+ const CallExpr *E, unsigned BitWidth,
+ llvm::RoundingMode RoundingMode) {
+ Pointer SrcVecPtr = S.Stk.pop<Pointer>();
+ Pointer Lane0Ptr = SrcVecPtr.atIndex(0);
+ const Floating &FloatElem = Lane0Ptr.deref<Floating>();
+
+ llvm::APSInt IntResult(BitWidth, /*isUnsigned=*/false);
+ bool IsExact = false;
+ llvm::APFloat::opStatus Status = FloatElem.getAPFloat().convertToInteger(
+ IntResult, RoundingMode, &IsExact);
+
+ if (Status != llvm::APFloat::opOK || !IsExact)
+ return false;
+
+ pushInteger(S, IntResult, E->getType());
+ return true;
+}
+
+static bool interp_builtin_ia32_cvt_vector_to_int(
+ InterpState &S, CodePtr OpPC, const CallExpr *E,
+ llvm::RoundingMode RoundingMode, bool zeroPad = false) {
+ Pointer SrcVecPtr = S.Stk.pop<Pointer>();
+ const Pointer &Dst = S.Stk.peek<Pointer>();
+ PrimType DstElemT = Dst.getFieldDesc()->getPrimType();
+
+ unsigned NumSrcElts = SrcVecPtr.getNumElems();
+ llvm::SmallVector<int32_t, 8> ConvertedElts;
+ for (unsigned I = 0; I < NumSrcElts; ++I) {
+ const Floating &FloatElem = SrcVecPtr.atIndex(I).deref<Floating>();
+ llvm::APSInt IntResult(32, /*isUnsigned=*/false);
+ bool IsExact = false;
+
+ llvm::APFloat::opStatus Status = FloatElem.getAPFloat().convertToInteger(
+ IntResult, RoundingMode, &IsExact);
+ if (Status != llvm::APFloat::opOK || !IsExact)
+ return false;
+
+ ConvertedElts.push_back(IntResult.getSExtValue());
+ }
+
+ for (unsigned I = 0; I < NumSrcElts; ++I)
+ Dst.atIndex(I).deref<Integral<32, true>>() =
+ Integral<32, true>::from(ConvertedElts[I]);
+
+ if (zeroPad) {
+ Dst.atIndex(2).deref<Integral<32, true>>() = Integral<32, true>::zero();
+ Dst.atIndex(3).deref<Integral<32, true>>() = Integral<32, true>::zero();
+ }
+ Dst.initializeAllElements();
+ return true;
+}
+
bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
uint32_t BuiltinID) {
const ASTContext &ASTCtx = S.getASTContext();
@@ -6774,6 +6828,38 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
case X86::BI__builtin_ia32_vpdpbusds256:
case X86::BI__builtin_ia32_vpdpbusds512:
return interp__builtin_ia32_vpdp(S, OpPC, Call, true);
+ case X86::BI__builtin_ia32_cvtss2si:
+ case X86::BI__builtin_ia32_cvtsd2si:
+ return interp_builtin_ia32_cvt_scalar_to_int(
+ S, OpPC, Call, 32, llvm::RoundingMode::NearestTiesToEven);
+ case X86::BI__builtin_ia32_cvtss2si64:
+ case X86::BI__builtin_ia32_cvtsd2si64:
+ return interp_builtin_ia32_cvt_scalar_to_int(
+ S, OpPC, Call, 64, llvm::RoundingMode::NearestTiesToEven);
+ case X86::BI__builtin_ia32_cvttss2si:
+ case X86::BI__builtin_ia32_cvttsd2si:
+ return interp_builtin_ia32_cvt_scalar_to_int(
+ S, OpPC, Call, 32, llvm::RoundingMode::TowardZero);
+ case X86::BI__builtin_ia32_cvttss2si64:
+ case X86::BI__builtin_ia32_cvttsd2si64:
+ return interp_builtin_ia32_cvt_scalar_to_int(
+ S, OpPC, Call, 64, llvm::RoundingMode::TowardZero);
+ case X86::BI__builtin_ia32_cvtpd2dq:
+ return interp_builtin_ia32_cvt_vector_to_int(
+ S, OpPC, Call, llvm::RoundingMode::NearestTiesToEven, true);
+ case X86::BI__builtin_ia32_cvtps2dq:
+ case X86::BI__builtin_ia32_cvtpd2dq256:
+ case X86::BI__builtin_ia32_cvtps2dq256:
+ return interp_builtin_ia32_cvt_vector_to_int(
+ S, OpPC, Call, llvm::RoundingMode::NearestTiesToEven);
+ case X86::BI__builtin_ia32_cvttpd2dq:
+ return interp_builtin_ia32_cvt_vector_to_int(
+ S, OpPC, Call, llvm::RoundingMode::TowardZero, true);
+ case X86::BI__builtin_ia32_cvttps2dq:
+ case X86::BI__builtin_ia32_cvttpd2dq256:
+ case X86::BI__builtin_ia32_cvttps2dq256:
+ return interp_builtin_ia32_cvt_vector_to_int(
+ S, OpPC, Call, llvm::RoundingMode::TowardZero);
default:
S.FFDiag(S.Current->getLocation(OpPC),
diag::note_invalid_subexpr_in_const_expr)
diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index 9d69de2a7c6fd..3062a9b3b686d 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -15259,6 +15259,56 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
case X86::BI__builtin_ia32_vpdpbusds256:
case X86::BI__builtin_ia32_vpdpbusds512:
return EvalVectorDotProduct(true);
+ case X86::BI__builtin_ia32_cvtpd2dq:
+ case X86::BI__builtin_ia32_cvtps2dq:
+ case X86::BI__builtin_ia32_cvttpd2dq:
+ case X86::BI__builtin_ia32_cvttps2dq:
+ case X86::BI__builtin_ia32_cvtpd2dq256:
+ case X86::BI__builtin_ia32_cvtps2dq256:
+ case X86::BI__builtin_ia32_cvttpd2dq256:
+ case X86::BI__builtin_ia32_cvttps2dq256: {
+ APValue SrcVec;
+ if (!EvaluateAsRValue(Info, E->getArg(0), SrcVec) || !SrcVec.isVector())
+ return false;
+
+ llvm::RoundingMode RoundingMode;
+ switch (BuiltinOp) {
+ case X86::BI__builtin_ia32_cvttpd2dq:
+ case X86::BI__builtin_ia32_cvttps2dq:
+ case X86::BI__builtin_ia32_cvttpd2dq256:
+ case X86::BI__builtin_ia32_cvttps2dq256:
+ RoundingMode = llvm::RoundingMode::TowardZero;
+ break;
+ default:
+ RoundingMode = llvm::RoundingMode::NearestTiesToEven;
+ break;
+ }
+
+ unsigned NumSrcElts = SrcVec.getVectorLength();
+ SmallVector<APValue, 8> ResultElts;
+
+ for (unsigned i = 0; i < NumSrcElts; ++i) {
+ llvm::APFloat FloatElem = SrcVec.getVectorElt(i).getFloat();
+ llvm::APSInt IntResult(32, /*isUnsigned=*/false);
+ bool IsExact = false;
+
+ llvm::APFloat::opStatus Status =
+ FloatElem.convertToInteger(IntResult, RoundingMode, &IsExact);
+
+ if (Status != llvm::APFloat::opOK || !IsExact)
+ return false;
+
+ ResultElts.push_back(APValue(IntResult));
+ }
+
+ if (BuiltinOp == X86::BI__builtin_ia32_cvtpd2dq ||
+ BuiltinOp == X86::BI__builtin_ia32_cvttpd2dq) {
+ llvm::APSInt ZeroInt(32, /*isUnsigned=*/false);
+ ResultElts.push_back(APValue(ZeroInt));
+ ResultElts.push_back(APValue(ZeroInt));
+ }
+ return Success(ResultElts, E);
+ }
}
}
@@ -18683,6 +18733,62 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E,
return Success(APValue(RetMask), E);
}
+ case X86::BI__builtin_ia32_cvtss2si:
+ case X86::BI__builtin_ia32_cvtsd2si:
+ case X86::BI__builtin_ia32_cvttss2si:
+ case X86::BI__builtin_ia32_cvttsd2si:
+ case X86::BI__builtin_ia32_cvtss2si64:
+ case X86::BI__builtin_ia32_cvtsd2si64:
+ case X86::BI__builtin_ia32_cvttss2si64:
+ case X86::BI__builtin_ia32_cvttsd2si64: {
+ APValue ArgVal;
+ if (!EvaluateAsRValue(Info, E->getArg(0), ArgVal))
+ return false;
+
+ llvm::APFloat FloatElem(0.0f);
+ if (ArgVal.isVector()) {
+ FloatElem = ArgVal.getVectorElt(0).getFloat();
+ } else if (ArgVal.isFloat()) {
+ FloatElem = ArgVal.getFloat();
+ } else {
+ return false;
+ }
+
+ unsigned BitWidth = 32;
+ switch (BuiltinOp) {
+ case X86::BI__builtin_ia32_cvtss2si64:
+ case X86::BI__builtin_ia32_cvtsd2si64:
+ case X86::BI__builtin_ia32_cvttss2si64:
+ case X86::BI__builtin_ia32_cvttsd2si64:
+ BitWidth = 64;
+ break;
+ default:
+ BitWidth = 32;
+ break;
+ }
+
+ llvm::RoundingMode RoundingMode;
+ switch (BuiltinOp) {
+ case X86::BI__builtin_ia32_cvttss2si:
+ case X86::BI__builtin_ia32_cvttsd2si:
+ case X86::BI__builtin_ia32_cvttss2si64:
+ case X86::BI__builtin_ia32_cvttsd2si64:
+ RoundingMode = llvm::RoundingMode::TowardZero;
+ break;
+ default:
+ RoundingMode = llvm::RoundingMode::NearestTiesToEven;
+ break;
+ }
+
+ llvm::APSInt IntResult(BitWidth, false);
+ bool IsExact = false;
+ llvm::APFloat::opStatus Status =
+ FloatElem.convertToInteger(IntResult, RoundingMode, &IsExact);
+ if (Status != llvm::APFloat::opOK || !IsExact)
+ return false;
+
+ return Success(IntResult, E);
+ }
case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
case X86::BI__builtin_ia32_vpshufbitqmb512_mask: {
diff --git a/clang/lib/Headers/avxintrin.h b/clang/lib/Headers/avxintrin.h
index fbd20e58329a3..18b8c6c76a7ce 100644
--- a/clang/lib/Headers/avxintrin.h
+++ b/clang/lib/Headers/avxintrin.h
@@ -2200,7 +2200,7 @@ _mm256_cvtpd_ps(__m256d __a) {
/// \param __a
/// A 256-bit vector of [8 x float].
/// \returns A 256-bit integer vector containing the converted values.
-static __inline __m256i __DEFAULT_FN_ATTRS
+static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_cvtps_epi32(__m256 __a)
{
return (__m256i)__builtin_ia32_cvtps2dq256((__v8sf) __a);
@@ -2236,7 +2236,7 @@ _mm256_cvtps_pd(__m128 __a) {
/// \param __a
/// A 256-bit vector of [4 x double].
/// \returns A 128-bit integer vector containing the converted values.
-static __inline __m128i __DEFAULT_FN_ATTRS
+static __inline __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_cvttpd_epi32(__m256d __a)
{
return (__m128i)__builtin_ia32_cvttpd2dq256((__v4df) __a);
@@ -2256,7 +2256,7 @@ _mm256_cvttpd_epi32(__m256d __a)
/// \param __a
/// A 256-bit vector of [4 x double].
/// \returns A 128-bit integer vector containing the converted values.
-static __inline __m128i __DEFAULT_FN_ATTRS
+static __inline __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_cvtpd_epi32(__m256d __a)
{
return (__m128i)__builtin_ia32_cvtpd2dq256((__v4df) __a);
@@ -2276,7 +2276,7 @@ _mm256_cvtpd_epi32(__m256d __a)
/// \param __a
/// A 256-bit vector of [8 x float].
/// \returns A 256-bit integer vector containing the converted values.
-static __inline __m256i __DEFAULT_FN_ATTRS
+static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
_mm256_cvttps_epi32(__m256 __a)
{
return (__m256i)__builtin_ia32_cvttps2dq256((__v8sf) __a);
diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h
index 3f039edf87e81..eef7077f81e29 100644
--- a/clang/lib/Headers/emmintrin.h
+++ b/clang/lib/Headers/emmintrin.h
@@ -1342,7 +1342,8 @@ _mm_cvtepi32_pd(__m128i __a) {
/// A 128-bit vector of [2 x double].
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
/// converted values. The upper 64 bits are set to zero.
-static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvtpd_epi32(__m128d __a) {
return (__m128i)__builtin_ia32_cvtpd2dq((__v2df)__a);
}
@@ -1361,7 +1362,7 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
/// conversion.
/// \returns A 32-bit signed integer containing the converted value.
-static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {
+static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtsd_si32(__m128d __a) {
return __builtin_ia32_cvtsd2si((__v2df)__a);
}
@@ -1455,7 +1456,8 @@ _mm_cvtss_sd(__m128d __a, __m128 __b) {
/// A 128-bit vector of [2 x double].
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
/// converted values. The upper 64 bits are set to zero.
-static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvttpd_epi32(__m128d __a) {
return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
}
@@ -1475,7 +1477,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
/// conversion.
/// \returns A 32-bit signed integer containing the converted value.
-static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {
+static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvttsd_si32(__m128d __a) {
return __builtin_ia32_cvttsd2si((__v2df)__a);
}
@@ -1494,7 +1497,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {
/// \param __a
/// A 128-bit vector of [2 x double].
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
-static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_cvtpd_pi32(__m128d __a) {
+static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvtpd_pi32(__m128d __a) {
return __trunc64(__builtin_ia32_cvtpd2dq((__v2df)__a));
}
@@ -1513,7 +1517,8 @@ static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_cvtpd_pi32(__m128d __a) {
/// \param __a
/// A 128-bit vector of [2 x double].
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
-static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_cvttpd_pi32(__m128d __a) {
+static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvttpd_pi32(__m128d __a) {
return __trunc64(__builtin_ia32_cvttpd2dq((__v2df)__a));
}
@@ -3287,7 +3292,8 @@ _mm_cvtsi64_sd(__m128d __a, long long __b) {
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
/// conversion.
/// \returns A 64-bit signed integer containing the converted value.
-static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {
+static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvtsd_si64(__m128d __a) {
return __builtin_ia32_cvtsd2si64((__v2df)__a);
}
@@ -3307,7 +3313,8 @@ static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
/// conversion.
/// \returns A 64-bit signed integer containing the converted value.
-static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) {
+static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvttsd_si64(__m128d __a) {
return __builtin_ia32_cvttsd2si64((__v2df)__a);
}
#endif
@@ -3340,7 +3347,8 @@ _mm_cvtepi32_ps(__m128i __a) {
/// A 128-bit vector of [4 x float].
/// \returns A 128-bit integer vector of [4 x i32] containing the converted
/// values.
-static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvtps_epi32(__m128 __a) {
return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
}
@@ -3359,7 +3367,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {
/// \param __a
/// A 128-bit vector of [4 x float].
/// \returns A 128-bit vector of [4 x i32] containing the converted values.
-static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm_cvttps_epi32(__m128 __a) {
return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
}
diff --git a/clang/lib/Headers/xmmintrin.h b/clang/lib/Headers/xmmintrin.h
index 73eab9e460ca5..3c7116a23d237 100644
--- a/clang/lib/Headers/xmmintrin.h
+++ b/clang/lib/Headers/xmmintrin.h
@@ -1382,7 +1382,7 @@ _mm_ucomineq_ss(__m128 __a, __m128 __b)
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
/// used in the conversion.
/// \returns A 32-bit integer containing the converted value.
-static __inline__ int __DEFAULT_FN_ATTRS
+static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
_mm_cvtss_si32(__m128 __a)
{
return __builtin_ia32_cvtss2si((__v4sf)__a);
@@ -1404,7 +1404,7 @@ _mm_cvtss_si32(__m128 __a)
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
/// used in the conversion.
/// \returns A 32-bit integer containing the converted value.
-static __inline__ int __DEFAULT_FN_ATTRS
+static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
_mm_cvt_ss2si(__m128 __a)
{
return _mm_cvtss_si32(__a);
@@ -1428,7 +1428,7 @@ _mm_cvt_ss2si(__m128 __a)
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
/// used in the conversion.
/// \returns A 64-bit integer containing the converted value.
-static __inline__ long long __DEFAULT_FN_ATTRS
+static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR
_mm_cvtss_si64(__m128 __a)
{
return __builtin_ia32_cvtss2si64((__v4sf)__a);
@@ -1450,7 +1450,7 @@ _mm_cvtss_si64(__m128 __a)
/// \param __a
/// A 128-bit vector of [4 x float].
/// \returns A 64-bit integer vector containing the converted values.
-static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
+static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
_mm_cvtps_pi32(__m128 __a)
{
return __trunc64(__builtin_ia32_cvtps2dq((__v4sf)__zeroupper64(__a)));
@@ -1470,7 +1470,7 @@ _mm_cvtps_pi32(__m128 __a)
/// \param __a
/// A 128-bit vector of [4 x float].
/// \returns A 64-bit integer vector containing the converted values.
-static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
+static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
_mm_cvt_ps2pi(__m128 __a)
{
return _mm_cvtps_pi32(__a);
@@ -1492,7 +1492,7 @@ _mm_cvt_ps2pi(__m128 __a)
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
/// used in the conversion.
/// \returns A 32-bit integer con...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/214611
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