[clang] [libclc] [libclc] Enable 64-bit atomics for nvptx64 (PR #213691)
Zheming Jin via cfe-commits
cfe-commits at lists.llvm.org
Tue Aug 4 06:25:34 PDT 2026
https://github.com/zjin-lcf updated https://github.com/llvm/llvm-project/pull/213691
>From 67c4e670046237b93eca42861948f0756d66431c Mon Sep 17 00:00:00 2001
From: Zheming Jin <jinz at ornl.gov>
Date: Mon, 3 Aug 2026 09:47:48 -0500
Subject: [PATCH 1/4] [libclc] Enable 64-bit atomics for nvptx64
The `__CLC_HAS_ATOMIC` guards in `clc_atomic_def.inc` and
`clc_atomic_compare_exchange.inc` restrict atomics to 32-bit types for
`__NVPTX__`. That exclusion was added to silence the "large atomic operation
may incur significant performance penalty" warning on 32-bit targets, but
`__NVPTX__` is defined for both nvptx and nvptx64.
NVPTX sets `MaxAtomicInlineWidth` to the target pointer width, so nvptx64
lowers 64-bit atomics natively and never emits that warning; only the 32-bit
nvptx target did. libclc no longer builds a 32-bit nvptx target
(`LIBCLC_ARCHS_NVPTX` is just `nvptx64`), so the exclusion now only prevents
nvptx64 from getting the 64-bit atomics that `atomic_decl.inc` declares
unconditionally, leaving them declared but never defined.
Restrict the 32-bit-only guard to `__SPIR32__`, so nvptx64 defines the 64-bit
atomics.
---
.../clc/lib/generic/atomic/clc_atomic_compare_exchange.inc | 6 +++---
libclc/clc/lib/generic/atomic/clc_atomic_def.inc | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc b/libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
index d28e3c72e465e..3d37ba52d370d 100644
--- a/libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
+++ b/libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
@@ -8,16 +8,16 @@
#ifdef __CLC_SCALAR
-#if defined(__SPIR32__) || defined(__NVPTX__)
+#ifdef __SPIR32__
#if (defined(__CLC_FPSIZE) && __CLC_FPSIZE <= 32) || \
(defined(__CLC_GENSIZE) && (__CLC_GENSIZE == 32))
#define __CLC_HAS_ATOMIC
#endif
-#else // defined(__SPIR32__) || defined(__NVPTX__)
+#else // __SPIR32__
#if defined(__CLC_FPSIZE) || (__CLC_GENSIZE >= 32)
#define __CLC_HAS_ATOMIC
#endif
-#endif // defined(__SPIR32__) || defined(__NVPTX__)
+#endif // __SPIR32__
#ifdef __CLC_HAS_ATOMIC
diff --git a/libclc/clc/lib/generic/atomic/clc_atomic_def.inc b/libclc/clc/lib/generic/atomic/clc_atomic_def.inc
index 2af450ffbbe5c..bf40ff626fc81 100644
--- a/libclc/clc/lib/generic/atomic/clc_atomic_def.inc
+++ b/libclc/clc/lib/generic/atomic/clc_atomic_def.inc
@@ -8,16 +8,16 @@
#ifdef __CLC_SCALAR
-#if defined(__SPIR32__) || defined(__NVPTX__)
+#ifdef __SPIR32__
#if (defined(__CLC_FPSIZE) && __CLC_FPSIZE <= 32) || \
(defined(__CLC_GENSIZE) && (__CLC_GENSIZE == 32))
#define __CLC_HAS_ATOMIC
#endif
-#else // defined(__SPIR32__) || defined(__NVPTX__)
+#else // __SPIR32__
#if defined(__CLC_FPSIZE) || (__CLC_GENSIZE >= 32)
#define __CLC_HAS_ATOMIC
#endif
-#endif // defined(__SPIR32__) || defined(__NVPTX__)
+#endif // __SPIR32__
#ifdef __CLC_HAS_ATOMIC
>From cb876a72f383977c5b3ba4ab48d6ef43014f47a9 Mon Sep 17 00:00:00 2001
From: Zheming Jin <jinz at ornl.gov>
Date: Mon, 3 Aug 2026 22:45:59 -0400
Subject: [PATCH 2/4] [clang][NVPTX] Enable 64-bit atomic OpenCL extensions for
nvptx64
libclc defines the 64-bit atomic builtins for nvptx64, but the NVPTX
target did not advertise cl_khr_int64_base_atomics /
cl_khr_int64_extended_atomics, so those builtins were never exposed.
PTX supports 64-bit atomics natively on 64-bit targets, where
NVPTXTargetInfo sets MaxAtomicInlineWidth to the target pointer width.
Guard the extensions on getMaxAtomicInlineWidth() >= 64 so the 32-bit
nvptx target is unaffected and keeps avoiding emulated 64-bit atomics.
---
clang/lib/Basic/Targets/NVPTX.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/clang/lib/Basic/Targets/NVPTX.h b/clang/lib/Basic/Targets/NVPTX.h
index 996b1a9730606..83243ae65374d 100644
--- a/clang/lib/Basic/Targets/NVPTX.h
+++ b/clang/lib/Basic/Targets/NVPTX.h
@@ -159,6 +159,13 @@ class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
Opts["cl_khr_global_int32_extended_atomics"] = true;
Opts["cl_khr_local_int32_base_atomics"] = true;
Opts["cl_khr_local_int32_extended_atomics"] = true;
+ // PTX supports 64-bit atomics natively on 64-bit targets even though the
+ // NVIDIA OpenCL runtime does not report these extensions. libclc needs
+ // them enabled to define the 64-bit atomic builtins.
+ if (getMaxAtomicInlineWidth() >= 64) {
+ Opts["cl_khr_int64_base_atomics"] = true;
+ Opts["cl_khr_int64_extended_atomics"] = true;
+ }
Opts["__opencl_c_images"] = true;
Opts["__opencl_c_3d_image_writes"] = true;
>From f7c117af8428c42bc1649860779e63bfcc843826 Mon Sep 17 00:00:00 2001
From: Zheming Jin <jinz at ornl.gov>
Date: Mon, 3 Aug 2026 23:05:09 -0400
Subject: [PATCH 3/4] [clang][NVPTX] Address review: use MaxAtomicInlineWidth
directly
Use the protected MaxAtomicInlineWidth member instead of the
getMaxAtomicInlineWidth() accessor, and drop the outdated claim that the
NVIDIA OpenCL runtime does not report the 64-bit atomic extensions; it
does report them on current drivers.
---
clang/lib/Basic/Targets/NVPTX.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/clang/lib/Basic/Targets/NVPTX.h b/clang/lib/Basic/Targets/NVPTX.h
index 83243ae65374d..9f2884b4b526b 100644
--- a/clang/lib/Basic/Targets/NVPTX.h
+++ b/clang/lib/Basic/Targets/NVPTX.h
@@ -159,10 +159,10 @@ class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
Opts["cl_khr_global_int32_extended_atomics"] = true;
Opts["cl_khr_local_int32_base_atomics"] = true;
Opts["cl_khr_local_int32_extended_atomics"] = true;
- // PTX supports 64-bit atomics natively on 64-bit targets even though the
- // NVIDIA OpenCL runtime does not report these extensions. libclc needs
- // them enabled to define the 64-bit atomic builtins.
- if (getMaxAtomicInlineWidth() >= 64) {
+ // 64-bit atomics are supported natively on 64-bit targets, where
+ // MaxAtomicInlineWidth is the target pointer width. libclc needs these
+ // extensions enabled to define the 64-bit atomic builtins.
+ if (MaxAtomicInlineWidth >= 64) {
Opts["cl_khr_int64_base_atomics"] = true;
Opts["cl_khr_int64_extended_atomics"] = true;
}
>From 3ab370aaa49ddd4299746289ae07277d0a30f746 Mon Sep 17 00:00:00 2001
From: Zheming Jin <jinz at ornl.gov>
Date: Tue, 4 Aug 2026 08:25:23 -0500
Subject: [PATCH 4/4] [clang][NVPTX] Address review: drop redundant comment
---
clang/lib/Basic/Targets/NVPTX.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/clang/lib/Basic/Targets/NVPTX.h b/clang/lib/Basic/Targets/NVPTX.h
index 9f2884b4b526b..2323e8957b277 100644
--- a/clang/lib/Basic/Targets/NVPTX.h
+++ b/clang/lib/Basic/Targets/NVPTX.h
@@ -159,9 +159,6 @@ class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
Opts["cl_khr_global_int32_extended_atomics"] = true;
Opts["cl_khr_local_int32_base_atomics"] = true;
Opts["cl_khr_local_int32_extended_atomics"] = true;
- // 64-bit atomics are supported natively on 64-bit targets, where
- // MaxAtomicInlineWidth is the target pointer width. libclc needs these
- // extensions enabled to define the 64-bit atomic builtins.
if (MaxAtomicInlineWidth >= 64) {
Opts["cl_khr_int64_base_atomics"] = true;
Opts["cl_khr_int64_extended_atomics"] = true;
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