[clang] Cir pmovdb512 mask (PR #213571)
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Sun Aug 2 14:50:26 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-clangir
Author: DannyDaoBoYang
<details>
<summary>Changes</summary>
Issue #<!-- -->167765
Add CIR handling for pmovdb512_mask, pmovdw512_mask, pmovqw512_mask.
---
Full diff: https://github.com/llvm/llvm-project/pull/213571.diff
2 Files Affected:
- (modified) clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp (+3)
- (modified) clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c (+161-1)
``````````diff
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index 9c98f4bc55daa..e4d838eacccb2 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -1871,7 +1871,10 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) {
return builder.createVecShuffle(getLoc(expr->getExprLoc()), ops[0], op1,
mask);
}
+ case X86::BI__builtin_ia32_pmovdb512_mask:
+ case X86::BI__builtin_ia32_pmovdw512_mask:
case X86::BI__builtin_ia32_pmovqd512_mask:
+ case X86::BI__builtin_ia32_pmovqw512_mask:
case X86::BI__builtin_ia32_pmovwb512_mask: {
mlir::Value Res =
builder.createIntCast(ops[0], cast<cir::VectorType>(ops[1].getType()));
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c b/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
index 819b0d3b2e17e..875355fa9c049 100644
--- a/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
+++ b/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
@@ -1049,7 +1049,7 @@ int test_mm512_kortestz(__mmask16 __A, __mmask16 __B) {
}
__m256i test_mm512_cvtepi64_epi32(__m512i __A) {
- // CIR-LABEL: test_mm512_cvtepi64_epi32
+ // CIR-LABEL: _mm512_cvtepi64_epi32
// CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} : !cir.vector<8 x !s64i> -> !cir.vector<8 x !s32i>
// CIR: %[[RETBC:.*]] = cir.cast bitcast {{.*}} : !cir.vector<8 x !s32i> -> !cir.vector<4 x !s64i>
// CIR: cir.store %[[RETBC]], %[[RETPTR:.*]] : !cir.vector<4 x !s64i>, !cir.ptr<!cir.vector<4 x !s64i>>
@@ -1066,6 +1066,166 @@ __m256i test_mm512_cvtepi64_epi32(__m512i __A) {
return _mm512_cvtepi64_epi32(__A);
}
+__m128i test_mm512_cvtepi32_epi8(__m512i a) {
+ // CIR-LABEL: _mm512_cvtepi32_epi8
+ // CIR: cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<16 x !s32i> -> !cir.vector<16 x !s8i>
+ //
+ // LLVM-LABEL: test_mm512_cvtepi32_epi8
+ // LLVM: trunc <16 x i32> %{{.*}} to <16 x i8>
+ //
+ // OGCG-LABEL: test_mm512_cvtepi32_epi8
+ // OGCG: trunc <16 x i32> %{{.*}} to <16 x i8>
+ return _mm512_cvtepi32_epi8(a);
+}
+
+__m128i test_mm512_mask_cvtepi32_epi8(__m128i src, __mmask16 k,
+ __m512i a) {
+ // CIR-LABEL: _mm512_mask_cvtepi32_epi8
+ // CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<16 x !s32i> -> !cir.vector<16 x !s8i>
+ // CIR: %[[MASK:.*]] = cir.cast bitcast {{.*}} :
+ // CIR-SAME: !u16i -> !cir.vector<16 x !cir.int<s, 1>>
+ // CIR: cir.vec.ternary(%[[MASK]], %[[TRUNC]], {{.*}}) :
+ // CIR-SAME: !cir.vector<16 x !cir.int<s, 1>>,
+ // CIR-SAME: !cir.vector<16 x !s8i>
+ //
+ // LLVM-LABEL: test_mm512_mask_cvtepi32_epi8
+ // LLVM: %[[TRUNC:.*]] = trunc <16 x i32> %{{.*}} to <16 x i8>
+ // LLVM: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // LLVM: select <16 x i1> %[[MASK]], <16 x i8> %[[TRUNC]],
+ //
+ // OGCG-LABEL: test_mm512_mask_cvtepi32_epi8
+ // OGCG: call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512
+ return _mm512_mask_cvtepi32_epi8(src, k, a);
+}
+
+__m128i test_mm512_maskz_cvtepi32_epi8(__mmask16 k, __m512i a) {
+ // CIR-LABEL: _mm512_maskz_cvtepi32_epi8
+ // CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<16 x !s32i> -> !cir.vector<16 x !s8i>
+ // CIR: %[[MASK:.*]] = cir.cast bitcast {{.*}} :
+ // CIR-SAME: !u16i -> !cir.vector<16 x !cir.int<s, 1>>
+ // CIR: cir.vec.ternary(%[[MASK]], %[[TRUNC]], {{.*}}) :
+ // CIR-SAME: !cir.vector<16 x !cir.int<s, 1>>,
+ // CIR-SAME: !cir.vector<16 x !s8i>
+ //
+ // LLVM-LABEL: test_mm512_maskz_cvtepi32_epi8
+ // LLVM: %[[TRUNC:.*]] = trunc <16 x i32> %{{.*}} to <16 x i8>
+ // LLVM: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // LLVM: select <16 x i1> %[[MASK]], <16 x i8> %[[TRUNC]],
+ //
+ // OGCG-LABEL: test_mm512_maskz_cvtepi32_epi8
+ // OGCG: call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512
+ return _mm512_maskz_cvtepi32_epi8(k, a);
+}
+
+__m256i test_mm512_cvtepi32_epi16(__m512i a) {
+ // CIR-LABEL: _mm512_cvtepi32_epi16
+ // CIR: cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<16 x !s32i> -> !cir.vector<16 x !s16i>
+ //
+ // LLVM-LABEL: test_mm512_cvtepi32_epi16
+ // LLVM: trunc <16 x i32> %{{.*}} to <16 x i16>
+ //
+ // OGCG-LABEL: test_mm512_cvtepi32_epi16
+ // OGCG: trunc <16 x i32> %{{.*}} to <16 x i16>
+ return _mm512_cvtepi32_epi16(a);
+}
+
+__m256i test_mm512_mask_cvtepi32_epi16(__m256i src, __mmask16 k, __m512i a) {
+ // CIR-LABEL: _mm512_mask_cvtepi32_epi16
+ // CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<16 x !s32i> -> !cir.vector<16 x !s16i>
+ // CIR: %[[MASK:.*]] = cir.cast bitcast {{.*}} :
+ // CIR-SAME: !u16i -> !cir.vector<16 x !cir.int<s, 1>>
+ // CIR: cir.vec.ternary(%[[MASK]], %[[TRUNC]], {{.*}}) :
+ // CIR-SAME: !cir.vector<16 x !cir.int<s, 1>>,
+ // CIR-SAME: !cir.vector<16 x !s16i>
+ //
+ // LLVM-LABEL: test_mm512_mask_cvtepi32_epi16
+ // LLVM: %[[TRUNC:.*]] = trunc <16 x i32> %{{.*}} to <16 x i16>
+ // LLVM: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // LLVM: select <16 x i1> %[[MASK]], <16 x i16> %[[TRUNC]],
+ //
+ // OGCG-LABEL: test_mm512_mask_cvtepi32_epi16
+ // OGCG: call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512
+ return _mm512_mask_cvtepi32_epi16(src, k, a);
+}
+
+__m256i test_mm512_maskz_cvtepi32_epi16(__mmask16 k, __m512i a) {
+ // CIR-LABEL: _mm512_maskz_cvtepi32_epi16
+ // CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<16 x !s32i> -> !cir.vector<16 x !s16i>
+ // CIR: %[[MASK:.*]] = cir.cast bitcast {{.*}} :
+ // CIR-SAME: !u16i -> !cir.vector<16 x !cir.int<s, 1>>
+ // CIR: cir.vec.ternary(%[[MASK]], %[[TRUNC]], {{.*}}) :
+ // CIR-SAME: !cir.vector<16 x !cir.int<s, 1>>,
+ // CIR-SAME: !cir.vector<16 x !s16i>
+ //
+ // LLVM-LABEL: test_mm512_maskz_cvtepi32_epi16
+ // LLVM: %[[TRUNC:.*]] = trunc <16 x i32> %{{.*}} to <16 x i16>
+ // LLVM: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // LLVM: select <16 x i1> %[[MASK]], <16 x i16> %[[TRUNC]],
+ //
+ // OGCG-LABEL: test_mm512_maskz_cvtepi32_epi16
+ // OGCG: call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512
+ return _mm512_maskz_cvtepi32_epi16(k, a);
+}
+
+__m128i test_mm512_cvtepi64_epi16(__m512i a) {
+ // CIR-LABEL: _mm512_cvtepi64_epi16
+ // CIR: cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<8 x !s64i> -> !cir.vector<8 x !s16i>
+ //
+ // LLVM-LABEL: test_mm512_cvtepi64_epi16
+ // LLVM: trunc <8 x i64> %{{.*}} to <8 x i16>
+ //
+ // OGCG-LABEL: test_mm512_cvtepi64_epi16
+ // OGCG: trunc <8 x i64> %{{.*}} to <8 x i16>
+ return _mm512_cvtepi64_epi16(a);
+}
+
+__m128i test_mm512_mask_cvtepi64_epi16(__m128i src, __mmask8 k, __m512i a) {
+ // CIR-LABEL: _mm512_mask_cvtepi64_epi16
+ // CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<8 x !s64i> -> !cir.vector<8 x !s16i>
+ // CIR: %[[MASK:.*]] = cir.cast bitcast {{.*}} :
+ // CIR-SAME: !u8i -> !cir.vector<8 x !cir.int<s, 1>>
+ // CIR: cir.vec.ternary(%[[MASK]], %[[TRUNC]], {{.*}}) :
+ // CIR-SAME: !cir.vector<8 x !cir.int<s, 1>>,
+ // CIR-SAME: !cir.vector<8 x !s16i>
+ //
+ // LLVM-LABEL: test_mm512_mask_cvtepi64_epi16
+ // LLVM: %[[TRUNC:.*]] = trunc <8 x i64> %{{.*}} to <8 x i16>
+ // LLVM: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // LLVM: select <8 x i1> %[[MASK]], <8 x i16> %[[TRUNC]],
+ //
+ // OGCG-LABEL: test_mm512_mask_cvtepi64_epi16
+ // OGCG: call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512
+ return _mm512_mask_cvtepi64_epi16(src, k, a);
+}
+
+__m128i test_mm512_maskz_cvtepi64_epi16(__mmask8 k, __m512i a) {
+ // CIR-LABEL: _mm512_maskz_cvtepi64_epi16
+ // CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} :
+ // CIR-SAME: !cir.vector<8 x !s64i> -> !cir.vector<8 x !s16i>
+ // CIR: %[[MASK:.*]] = cir.cast bitcast {{.*}} :
+ // CIR-SAME: !u8i -> !cir.vector<8 x !cir.int<s, 1>>
+ // CIR: cir.vec.ternary(%[[MASK]], %[[TRUNC]], {{.*}}) :
+ // CIR-SAME: !cir.vector<8 x !cir.int<s, 1>>,
+ // CIR-SAME: !cir.vector<8 x !s16i>
+ //
+ // LLVM-LABEL: test_mm512_maskz_cvtepi64_epi16
+ // LLVM: %[[TRUNC:.*]] = trunc <8 x i64> %{{.*}} to <8 x i16>
+ // LLVM: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>
+ // LLVM: select <8 x i1> %[[MASK]], <8 x i16> %[[TRUNC]],
+ //
+ // OGCG-LABEL: test_mm512_maskz_cvtepi64_epi16
+ // OGCG: call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512
+ return _mm512_maskz_cvtepi64_epi16(k, a);
+}
+
__m256i test_mm512_mask_cvtepi64_epi32(__m256i __O, __mmask8 __M, __m512i __A) {
// CIR-LABEL: test_mm512_mask_cvtepi64_epi32
// CIR: %[[TRUNC:.*]] = cir.cast integral {{.*}} : !cir.vector<8 x !s64i> -> !cir.vector<8 x !s32i>
``````````
</details>
https://github.com/llvm/llvm-project/pull/213571
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