[clang] [CIR][AArch64] Upstream store (vstrq_p128) NEON builtins (PR #212677)

[Vicky Nguyen via cfe-commits]

================
@@ -1484,3 +1484,14 @@ void test_vst1q_u8_x4(uint8_t *a, uint8x16x4_t b) {
 // LLVM: ret void
   vst1q_u8_x4(a, b);
 }
+
+// ALL-LABEL: @test_vstrq_p128(
+void test_vstrq_p128(poly128_t *ptr, poly128_t val) {
+// CIR: cir.cast bitcast {{.*}} : !cir.ptr<!void> -> !cir.ptr<!u128i>
+// CIR: cir.store align(16) {{.*}}, {{.*}} : !u128i, !cir.ptr<!u128i>
----------------
iamvickynguyen wrote:

I check both `cir.cast` and `cir.store` because there are 2 stores in the emitted IR, and the first one isn't generated by the new code.

```c
...
%2 = cir.alloca "__s1" align(16) init : !cir.ptr<!u128i>
%3 = cir.load align(16) %1 : !cir.ptr<!u128i>, !u128i
cir.store align(16) %3, %2 : !u128i, !cir.ptr<!u128i>  // <- header macro's scratch copy
...
%7 = cir.cast bitcast %5 : !cir.ptr<!void> -> !cir.ptr<!u128i>  // <- emitted by createStore
cir.store align(16) %6, %7 : !u128i, !cir.ptr<!u128i> // our code
```

The code below is from the build `arm_neon.h`
```cpp
#define vstrq_p128(__p0, __p1) __extension__ ({
  poly128_t __s1 = __p1;
  __builtin_neon_vstrq_p128(__p0, __s1);
})
```

`poly128_t __s1 = __p1` creates the first `cir.store`.


https://github.com/llvm/llvm-project/pull/212677