[clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)

Lucas Chollet via cfe-commits cfe-commits at lists.llvm.org
Mon Jul 27 02:50:37 PDT 2026

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LucasChollet wrote:

Thanks!

https://github.com/llvm/llvm-project/pull/206206

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