[clang] [clang][AMDGPU] Clean-up handling of named barrier type (PR #207687)

[Yaxun Liu via cfe-commits]

yxsamliu wrote:

The refactoring looks good to me.

One concern: for the AMD SPIR-V path, the device cc1 triple is still `spirv64-amd-amdhsa`, so it uses the SPIR/SPIR-V address-space map. Should `LangAS::amdgpu_barrier` also be mapped to local AS 3 there, like `cuda_shared`, with a CodeGen test? Otherwise a named barrier global for the AMD SPIR-V path may fall back to the default address space.

https://github.com/llvm/llvm-project/pull/207687