[clang] clang/AMDGPU: Migrate cc1 tests to subarch triples (1) (PR #211822)
via cfe-commits
cfe-commits at lists.llvm.org
Fri Jul 24 08:10:30 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
Mechanically rewrite cc1 test RUN lines from the old
`-triple amdgcn... -target-cpu gfxNNN` form to the new subarch triple
form (e.g. `-triple amdgpu9.00-amd-amdhsa`), dropping the now-redundant
-target-cpu. The subarch encodes the exact target, so the emitted IR no
longer carries a "target-cpu" function attribute; autogenerated CHECK
lines are regenerated accordingly.
This batch covers the small CodeGen, Frontend, Layout, and Preprocessor
test directories.
Co-authored-by: Claude (Opus 4.8) <noreply@<!-- -->anthropic.com>
---
Full diff: https://github.com/llvm/llvm-project/pull/211822.diff
16 Files Affected:
- (modified) clang/test/AST/ast-print-amdgcn-predicate.c (+12-12)
- (modified) clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c (+2-2)
- (modified) clang/test/CodeGen/AMDGPU/full-bf16.c (+7-7)
- (modified) clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp (+1-1)
- (modified) clang/test/CodeGen/amdgpu-builtin-is-invocable.c (+4-4)
- (modified) clang/test/CodeGen/amdgpu-builtin-processor-is.c (+4-4)
- (modified) clang/test/CodeGen/builtins-extended-image.c (+1-1)
- (modified) clang/test/CodeGen/builtins-image-load.c (+1-1)
- (modified) clang/test/CodeGen/builtins-image-store.c (+1-1)
- (modified) clang/test/CodeGen/half-float16-vector-compatibility.cl (+1-1)
- (modified) clang/test/CodeGen/target-data.c (+1-1)
- (modified) clang/test/Frontend/amdgcn-machine-analysis-remarks.cl (+1-1)
- (modified) clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c (+2-2)
- (modified) clang/test/Layout/ms-x86-declspec-empty_bases.cpp (+2-2)
- (modified) clang/test/Preprocessor/hash_builtin.cpp (+1-1)
- (modified) clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp (+1-1)
``````````diff
diff --git a/clang/test/AST/ast-print-amdgcn-predicate.c b/clang/test/AST/ast-print-amdgcn-predicate.c
index 2b2c6e21ee2ad..3d1c2f6644325 100644
--- a/clang/test/AST/ast-print-amdgcn-predicate.c
+++ b/clang/test/AST/ast-print-amdgcn-predicate.c
@@ -5,33 +5,33 @@
// crash because the expansion produced an IntegerLiteral typed _Bool/bool.
// C (C11 and C23): IntegerLiteral 'int' implicit-cast to _Bool.
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -std=c11 \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -std=c11 \
// RUN: -ast-print %s | FileCheck --check-prefix=INT-TRUE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -std=c11 \
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -std=c11 \
// RUN: -ast-print %s | FileCheck --check-prefix=INT-FALSE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -std=c11 \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -std=c11 \
// RUN: -ast-dump %s | FileCheck --check-prefix=INT-DUMP %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -std=c23 \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -std=c23 \
// RUN: -ast-print %s | FileCheck --check-prefix=INT-TRUE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -std=c23 \
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -std=c23 \
// RUN: -ast-print %s | FileCheck --check-prefix=INT-FALSE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -std=c23 \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -std=c23 \
// RUN: -ast-dump %s | FileCheck --check-prefix=INT-DUMP %s
// C++ / HIP device: CXXBoolLiteralExpr 'bool'.
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -x c++ \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -x c++ \
// RUN: -std=c++17 -ast-print %s | FileCheck --check-prefix=BOOL-TRUE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -x c++ \
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -x c++ \
// RUN: -std=c++17 -ast-print %s | FileCheck --check-prefix=BOOL-FALSE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -x c++ \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -x c++ \
// RUN: -std=c++17 -ast-dump %s | FileCheck --check-prefix=BOOL-DUMP %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -x hip \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -x hip \
// RUN: -fcuda-is-device -ast-print %s \
// RUN: | FileCheck --check-prefix=BOOL-TRUE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -x hip \
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -x hip \
// RUN: -fcuda-is-device -ast-print %s \
// RUN: | FileCheck --check-prefix=BOOL-FALSE %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx942 -x hip \
+// RUN: %clang_cc1 -triple amdgpu9.42-amd-amdhsa -x hip \
// RUN: -fcuda-is-device -ast-dump %s \
// RUN: | FileCheck --check-prefix=BOOL-DUMP %s
diff --git a/clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c b/clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
index 3bfe45804fb78..8537fcd8f6ea2 100644
--- a/clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
+++ b/clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
@@ -1,6 +1,6 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -fnative-half-arguments-and-returns -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx900 -emit-llvm -o - %s | FileCheck -check-prefixes=CHECK,SAFE %s
-// RUN: %clang_cc1 -fnative-half-arguments-and-returns -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx900 -emit-llvm -munsafe-fp-atomics -o - %s | FileCheck -check-prefixes=CHECK,UNSAFE %s
+// RUN: %clang_cc1 -fnative-half-arguments-and-returns -triple amdgpu9.00-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck -check-prefixes=CHECK,SAFE %s
+// RUN: %clang_cc1 -fnative-half-arguments-and-returns -triple amdgpu9.00-amd-amdhsa-gnu -emit-llvm -munsafe-fp-atomics -o - %s | FileCheck -check-prefixes=CHECK,UNSAFE %s
// RUN: %clang_cc1 -fnative-half-arguments-and-returns -triple spirv64-amd-amdhsa -emit-llvm -o - %s | FileCheck -check-prefixes=CHECK-SPIRV,SAFE-SPIRV %s
// RUN: %clang_cc1 -fnative-half-arguments-and-returns -triple spirv64-amd-amdhsa -emit-llvm -munsafe-fp-atomics -o - %s | FileCheck -check-prefixes=CHECK-SPIRV,UNSAFE-SPIRV %s
diff --git a/clang/test/CodeGen/AMDGPU/full-bf16.c b/clang/test/CodeGen/AMDGPU/full-bf16.c
index 3ce1027b95805..e939676b82b86 100644
--- a/clang/test/CodeGen/AMDGPU/full-bf16.c
+++ b/clang/test/CodeGen/AMDGPU/full-bf16.c
@@ -1,11 +1,11 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu tahiti -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu fiji -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx900 -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx950 -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx1010 -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx1100 -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa-gnu -target-cpu gfx1250 -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu6.00-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu8.03-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu9.50-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu10.10-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu11.00-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu12.50-amd-amdhsa-gnu -emit-llvm -o - %s | FileCheck %s
// CHECK-LABEL: define dso_local bfloat @div(
// CHECK-SAME: bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
diff --git a/clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp b/clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp
index ec0d2c89126af..e611694ce17d0 100644
--- a/clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp
+++ b/clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp
@@ -1,5 +1,5 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -O1 -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -O1 -emit-llvm -o - %s | FileCheck %s
// REQUIRES: amdgpu-registered-target
extern __attribute__((address_space(3))) unsigned char * ptr_as3; // local address space
diff --git a/clang/test/CodeGen/amdgpu-builtin-is-invocable.c b/clang/test/CodeGen/amdgpu-builtin-is-invocable.c
index 88bfc35da4881..f36652a80a4f1 100644
--- a/clang/test/CodeGen/amdgpu-builtin-is-invocable.c
+++ b/clang/test/CodeGen/amdgpu-builtin-is-invocable.c
@@ -1,6 +1,6 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --version 6
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX900 %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx1010 -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX1010 %s
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX900 %s
+// RUN: %clang_cc1 -triple amdgpu10.10-amd-amdhsa -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX1010 %s
// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCNSPIRV %s
// Test that, depending on triple and, if applicable, target-cpu, one of three
@@ -53,9 +53,9 @@ void foo() {
return __builtin_trap();
}
//.
-// AMDGCN-GFX900: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" }
+// AMDGCN-GFX900: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
//.
-// AMDGCN-GFX1010: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx1010" }
+// AMDGCN-GFX1010: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
// AMDGCN-GFX1010: attributes #[[ATTR1:[0-9]+]] = { cold noreturn nounwind memory(inaccessiblemem: write) }
// AMDGCN-GFX1010: attributes #[[ATTR2]] = { noreturn nounwind }
//.
diff --git a/clang/test/CodeGen/amdgpu-builtin-processor-is.c b/clang/test/CodeGen/amdgpu-builtin-processor-is.c
index dadb964f5af79..b01efe57bbf66 100644
--- a/clang/test/CodeGen/amdgpu-builtin-processor-is.c
+++ b/clang/test/CodeGen/amdgpu-builtin-processor-is.c
@@ -1,6 +1,6 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --version 5
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX900 %s
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx1010 -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX1010 %s
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX900 %s
+// RUN: %clang_cc1 -triple amdgpu10.10-amd-amdhsa -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCN-GFX1010 %s
// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -emit-llvm %s -o - | FileCheck --check-prefix=AMDGCNSPIRV %s
// Test that, depending on triple and, if applicable, target-cpu, one of three
@@ -62,11 +62,11 @@ void foo() {
return __builtin_trap();
}
//.
-// AMDGCN-GFX900: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" }
+// AMDGCN-GFX900: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
// AMDGCN-GFX900: attributes #[[ATTR1:[0-9]+]] = { cold noreturn nounwind memory(inaccessiblemem: write) }
// AMDGCN-GFX900: attributes #[[ATTR2]] = { noreturn nounwind }
//.
-// AMDGCN-GFX1010: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx1010" }
+// AMDGCN-GFX1010: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
//.
// AMDGCNSPIRV: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+16-bit-insts,+add-min-max-insts,+ashr-pk-insts,+async-load-to-lds-insts,+async-store-from-lds-insts,+asynccnt,+atomic-buffer-global-pk-add-f16-insts,+atomic-buffer-pk-add-bf16-inst,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-fmin-fmax-global-f32,+atomic-fmin-fmax-global-f64,+atomic-global-pk-add-bf16-inst,+bf16-cvt-insts,+bf16-pk-insts,+bf16-trans-insts,+bf8-cvt-scale-insts,+bitop3-insts,+bvh-ray-tracing-insts,+ci-insts,+clusters,+cube-insts,+cvt-pknorm-vop2-insts,+cvt-pknorm-vop3-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot11-insts,+dot12-insts,+dot13-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+f16bf16-to-fp6bf6-cvt-scale-insts,+f32-to-f16bf16-cvt-sr-insts,+f32-to-fp6bf6-cvt-scale-insts,+flat-global-insts,+fp4-cvt-scale-insts,+fp6bf6-cvt-scale-insts,+fp8-conversion-insts,+fp8-cvt-scale-insts,+fp8-insts,+fp8e5m3-insts,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx1250-insts,+gfx1251-gemm-insts,+gfx13-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+gfx950-insts,+gws,+image-insts,+lerp-inst,+mai-insts,+mcast-load-insts,+mqsad-insts,+mqsad-pk-insts,+msad-insts,+permlane16-swap,+permlane32-swap,+pk-add-min-max-insts,+prng-inst,+qsad-insts,+s-memrealtime,+s-memtime-inst,+s-wakeup-barrier-inst,+sad-insts,+setprio-inc-wg-inst,+swmmac-gfx1200-insts,+swmmac-gfx1250-insts,+tanh-insts,+tensor-cvt-lut-insts,+transpose-load-f4f6-insts,+vmem-pref-insts,+vmem-to-lds-load-insts,+wavefrontsize32,+wavefrontsize64,+wmma-128b-insts,+wmma-256b-insts,+xf32-insts" }
// AMDGCNSPIRV: attributes #[[ATTR1:[0-9]+]] = { nounwind }
diff --git a/clang/test/CodeGen/builtins-extended-image.c b/clang/test/CodeGen/builtins-extended-image.c
index f487710d8cbed..3129539722a60 100644
--- a/clang/test/CodeGen/builtins-extended-image.c
+++ b/clang/test/CodeGen/builtins-extended-image.c
@@ -1,5 +1,5 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple amdgcn-- -target-cpu gfx1100 -target-feature +extended-image-insts %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu11.00-- -target-feature +extended-image-insts %s -emit-llvm -o - | FileCheck %s
typedef int int4 __attribute__((ext_vector_type(4)));
typedef float float4 __attribute__((ext_vector_type(4)));
diff --git a/clang/test/CodeGen/builtins-image-load.c b/clang/test/CodeGen/builtins-image-load.c
index 102ba502f8bae..fc8fcb984bf2c 100644
--- a/clang/test/CodeGen/builtins-image-load.c
+++ b/clang/test/CodeGen/builtins-image-load.c
@@ -1,5 +1,5 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple amdgcn-- -target-cpu gfx1100 %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu11.00-- %s -emit-llvm -o - | FileCheck %s
typedef int int4 __attribute__((ext_vector_type(4)));
typedef float float4 __attribute__((ext_vector_type(4)));
diff --git a/clang/test/CodeGen/builtins-image-store.c b/clang/test/CodeGen/builtins-image-store.c
index a9953c5a371be..8b5a5625d70f1 100644
--- a/clang/test/CodeGen/builtins-image-store.c
+++ b/clang/test/CodeGen/builtins-image-store.c
@@ -1,5 +1,5 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple amdgcn-- -target-cpu gfx1010 %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu10.10-- %s -emit-llvm -o - | FileCheck %s
typedef float float4 __attribute__((ext_vector_type(4)));
typedef _Float16 half;
diff --git a/clang/test/CodeGen/half-float16-vector-compatibility.cl b/clang/test/CodeGen/half-float16-vector-compatibility.cl
index a79ee58475fba..35d8e9c13c8ef 100644
--- a/clang/test/CodeGen/half-float16-vector-compatibility.cl
+++ b/clang/test/CodeGen/half-float16-vector-compatibility.cl
@@ -1,5 +1,5 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple amdgcn-- -target-cpu gfx1100 %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu11.00-- %s -emit-llvm -o - | FileCheck %s
#pragma OPENCL EXTENSION cl_khr_fp16 : enable
diff --git a/clang/test/CodeGen/target-data.c b/clang/test/CodeGen/target-data.c
index e74454ce95f81..d0f1c4dbf1a34 100644
--- a/clang/test/CodeGen/target-data.c
+++ b/clang/test/CodeGen/target-data.c
@@ -158,7 +158,7 @@
// RUN: | FileCheck %s -check-prefix=R600D
// R600D: target datalayout = "e-m:e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"
-// RUN: %clang_cc1 -triple amdgcn-unknown -target-cpu hawaii -o - -emit-llvm %s \
+// RUN: %clang_cc1 -triple amdgpu7.01-unknown -o - -emit-llvm %s \
// RUN: | FileCheck %s -check-prefix=R600SI
// R600SI: target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
diff --git a/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl b/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
index 9331afc305c25..fad2d7b2f1ec2 100644
--- a/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
+++ b/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
@@ -1,5 +1,5 @@
// REQUIRES: amdgpu-registered-target
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx908 -Rpass-analysis=kernel-resource-usage -S -O1 -verify %s -o /dev/null
+// RUN: %clang_cc1 -triple amdgpu9.08-amd-amdhsa -Rpass-analysis=kernel-resource-usage -S -O1 -verify %s -o /dev/null
// expected-remark at +10 {{Function Name: foo}}
// expected-remark at +9 {{ TotalSGPRs: 13}}
diff --git a/clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c b/clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
index 3efdc9ac2b5a0..11f774f658911 100644
--- a/clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
+++ b/clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
@@ -1,11 +1,11 @@
// REQUIRES: amdgpu-registered-target
// Test that --gpu-max-threads-per-block warns when used outside of HIP.
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa --gpu-max-threads-per-block=1024 \
+// RUN: %clang_cc1 -triple amdgpu-amd-amdhsa --gpu-max-threads-per-block=1024 \
// RUN: -fsyntax-only -verify=warn %s
// Test that no warning is emitted for HIP.
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -fcuda-is-device \
+// RUN: %clang_cc1 -triple amdgpu-amd-amdhsa -x hip -fcuda-is-device \
// RUN: --gpu-max-threads-per-block=1024 -fsyntax-only -verify=hip %s
// warn-warning@*{{'--gpu-max-threads-per-block=1024' is ignored since it is only supported for HIP}}
diff --git a/clang/test/Layout/ms-x86-declspec-empty_bases.cpp b/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
index af63f24100857..539846a214836 100644
--- a/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
+++ b/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
@@ -2,8 +2,8 @@
// RUN: | FileCheck %s
// RUN: %clang_cc1 -fno-rtti -triple x86_64-pc-win32 -fms-extensions -fdump-record-layouts -fsyntax-only %s 2>/dev/null \
// RUN: | FileCheck %s
-// RUN: %clang_cc1 -fno-rtti -triple amdgcn-amd-amdhsa -fms-extensions \
-// RUN: -target-cpu gfx1200 -aux-triple x86_64-pc-win32 -fcuda-is-device \
+// RUN: %clang_cc1 -fno-rtti -triple amdgpu12.00-amd-amdhsa -fms-extensions \
+// RUN: -aux-triple x86_64-pc-win32 -fcuda-is-device \
// RUN: -fdump-record-layouts -fsyntax-only -xhip %s 2>/dev/null \
// RUN: | FileCheck %s
// RUN: %clang_cc1 -fno-rtti -triple spirv64-amd-amdhsa -fms-extensions \
diff --git a/clang/test/Preprocessor/hash_builtin.cpp b/clang/test/Preprocessor/hash_builtin.cpp
index 018b71eca418e..99c33540bf191 100644
--- a/clang/test/Preprocessor/hash_builtin.cpp
+++ b/clang/test/Preprocessor/hash_builtin.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx906 -E %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple amdgpu9.06 -E %s -o - | FileCheck %s
// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -E %s -o - | FileCheck %s --check-prefix=SPIRV-AMDGCN
// CHECK: has_s_memtime_inst
diff --git a/clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp b/clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp
index e4036ed839cab..ff390fc0521e5 100644
--- a/clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp
+++ b/clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple amdgpu9.00-amd-amdhsa -fsyntax-only -verify %s
// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify=expected,spirv %s
bool predicate(bool x);
``````````
</details>
https://github.com/llvm/llvm-project/pull/211822
More information about the cfe-commits
mailing list