[clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)

[Alexander Richardson via cfe-commits]

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@@ -0,0 +1,34 @@
+# RUN: not llvm-mc -triple=riscv32 --mattr=+experimental-zilx %s 2>&1 \
+# RUN:        | FileCheck %s --check-prefixes=CHECK-ERROR,CHECK-RV32-ERROR
+# RUN: not llvm-mc -triple=riscv64 --mattr=+experimental-zilx %s 2>&1 \
+# RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+
+# Zilx loads take three registers; the memory-operand syntax is not accepted.
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arichardson wrote:

Is there any rationale for this? I would have expected the natural asm spelling to be `lxh a0, a2(a1)`?

https://github.com/llvm/llvm-project/pull/209419