[clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)

[Zeyi Xu via cfe-commits]

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@@ -24,7 +24,9 @@
 ; CHECK-NEXT:   experimental                     - Experimental intrinsics.
 ; CHECK-NEXT:   experimental-p                   - 'P' ('Base P' (Packed SIMD)).
 ; CHECK-NEXT:   experimental-rvm23u32            - RISC-V experimental-rvm23u32 profile.
+; CHECK-NEXT:   experimental-smcsps              - 'Smcsps' (Conditional Stack Pointer Swap at Machine Level).
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zeyi2 wrote:

Description comes from:

https://github.com/riscv/riscv-fast-interrupt/blob/603f1693a6f7d4ad9d878b58ec5a514708f00fe3/src/aclic.adoc?plain=1#L200-L201

https://github.com/llvm/llvm-project/pull/211712