[clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadLaneAt intrinsic support (PR #205735)

[via cfe-commits]

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@@ -19,6 +19,7 @@ bool DirectXTTIImpl::isTargetIntrinsicWithScalarOpAtArg(
     Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
   switch (ID) {
   case Intrinsic::dx_wave_readlane:
+  case Intrinsic::dx_quad_read_lane_at:
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kcloudy0717 wrote:

I did some digging and yes, this is required for QuadReadLaneAt intrinsic. `isTargetIntrinsicWithScalarOpAtArg` is called by the Scalarizer pass: https://github.com/llvm/llvm-project/blob/797ead5fc79645a09a22d72e13912bf7e7c8d884/llvm/lib/Transforms/Scalar/Scalarizer.cpp#L792-L798
Without the case, the function returns false for operand 1 (the index param), and the Scalarizer would fall into the else branch — but the i32 %idx operand was never scattered (it's not a vector), so Scattered[J] is an empty Scatterer and indexing it causes access violation.

https://github.com/llvm/llvm-project/pull/205735