[clang] [llvm] [AMDGPU] Add gfx13 support for global_load_async_to_lds (PR #211248)
Mariusz Sikora via cfe-commits
cfe-commits at lists.llvm.org
Wed Jul 22 22:52:28 PDT 2026
https://github.com/mariusz-sikora-at-amd updated https://github.com/llvm/llvm-project/pull/211248
>From 5b6c4ba92a28b17323d865bda03ae7c55aae6a49 Mon Sep 17 00:00:00 2001
From: Mariusz Sikora <mariusz.sikora at amd.com>
Date: Tue, 21 Jul 2026 07:49:31 -0400
Subject: [PATCH] [AMDGPU] Add gfx13 support for global_load_async_to_lds
---
clang/include/clang/Basic/BuiltinsAMDGPU.td | 8 +-
.../builtins-amdgcn-global-async-load-lds.cl | 50 ++++++++++
llvm/lib/Target/AMDGPU/AMDGPU.td | 3 +-
llvm/lib/Target/AMDGPU/FLATInstructions.td | 8 +-
llvm/lib/TargetParser/AMDGPUTargetParser.cpp | 1 +
.../llvm.amdgcn.global.load.async.to.lds.ll | 91 +++++++++++++++++++
llvm/test/MC/AMDGPU/gfx13_asm_vflat.s | 48 ++++++++++
7 files changed, 202 insertions(+), 7 deletions(-)
create mode 100644 clang/test/CodeGenOpenCL/builtins-amdgcn-global-async-load-lds.cl
diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.td b/clang/include/clang/Basic/BuiltinsAMDGPU.td
index 9ee4c7a4235c7..a9d83d905a6ca 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.td
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.td
@@ -995,10 +995,10 @@ def __builtin_amdgcn_cluster_load_async_to_lds_b8 : AMDGPUBuiltin<"void(char add
def __builtin_amdgcn_cluster_load_async_to_lds_b32 : AMDGPUBuiltin<"void(int address_space<1> *, int address_space<3> *, _Constant int, _Constant int, int)", [Const], "mcast-load-insts,wavefrontsize32">;
def __builtin_amdgcn_cluster_load_async_to_lds_b64 : AMDGPUBuiltin<"void(_ExtVector<2, int> address_space<1> *, _ExtVector<2, int> address_space<3> *, _Constant int, _Constant int, int)", [Const], "mcast-load-insts,wavefrontsize32">;
def __builtin_amdgcn_cluster_load_async_to_lds_b128 : AMDGPUBuiltin<"void(_ExtVector<4, int> address_space<1> *, _ExtVector<4, int> address_space<3> *, _Constant int, _Constant int, int)", [Const], "mcast-load-insts,wavefrontsize32">;
-def __builtin_amdgcn_global_load_async_to_lds_b8 : AMDGPUBuiltin<"void(char address_space<1> *, char address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts">;
-def __builtin_amdgcn_global_load_async_to_lds_b32 : AMDGPUBuiltin<"void(int address_space<1> *, int address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts">;
-def __builtin_amdgcn_global_load_async_to_lds_b64 : AMDGPUBuiltin<"void(_ExtVector<2, int> address_space<1> *, _ExtVector<2, int> address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts">;
-def __builtin_amdgcn_global_load_async_to_lds_b128 : AMDGPUBuiltin<"void(_ExtVector<4, int> address_space<1> *, _ExtVector<4, int> address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts">;
+def __builtin_amdgcn_global_load_async_to_lds_b8 : AMDGPUBuiltin<"void(char address_space<1> *, char address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts,wavefrontsize32">;
+def __builtin_amdgcn_global_load_async_to_lds_b32 : AMDGPUBuiltin<"void(int address_space<1> *, int address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts,wavefrontsize32">;
+def __builtin_amdgcn_global_load_async_to_lds_b64 : AMDGPUBuiltin<"void(_ExtVector<2, int> address_space<1> *, _ExtVector<2, int> address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts,wavefrontsize32">;
+def __builtin_amdgcn_global_load_async_to_lds_b128 : AMDGPUBuiltin<"void(_ExtVector<4, int> address_space<1> *, _ExtVector<4, int> address_space<3> *, _Constant int, _Constant int)", [Const], "async-load-to-lds-insts,wavefrontsize32">;
def __builtin_amdgcn_global_store_async_from_lds_b8 : AMDGPUBuiltin<"void(char address_space<1> *, char address_space<3> *, _Constant int, _Constant int)", [Const], "async-store-from-lds-insts">;
def __builtin_amdgcn_global_store_async_from_lds_b32 : AMDGPUBuiltin<"void(int address_space<1> *, int address_space<3> *, _Constant int, _Constant int)", [Const], "async-store-from-lds-insts">;
def __builtin_amdgcn_global_store_async_from_lds_b64 : AMDGPUBuiltin<"void(_ExtVector<2, int> address_space<1> *, _ExtVector<2, int> address_space<3> *, _Constant int, _Constant int)", [Const], "async-store-from-lds-insts">;
diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-global-async-load-lds.cl b/clang/test/CodeGenOpenCL/builtins-amdgcn-global-async-load-lds.cl
new file mode 100644
index 0000000000000..ad24114f9824c
--- /dev/null
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-global-async-load-lds.cl
@@ -0,0 +1,50 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -cl-std=CL2.0 -triple amdgcn-unknown-unknown -target-cpu gfx1310 -emit-llvm -o - %s | FileCheck %s --check-prefixes=GFX1310
+
+typedef int v2i __attribute__((ext_vector_type(2)));
+typedef int v4i __attribute__((ext_vector_type(4)));
+
+// GFX1310-LABEL: define dso_local void @test_amdgcn_global_load_async_to_lds_b8(
+// GFX1310-SAME: ptr addrspace(1) nofree noundef readonly captures(none) [[GADDR:%.*]], ptr addrspace(3) nofree noundef writeonly captures(none) [[LADDR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// GFX1310-NEXT: [[ENTRY:.*:]]
+// GFX1310-NEXT: tail call void @llvm.amdgcn.global.load.async.to.lds.b8(ptr addrspace(1) [[GADDR]], ptr addrspace(3) [[LADDR]], i32 16, i32 0)
+// GFX1310-NEXT: ret void
+//
+void test_amdgcn_global_load_async_to_lds_b8( global char* gaddr, local char* laddr)
+{
+ __builtin_amdgcn_global_load_async_to_lds_b8(gaddr, laddr, 16, 0);
+}
+
+// GFX1310-LABEL: define dso_local void @test_amdgcn_global_load_async_to_lds_b32(
+// GFX1310-SAME: ptr addrspace(1) nofree noundef readonly captures(none) [[GADDR:%.*]], ptr addrspace(3) nofree noundef writeonly captures(none) [[LADDR:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// GFX1310-NEXT: [[ENTRY:.*:]]
+// GFX1310-NEXT: tail call void @llvm.amdgcn.global.load.async.to.lds.b32(ptr addrspace(1) [[GADDR]], ptr addrspace(3) [[LADDR]], i32 16, i32 0)
+// GFX1310-NEXT: ret void
+//
+void test_amdgcn_global_load_async_to_lds_b32(global int* gaddr, local int* laddr)
+{
+ __builtin_amdgcn_global_load_async_to_lds_b32(gaddr, laddr, 16, 0);
+}
+
+// GFX1310-LABEL: define dso_local void @test_amdgcn_global_load_async_to_lds_b64(
+// GFX1310-SAME: ptr addrspace(1) nofree noundef readonly captures(none) [[GADDR:%.*]], ptr addrspace(3) nofree noundef writeonly captures(none) [[LADDR:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// GFX1310-NEXT: [[ENTRY:.*:]]
+// GFX1310-NEXT: tail call void @llvm.amdgcn.global.load.async.to.lds.b64(ptr addrspace(1) [[GADDR]], ptr addrspace(3) [[LADDR]], i32 16, i32 0)
+// GFX1310-NEXT: ret void
+//
+void test_amdgcn_global_load_async_to_lds_b64(global v2i* gaddr, local v2i* laddr)
+{
+ __builtin_amdgcn_global_load_async_to_lds_b64(gaddr, laddr, 16, 0);
+}
+
+// GFX1310-LABEL: define dso_local void @test_amdgcn_global_load_async_to_lds_b128(
+// GFX1310-SAME: ptr addrspace(1) nofree noundef readonly captures(none) [[GADDR:%.*]], ptr addrspace(3) nofree noundef writeonly captures(none) [[LADDR:%.*]]) local_unnamed_addr #[[ATTR0]] {
+// GFX1310-NEXT: [[ENTRY:.*:]]
+// GFX1310-NEXT: tail call void @llvm.amdgcn.global.load.async.to.lds.b128(ptr addrspace(1) [[GADDR]], ptr addrspace(3) [[LADDR]], i32 16, i32 0)
+// GFX1310-NEXT: ret void
+//
+void test_amdgcn_global_load_async_to_lds_b128( global v4i* gaddr, local v4i* laddr)
+{
+ __builtin_amdgcn_global_load_async_to_lds_b128(gaddr, laddr, 16, 0);
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index d815632753c6d..b812754a11db8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -2393,7 +2393,8 @@ def FeatureISAVersion13 : FeatureSet<
FeatureCvtNormInsts,
FeatureCvtPkNormVOP2Insts,
FeatureCvtPkNormVOP3Insts,
- FeatureSmemPrefetchInsts
+ FeatureSmemPrefetchInsts,
+ FeatureAsyncLoadToLDSInsts,
]>;
def FeatureISAVersion13_Generic: FeatureSet<
diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td
index be2ac3bd2a827..f241f6677d22b 100644
--- a/llvm/lib/Target/AMDGPU/FLATInstructions.td
+++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td
@@ -1249,12 +1249,12 @@ def TENSOR_SAVE : FLAT_Global_Tensor_Pseudo<"tensor_save", 1>;
def TENSOR_STOP : FLAT_Global_Tensor_Pseudo<"tensor_stop">;
} // End SubtargetPredicate = HasMcastLoadInsts
-let SubtargetPredicate = HasAsyncLoadToLDSInsts in {
+let SubtargetPredicate = HasAsyncLoadToLDSInsts, WaveSizePredicate = isWave32 in {
defm GLOBAL_LOAD_ASYNC_TO_LDS_B8 : FLAT_Global_Load_LDS_Pseudo<"global_load_async_to_lds_b8", 1>;
defm GLOBAL_LOAD_ASYNC_TO_LDS_B32 : FLAT_Global_Load_LDS_Pseudo<"global_load_async_to_lds_b32", 1>;
defm GLOBAL_LOAD_ASYNC_TO_LDS_B64 : FLAT_Global_Load_LDS_Pseudo<"global_load_async_to_lds_b64", 1>;
defm GLOBAL_LOAD_ASYNC_TO_LDS_B128 : FLAT_Global_Load_LDS_Pseudo<"global_load_async_to_lds_b128", 1>;
-} // End SubtargetPredicate = HasAsyncLoadToLDSInsts
+} // End SubtargetPredicate = HasAsyncLoadToLDSInsts, WaveSizePredicate = isWave32
let SubtargetPredicate = HasAsyncStoreFromLDSInsts in {
defm GLOBAL_STORE_ASYNC_FROM_LDS_B8 : FLAT_Global_STORE_LDS_Pseudo<"global_store_async_from_lds_b8">;
@@ -3931,6 +3931,10 @@ defm GLOBAL_ATOMIC_OR_X2 : VFLAT_Real_AllAddr_Atomics_gfx13<0x5a, "
defm GLOBAL_ATOMIC_XOR_X2 : VFLAT_Real_AllAddr_Atomics_gfx13<0x5b, "global_atomic_xor_b64">;
defm GLOBAL_ATOMIC_INC_X2 : VFLAT_Real_AllAddr_Atomics_gfx13<0x5c, "global_atomic_inc_u64">;
defm GLOBAL_ATOMIC_DEC_X2 : VFLAT_Real_AllAddr_Atomics_gfx13<0x5d, "global_atomic_dec_u64">;
+defm GLOBAL_LOAD_ASYNC_TO_LDS_B8 : VFLAT_Real_AllAddr_gfx13<0x61>;
+defm GLOBAL_LOAD_ASYNC_TO_LDS_B32 : VFLAT_Real_AllAddr_gfx13<0x62>;
+defm GLOBAL_LOAD_ASYNC_TO_LDS_B64 : VFLAT_Real_AllAddr_gfx13<0x63>;
+defm GLOBAL_LOAD_ASYNC_TO_LDS_B128 : VFLAT_Real_AllAddr_gfx13<0x64>;
defm GLOBAL_ATOMIC_ORDERED_ADD_B64 : VFLAT_Real_AllAddr_Atomics_gfx13<0x75>;
// ENC_VSCRATCH.
diff --git a/llvm/lib/TargetParser/AMDGPUTargetParser.cpp b/llvm/lib/TargetParser/AMDGPUTargetParser.cpp
index a2a23c64a8934..31cb07d67fbdc 100644
--- a/llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+++ b/llvm/lib/TargetParser/AMDGPUTargetParser.cpp
@@ -529,6 +529,7 @@ static void fillAMDGCNFeatureMap(StringRef GPU, const Triple &T,
Features["cvt-pknorm-vop2-insts"] = true;
Features["cvt-pknorm-vop3-insts"] = true;
Features["image-insts"] = true;
+ Features["async-load-to-lds-insts"] = true;
break;
case GK_GFX1251:
Features["gfx1251-gemm-insts"] = true;
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
index 4fc98cb7ff6d5..b47ac859a87ea 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel=0 -mtriple=amdgpu12.50 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
; RUN: llc -global-isel=1 -mtriple=amdgpu12.50 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
+; RUN: llc -global-isel=0 -mtriple=amdgpu13.10 < %s | FileCheck -check-prefixes=GFX13,GFX13-SDAG %s
+; RUN: llc -global-isel=1 -mtriple=amdgpu13.10 < %s | FileCheck -check-prefixes=GFX13,GFX13-GISEL %s
declare void @llvm.amdgcn.global.load.async.to.lds.b8(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)
declare void @llvm.amdgcn.global.load.async.to.lds.b32(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)
@@ -27,6 +29,14 @@ define amdgpu_ps void @global_load_async_to_lds_b8_vaddr(ptr addrspace(1) %gaddr
; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-GISEL-NEXT: global_load_async_to_lds_b8 v2, v[0:1], off offset:16 th:TH_LOAD_NT
; GFX1250-GISEL-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b8_vaddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_add_co_u32 v0, vcc_lo, v0, 32
+; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
+; GFX13-NEXT: global_load_async_to_lds_b8 v2, v[0:1], off offset:16 th:TH_LOAD_NT
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b8(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 1)
@@ -42,6 +52,12 @@ define amdgpu_ps void @global_load_async_to_lds_b8_saddr(ptr addrspace(1) inreg
; GFX1250-NEXT: v_mov_b32_e32 v1, 32
; GFX1250-NEXT: global_load_async_to_lds_b8 v0, v1, s[0:1] offset:16
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b8_saddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, 32
+; GFX13-NEXT: global_load_async_to_lds_b8 v0, v1, s[0:1] offset:16
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b8(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)
@@ -68,6 +84,14 @@ define amdgpu_ps void @global_load_async_to_lds_b32_vaddr(ptr addrspace(1) %gadd
; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-GISEL-NEXT: global_load_async_to_lds_b32 v2, v[0:1], off offset:16 th:TH_LOAD_HT scope:SCOPE_SE
; GFX1250-GISEL-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b32_vaddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_add_co_u32 v0, vcc_lo, v0, 32
+; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
+; GFX13-NEXT: global_load_async_to_lds_b32 v2, v[0:1], off offset:16 th:TH_LOAD_HT scope:SCOPE_SE
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b32(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 10)
@@ -83,6 +107,12 @@ define amdgpu_ps void @global_load_async_to_lds_b32_saddr(ptr addrspace(1) inreg
; GFX1250-NEXT: v_mov_b32_e32 v1, 32
; GFX1250-NEXT: global_load_async_to_lds_b32 v0, v1, s[0:1] offset:16
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b32_saddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, 32
+; GFX13-NEXT: global_load_async_to_lds_b32 v0, v1, s[0:1] offset:16
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b32(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)
@@ -109,6 +139,14 @@ define amdgpu_ps void @global_load_async_to_lds_b64_vaddr(ptr addrspace(1) %gadd
; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-GISEL-NEXT: global_load_async_to_lds_b64 v2, v[0:1], off offset:16 th:TH_LOAD_NT_HT scope:SCOPE_DEV
; GFX1250-GISEL-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b64_vaddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_add_co_u32 v0, vcc_lo, v0, 32
+; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
+; GFX13-NEXT: global_load_async_to_lds_b64 v2, v[0:1], off offset:16 th:TH_LOAD_NT_HT scope:SCOPE_DEV
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b64(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 22)
@@ -124,6 +162,12 @@ define amdgpu_ps void @global_load_async_to_lds_b64_saddr(ptr addrspace(1) inreg
; GFX1250-NEXT: v_mov_b32_e32 v1, 32
; GFX1250-NEXT: global_load_async_to_lds_b64 v0, v1, s[0:1] offset:16
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b64_saddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, 32
+; GFX13-NEXT: global_load_async_to_lds_b64 v0, v1, s[0:1] offset:16
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b64(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)
@@ -150,6 +194,14 @@ define amdgpu_ps void @global_load_async_to_lds_b128_vaddr(ptr addrspace(1) %gad
; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-GISEL-NEXT: global_load_async_to_lds_b128 v2, v[0:1], off offset:16 th:TH_LOAD_BYPASS scope:SCOPE_SYS
; GFX1250-GISEL-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b128_vaddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_add_co_u32 v0, vcc_lo, v0, 32
+; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
+; GFX13-NEXT: global_load_async_to_lds_b128 v2, v[0:1], off offset:16 th:TH_LOAD_BYPASS scope:SCOPE_SYS
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b128(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 27)
@@ -165,6 +217,12 @@ define amdgpu_ps void @global_load_async_to_lds_b128_saddr(ptr addrspace(1) inre
; GFX1250-NEXT: v_mov_b32_e32 v1, 32
; GFX1250-NEXT: global_load_async_to_lds_b128 v0, v1, s[0:1] offset:16
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b128_saddr:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, 32
+; GFX13-NEXT: global_load_async_to_lds_b128 v0, v1, s[0:1] offset:16
+; GFX13-NEXT: s_endpgm
entry:
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i32 4
call void @llvm.amdgcn.global.load.async.to.lds.b128(ptr addrspace(1) %gep, ptr addrspace(3) %laddr, i32 16, i32 0)
@@ -179,6 +237,11 @@ define amdgpu_ps void @global_load_async_to_lds_b32_saddr_scale_offset(ptr addrs
; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT: global_load_async_to_lds_b32 v0, v1, s[0:1] offset:16 scale_offset th:TH_LOAD_NT
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b32_saddr_scale_offset:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: global_load_async_to_lds_b32 v0, v1, s[0:1] offset:16 scale_offset th:TH_LOAD_NT
+; GFX13-NEXT: s_endpgm
entry:
%idxprom = sext i32 %idx to i64
%gep = getelementptr i32, ptr addrspace(1) %gaddr, i64 %idxprom
@@ -194,6 +257,11 @@ define amdgpu_ps void @global_load_async_to_lds_b64_saddr_scale_offset(ptr addrs
; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT: global_load_async_to_lds_b64 v0, v1, s[0:1] offset:16 scale_offset th:TH_LOAD_NT
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_load_async_to_lds_b64_saddr_scale_offset:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: global_load_async_to_lds_b64 v0, v1, s[0:1] offset:16 scale_offset th:TH_LOAD_NT
+; GFX13-NEXT: s_endpgm
entry:
%idxprom = sext i32 %idx to i64
%gep = getelementptr i64, ptr addrspace(1) %gaddr, i64 %idxprom
@@ -213,6 +281,29 @@ define amdgpu_ps void @global_load_async_to_lds_b64_saddr_no_scale_offset(ptr ad
; GFX1250-NEXT: v_lshl_add_u64 v[2:3], v[2:3], 2, s[0:1]
; GFX1250-NEXT: global_load_async_to_lds_b64 v0, v[2:3], off offset:16 th:TH_LOAD_NT
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-SDAG-LABEL: global_load_async_to_lds_b64_saddr_no_scale_offset:
+; GFX13-SDAG: ; %bb.0: ; %entry
+; GFX13-SDAG-NEXT: v_ashrrev_i32_e32 v2, 31, v1
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_lshlrev_b64_e32 v[1:2], 2, v[1:2]
+; GFX13-SDAG-NEXT: v_add_co_u32 v1, vcc_lo, s0, v1
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_add_co_ci_u32_e64 v2, null, s1, v2, vcc_lo
+; GFX13-SDAG-NEXT: global_load_async_to_lds_b64 v0, v[1:2], off offset:16 th:TH_LOAD_NT
+; GFX13-SDAG-NEXT: s_endpgm
+;
+; GFX13-GISEL-LABEL: global_load_async_to_lds_b64_saddr_no_scale_offset:
+; GFX13-GISEL: ; %bb.0: ; %entry
+; GFX13-GISEL-NEXT: v_dual_ashrrev_i32 v2, 31, v1 :: v_dual_mov_b32 v4, s1
+; GFX13-GISEL-NEXT: v_mov_b32_e32 v3, s0
+; GFX13-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13-GISEL-NEXT: v_lshlrev_b64_e32 v[1:2], 2, v[1:2]
+; GFX13-GISEL-NEXT: v_add_co_u32 v1, vcc_lo, v3, v1
+; GFX13-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-GISEL-NEXT: v_add_co_ci_u32_e64 v2, null, v4, v2, vcc_lo
+; GFX13-GISEL-NEXT: global_load_async_to_lds_b64 v0, v[1:2], off offset:16 th:TH_LOAD_NT
+; GFX13-GISEL-NEXT: s_endpgm
entry:
%idxprom = sext i32 %idx to i64
%gep = getelementptr i32, ptr addrspace(1) %gaddr, i64 %idxprom
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vflat.s b/llvm/test/MC/AMDGPU/gfx13_asm_vflat.s
index a9ace1677cacf..d0ad6f03d895a 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vflat.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vflat.s
@@ -2093,6 +2093,54 @@ global_load_addtid_b32 v1, s[0:1] offset:64
global_load_addtid_b32 v1, s[2:3]
// GFX13: global_load_addtid_b32 v1, s[2:3] ; encoding: [0x02,0x80,0x05,0xee,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+global_load_async_to_lds_b8 v1, v[2:3], off
+// GFX13-W32: global_load_async_to_lds_b8 v1, v[2:3], off ; encoding: [0x7c,0x40,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x00,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b8 v1, v[2:3], off offset:64
+// GFX13-W32: global_load_async_to_lds_b8 v1, v[2:3], off offset:64 ; encoding: [0x7c,0x40,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x40,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b8 v1, v[2:3], off offset:-64
+// GFX13-W32: global_load_async_to_lds_b8 v1, v[2:3], off offset:-64 ; encoding: [0x7c,0x40,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0xc0,0xff,0xff]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b8 v1, v2, s[2:3]
+// GFX13-W32: global_load_async_to_lds_b8 v1, v2, s[2:3] ; encoding: [0x02,0x40,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x00,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b8 v1, v2, s[2:3] offset:64
+// GFX13-W32: global_load_async_to_lds_b8 v1, v2, s[2:3] offset:64 ; encoding: [0x02,0x40,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x40,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b8 v1, v2, s[2:3] offset:-64
+// GFX13-W32: global_load_async_to_lds_b8 v1, v2, s[2:3] offset:-64 ; encoding: [0x02,0x40,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0xc0,0xff,0xff]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b32 v1, v[2:3], off
+// GFX13-W32: global_load_async_to_lds_b32 v1, v[2:3], off ; encoding: [0x7c,0x80,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x00,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b32 v1, v[2:3], off offset:64
+// GFX13-W32: global_load_async_to_lds_b32 v1, v[2:3], off offset:64 ; encoding: [0x7c,0x80,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x40,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b32 v1, v[2:3], off offset:-64
+// GFX13-W32: global_load_async_to_lds_b32 v1, v[2:3], off offset:-64 ; encoding: [0x7c,0x80,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0xc0,0xff,0xff]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b32 v1, v2, s[2:3]
+// GFX13-W32: global_load_async_to_lds_b32 v1, v2, s[2:3] ; encoding: [0x02,0x80,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x00,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b32 v1, v2, s[2:3] offset:64
+// GFX13-W32: global_load_async_to_lds_b32 v1, v2, s[2:3] offset:64 ; encoding: [0x02,0x80,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0x40,0x00,0x00]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
+global_load_async_to_lds_b32 v1, v2, s[2:3] offset:-64
+// GFX13-W32: global_load_async_to_lds_b32 v1, v2, s[2:3] offset:-64 ; encoding: [0x02,0x80,0x18,0xee,0x01,0x00,0x00,0x00,0x02,0xc0,0xff,0xff]
+// GFX13-W64-ERR: :[[@LINE-2]]:1: error: instruction requires wavesize=32
+
global_load_b128 v[1:4], v0, s[0:1] offset:-64
// GFX1250-ERR: :[[@LINE-1]]:18: error: invalid operand for instruction
// GFX13: global_load_b128 v[1:4], v0, s[0:1] offset:-64 ; encoding: [0x00,0x80,0x03,0xee,0x01,0x00,0x00,0x00,0x00,0xc0,0xff,0xff]
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