[clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)

[Fangrui Song via cfe-commits]

MaskRay wrote:

> Since @MaskRay was talking about function multiversioning in his initial review, I am going to assume he misunderstood the difference with the previous PR. I will land this in a day or so unless someone comes forward.

I believe this version no longer pessimize musl. The previous FMV version did.

The patch optimizes for a default `-march=x86-64 build`, which unfortunately is still used quite a bit. 

In `testb $1, __cpu_model+13(%rip) + jne sse42Loop; `, the branch direction is invariant after startup, so it's perfectly predicted, and since the loaded value only verifies the predicted branch (in-order retirement), even an L3 hit stays off the critical path.

In a `-march=x86-64-v2` build (what we actually should care about), `__SSE4_2__` folds `LLVM_CPU_SUPPORTS_SSE42` to a constant and the generated code is likely identical to before, no overhead.

I withdraw my objection. I remain unconvinced we should add subtle SSE4.2-specific code to Support, but I don't want to override others' approvals. Go ahead.

https://github.com/llvm/llvm-project/pull/180631