[clang] [CIR][AArch64] Lower Vector saturating shift and narrow intrinsics (PR #209389)

[Vicky Nguyen via cfe-commits]

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@@ -302,17 +303,26 @@ deriveNeonSISDIntrinsicOperandTypes(CIRGenFunction &cgf, unsigned modifier,
   else if (vecArgTy && !(modifier & AddRetType))
     funcResTy = wrapAsVector(resultTy);
 
-  // When VectorizeArgTypes is set, wrap every operand that has the same
-  // scalar type as arg0 into a vector. This covers intrinsics with multiple
-  // data operands of the same type (e.g. vsri takes two data operands,
-  // both of which must be wrapped into the same vector type).
+  // LLVMExtendedType<0> preserves the result vector's lane count while
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iamvickynguyen wrote:

I agree that we should rename the `WidenArgs` flag to be more explicit because the argument type is derived from the return type. A note is that in some cases like `vraddhn`, this applies to 2 arguments, not just argument 0. So I'd suggest rename to `ArgAsWidenedRetType` or similar.

https://github.com/llvm/llvm-project/pull/209389