[clang] [llvm] [FMV][AIX] Implement target_clones part 2 (target-features) (PR #206786)

[Wael Yehia via cfe-commits]

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@@ -3133,18 +3133,55 @@ void CodeGenFunction::EmitPPCAIXMultiVersionResolver(
     assert(RO.Features.size() == 1 &&
            "for now one feature requirement per version");
 
-    assert(RO.Features[0].starts_with("cpu="));
-    StringRef CPU = RO.Features[0].split("=").second.trim();
-    StringRef Feature = llvm::StringSwitch<StringRef>(CPU)
-                            .Case("pwr7", "arch_2_06")
-                            .Case("pwr8", "arch_2_07")
-                            .Case("pwr9", "arch_3_00")
-                            .Case("pwr10", "arch_3_1")
-                            .Case("pwr11", "arch_3_1")
-                            .Default("error");
-
-    llvm::Value *Condition = EmitPPCBuiltinCpu(
-        Builtin::BI__builtin_cpu_supports, Builder.getInt1Ty(), Feature);
+    StringRef FeatureStr = RO.Features[0];
+    StringRef BuiltinCpuSupportsArg;
+    bool IsNegated = false;
+
+    if (FeatureStr.starts_with("cpu=")) {
+      // CPU specification - map to ISA level
+      StringRef CPU = FeatureStr.split("=").second.trim();
+      BuiltinCpuSupportsArg = llvm::StringSwitch<StringRef>(CPU)
+                                  .Case("pwr7", "arch_2_06")
+                                  .Case("pwr8", "arch_2_07")
+                                  .Case("pwr9", "arch_3_00")
+                                  .Case("pwr10", "arch_3_1")
+                                  .Case("pwr11", "arch_3_1")
----------------
w2yehia wrote:

I considered putting into PPCTargetParser.def but that would require creating a new macro similar to `PPC_AIX_CLONES_FEATURE`. On second thought, I'll do that.

> both pwr10 and pwr11 map to arch_3_1 ,it maybe better to add comment to mention that power11 is not distinguished from cpu=pwr10 ?

sure, does the following sound correct: "Power11 implements the same ISA as Power10."

https://github.com/llvm/llvm-project/pull/206786