[clang] [llvm] [AMDGPU][SDAG] Expand divergent s_bitreplicate to VALU (PR #208308)

[Krzysztof Drewniak via cfe-commits]

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@@ -707,7 +707,7 @@ def DocSBitReplicate : Documentation {
   let Content = [{
 Replicates each bit of the 32-bit ``src`` operand into two adjacent bits of a
 64-bit result. Bit ``i`` of the input is copied to bits ``2*i`` and ``2*i+1``
-of the output. The operand must be uniform across the wavefront. A divergent
-value gives an undefined result.
+of the output. A uniform operand lowers to ``s_bitreplicate_b64_b32``. A
+divergent operand is expanded to an equivalent VALU sequence.
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krzysz00 wrote:

Ok, who, where, and I'm going to object that it's decently common that `s_` operations get implicit `readfirstlane`s on them.

See also things like `global.load.lds`.

Like, I think it's perfectly fine to say "the argument MUST be uniform" to users and therefore readfirstlane it if it's an a VGPR for some reason

https://github.com/llvm/llvm-project/pull/208308