[clang] [CIR][AArc64] Add lowering for fp16 intrinsics (sqrt + max + min) (PR #207786)

[Andy Kaylor via cfe-commits]

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@@ -3099,11 +3099,10 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
   case NEON::BI__builtin_neon_vpminnmq_v:
     intrName = "aarch64.neon.fminnmp";
     return emitNeonCall(cgm, builder, {ty, ty}, ops, intrName, ty, loc);
-  case NEON::BI__builtin_neon_vsqrth_f16:
-    cgm.errorNYI(expr->getSourceRange(),
-                 std::string("unimplemented AArch64 builtin call: ") +
-                     getContext().BuiltinInfo.getName(builtinID));
-    return mlir::Value{};
+  case NEON::BI__builtin_neon_vsqrth_f16: {
+    auto halfTy = builder.getFp16Ty();
+    return emitCallMaybeConstrainedBuiltin(builder, loc, "sqrt", {halfTy}, ops);
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andykaylor wrote:

This will need constrained handling.

https://github.com/llvm/llvm-project/pull/207786