[clang] [llvm] [AArch64][llvm] Add support for FEAT_HINTE for Armv9.6 onwards (PR #206905)

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git-clang-format --diff origin/main HEAD --extensions h,c,cpp -- clang/test/Driver/aarch64-v96a.c clang/test/Driver/print-supported-extensions-aarch64.c llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h llvm/unittests/TargetParser/TargetParserTest.cpp --diff_from_common_commit
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 566c83b5e..0c9a94ee9 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4430,8 +4430,7 @@ ParseStatus AArch64AsmParser::tryParseSysReg(OperandVector &Operands) {
   } else {
     MRSReg = MSRReg = AArch64SysReg::parseGenericRegister(Tok.getString());
     const FeatureBitset &FeatureBits = getSTI().getFeatureBits();
-    if (MRSReg != -1 &&
-        AArch64SysReg::isHINTESystemRegisterEncoding(MRSReg) &&
+    if (MRSReg != -1 && AArch64SysReg::isHINTESystemRegisterEncoding(MRSReg) &&
         !FeatureBits[AArch64::FeatureHINTE] &&
         !FeatureBits[AArch64::FeatureAll])
       MRSReg = MSRReg = -1;

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https://github.com/llvm/llvm-project/pull/206905