[clang] [HIP] Remove redundant device optimization pipeline (PR #206350)

via cfe-commits cfe-commits at lists.llvm.org
Sun Jun 28 10:30:01 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-clang

Author: Yaxun (Sam) Liu (yxsamliu)

<details>
<summary>Changes</summary>

[HIP] Remove redundant device optimization pipeline

The new offload driver passes device bitcode to the linker wrapper. The linker wrapper runs the LLVM optimization pipeline when it compiles that bitcode to ISA, so running the same pipeline during the earlier clang source-to-bitcode step is redundant.

Pass -disable-llvm-passes to the HIP device cc1 job when clang is producing intermediate device bitcode for the new offload driver. Do not add it for user-requested -emit-llvm output, where the clang driver output is LLVM IR or bitcode and the requested optimization level should still be honored.



---
Full diff: https://github.com/llvm/llvm-project/pull/206350.diff


2 Files Affected:

- (modified) clang/lib/Driver/ToolChains/Clang.cpp (+11) 
- (added) clang/test/Driver/hip-new-driver-disable-llvm-passes.hip (+25) 


``````````diff
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
index bb3fbc3c585a6..8e93e95aefb45 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -5428,6 +5428,17 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
           CmdArgs.push_back("-flto-unit");
       }
     }
+
+    // The linker wrapper runs LLVM optimization when it lowers device bitcode
+    // to ISA. Skip it here for new-driver HIP intermediate bitcode, but keep
+    // the user's opt level for final -emit-llvm output.
+    if ((JA.getType() == types::TY_LLVM_BC ||
+         JA.getType() == types::TY_LTO_BC) &&
+        IsHIPDevice && !Args.hasArg(options::OPT_emit_llvm) &&
+        Args.hasFlag(options::OPT_offload_new_driver,
+                     options::OPT_no_offload_new_driver,
+                     C.getActiveOffloadKinds() != Action::OFK_None))
+      CmdArgs.push_back("-disable-llvm-passes");
   }
 
   Args.AddLastArg(CmdArgs, options::OPT_dumpdir);
diff --git a/clang/test/Driver/hip-new-driver-disable-llvm-passes.hip b/clang/test/Driver/hip-new-driver-disable-llvm-passes.hip
new file mode 100644
index 0000000000000..4e9787d2705ee
--- /dev/null
+++ b/clang/test/Driver/hip-new-driver-disable-llvm-passes.hip
@@ -0,0 +1,25 @@
+// RUN: %clang -### --target=x86_64-linux-gnu \
+// RUN:   --offload-arch=gfx90a -nogpuinc -nogpulib \
+// RUN:   -O3 -c -x hip %s 2>&1 | FileCheck -check-prefix=DEFAULT %s
+// RUN: %clang -### --target=x86_64-linux-gnu \
+// RUN:   --offload-arch=gfx90a -nogpuinc -nogpulib \
+// RUN:   -O3 --cuda-device-only -emit-llvm -c -x hip %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=USER-BC %s
+// RUN: %clang -### --target=x86_64-linux-gnu \
+// RUN:   --offload-arch=gfx90a -nogpuinc -nogpulib \
+// RUN:   -O3 --cuda-device-only -emit-llvm -S -x hip %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=USER-IR %s
+
+// DEFAULT: "-cc1" "-triple" "amdgcn-amd-amdhsa"
+// DEFAULT-SAME: "-emit-llvm-bc"
+// DEFAULT-SAME: "-disable-llvm-passes"
+// DEFAULT: "{{.*}}llvm-offload-binary"
+// DEFAULT: "{{.*}}clang-linker-wrapper"
+
+// USER-BC: "-cc1" "-triple" "amdgcn-amd-amdhsa"
+// USER-BC-SAME: "-emit-llvm-bc"
+// USER-BC-NOT: "-disable-llvm-passes"
+
+// USER-IR: "-cc1" "-triple" "amdgcn-amd-amdhsa"
+// USER-IR-SAME: "-emit-llvm"
+// USER-IR-NOT: "-disable-llvm-passes"

``````````

</details>


https://github.com/llvm/llvm-project/pull/206350


More information about the cfe-commits mailing list