[clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)

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@@ -874,6 +874,20 @@ NVPTX Support
 X86 Support
 ^^^^^^^^^^^
 - ``march=znver6`` is now supported.
+- Support ISA of ``AVX512BMM``.
+  * Support intrinsic of ``_mm512_bmacor16x16x16_v32hi``.
+  * Support intrinsic of ``_mm512_bmacxor16x16x16_v32hi``.
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ganeshgit wrote:

v32hi was the internal builtin mangling which were modeled as per modes. These builtins are not operating on direct integers. So removing the suffix altogether. These are leaks to the notes. Fixed to the actual names _mm512_bmacor16x16x16 / _mm256_bmacor16x16x16 (and the xor variants).  Since they are no more packed integers (pi), GCC dropped the suffix. Replicating that convention here.

https://github.com/llvm/llvm-project/pull/182556