[clang] [CIR] Lower bitwise vector reduce builtins (PR #201164)

[Erich Keane via cfe-commits]

================
@@ -1704,6 +1701,27 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
   case Builtin::BI__builtin_masked_compress_store:
   case Builtin::BI__builtin_masked_scatter:
     return errorBuiltinNYI(*this, e, builtinID);
+  case Builtin::BI__builtin_reduce_xor: {
+    mlir::Value arg = emitScalarExpr(e->getArg(0));
+    cir::VectorType vecTy = cast<cir::VectorType>(arg.getType());
+    return RValue::get(builder.emitIntrinsicCallOp(
----------------
erichkeane wrote:

I don't think we should do that as a followup, and I think taking the explicit return type is wrong too.  We should make this match classic codegen now:
```
return RValue::get(emitBuiltinWithOneOverloadedType<1>(
        *this, E, Intrinsic::vector_reduce_xor, "rdx.xor"));
```

Do we know why the CIR version uses `convertType`?   Does the `convertType` actually change the vector type meaningfully? 

https://github.com/llvm/llvm-project/pull/201164