[clang] Adds matrix support to logarithm intrinsics (log, log10, log2). (PR #202455)
Dan Brown via cfe-commits
cfe-commits at lists.llvm.org
Fri Jun 12 21:15:06 PDT 2026
https://github.com/danbrown-amd updated https://github.com/llvm/llvm-project/pull/202455
>From d750370e9b96b08ee02a57e55fe465888a38f457 Mon Sep 17 00:00:00 2001
From: danbrown-amd <danbrown at amd.com>
Date: Mon, 8 Jun 2026 17:02:58 -0600
Subject: [PATCH] [HLSL] Add matrix support for float->float pure function
intrinsics Addresses #184507, #184508, #184509, #184492, #184495, #184496,
#184497, #184499, #184500, #184501, #184502, #184503, #184515, #184517,
#184518, #184519, #184520, #184521, #184522
Assisted-by: Claude Sonnet 4
---
clang/include/clang/Basic/HLSLIntrinsics.td | 19 --
clang/test/CodeGenHLSL/builtins/acos_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/asin_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/atan_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/ceil_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/cos_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/cosh_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/exp2_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/exp_mat.hlsl | 181 ++++++++++++++++++
.../test/CodeGenHLSL/builtins/floor_mat.hlsl | 181 ++++++++++++++++++
.../test/CodeGenHLSL/builtins/log10_mat.hlsl | 180 +++++++++++++++++
clang/test/CodeGenHLSL/builtins/log2_mat.hlsl | 180 +++++++++++++++++
clang/test/CodeGenHLSL/builtins/log_mat.hlsl | 180 +++++++++++++++++
.../test/CodeGenHLSL/builtins/round_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/sin_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/sinh_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/sqrt_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/tan_mat.hlsl | 181 ++++++++++++++++++
clang/test/CodeGenHLSL/builtins/tanh_mat.hlsl | 181 ++++++++++++++++++
.../test/CodeGenHLSL/builtins/trunc_mat.hlsl | 181 ++++++++++++++++++
20 files changed, 3436 insertions(+), 19 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/acos_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/asin_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/atan_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/ceil_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/cos_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/cosh_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/exp2_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/exp_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/floor_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/log10_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/log2_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/log_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/round_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/sin_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/sinh_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/sqrt_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/tan_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/tanh_mat.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/trunc_mat.hlsl
diff --git a/clang/include/clang/Basic/HLSLIntrinsics.td b/clang/include/clang/Basic/HLSLIntrinsics.td
index 6084a6f92180e..be9f6d3c32d83 100644
--- a/clang/include/clang/Basic/HLSLIntrinsics.td
+++ b/clang/include/clang/Basic/HLSLIntrinsics.td
@@ -349,7 +349,6 @@ def hlsl_acos : HLSLOneArgBuiltin<"acos", "__builtin_elementwise_acos"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Implements unsigned 64-bit integer addition using pairs of unsigned 32-bit
@@ -432,7 +431,6 @@ def hlsl_asin : HLSLOneArgBuiltin<"asin", "__builtin_elementwise_asin"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the arctangent of the input value, Val.
@@ -443,7 +441,6 @@ def hlsl_atan : HLSLOneArgBuiltin<"atan", "__builtin_elementwise_atan"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the arctangent of y/x, using the signs of the arguments to determine
@@ -469,7 +466,6 @@ the input value, \a Val.
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Checks whether the value is fully mapped.
@@ -524,7 +520,6 @@ def hlsl_cos : HLSLOneArgBuiltin<"cos", "__builtin_elementwise_cos"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the hyperbolic cosine of the input value, Val.
@@ -535,7 +530,6 @@ def hlsl_cosh : HLSLOneArgBuiltin<"cosh", "__builtin_elementwise_cosh"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the number of bits (per component) set in the input integer.
@@ -826,7 +820,6 @@ def hlsl_exp : HLSLOneArgBuiltin<"exp", "__builtin_elementwise_exp"> {
The return value is the base-e exponential of the \a x parameter.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the base 2 exponential, or 2**x, of the specified value.
@@ -839,7 +832,6 @@ def hlsl_exp2 : HLSLOneArgBuiltin<"exp2", "__builtin_elementwise_exp2"> {
The base 2 exponential of the \a x parameter.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the half value stored in the low 16 bits of the uint arg converted
@@ -934,7 +926,6 @@ value, \a Val.
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the floating-point remainder of x/y (scalar overloads).
@@ -1202,7 +1193,6 @@ If \a Val is negative, this result is undefined. If \a Val is 0, this
function returns negative infinity.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the base-10 logarithm of the input value, Val.
@@ -1216,7 +1206,6 @@ If \a Val is negative, this result is undefined. If \a Val is 0, this
function returns negative infinity.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the base-2 logarithm of the input value, Val.
@@ -1230,7 +1219,6 @@ If \a Val is negative, this result is undefined. If \a Val is 0, this
function returns negative infinity.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the result of M * A + B (multiply-add).
@@ -1457,7 +1445,6 @@ within a floating-point type. Halfway cases are
rounded to the nearest even value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the reciprocal of the square root of the specified value,
@@ -1509,7 +1496,6 @@ def hlsl_sin : HLSLOneArgBuiltin<"sin", "__builtin_elementwise_sin"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the hyperbolic sine of the input value, Val.
@@ -1520,7 +1506,6 @@ def hlsl_sinh : HLSLOneArgBuiltin<"sinh", "__builtin_elementwise_sinh"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns a smooth Hermite interpolation between 0 and 1.
@@ -1550,7 +1535,6 @@ def hlsl_sqrt : HLSLOneArgBuiltin<"sqrt", "__builtin_elementwise_sqrt"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns 1 if the x parameter is greater than or equal to the y parameter;
@@ -1577,7 +1561,6 @@ def hlsl_tan : HLSLOneArgBuiltin<"tan", "__builtin_elementwise_tan"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the hyperbolic tangent of the input value, Val.
@@ -1588,7 +1571,6 @@ def hlsl_tanh : HLSLOneArgBuiltin<"tanh", "__builtin_elementwise_tanh"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Returns the truncated integer value of the input value, Val.
@@ -1599,7 +1581,6 @@ def hlsl_trunc : HLSLOneArgBuiltin<"trunc", "__builtin_elementwise_trunc"> {
\param Val The input value.
}];
let VaryingTypes = [HalfTy, FloatTy];
- let VaryingMatDims = [];
}
// Evaluates a value for all active invocations in the group. The result is true
diff --git a/clang/test/CodeGenHLSL/builtins/acos_mat.hlsl b/clang/test/CodeGenHLSL/builtins/acos_mat.hlsl
new file mode 100644
index 0000000000000..e83f38f53a3b8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/acos_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_acos_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_acos_float1x2(float1x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_acos_float1x3(float1x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_acos_float1x4(float1x4 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_acos_float2x1(float2x1 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_acos_float2x2(float2x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.acos.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_acos_float2x3(float2x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.acos.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_acos_float2x4(float2x4 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_acos_float3x1(float3x1 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.acos.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_acos_float3x2(float3x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.acos.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_acos_float3x3(float3x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.acos.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_acos_float3x4(float3x4 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_acos_float4x1(float4x1 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.acos.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_acos_float4x2(float4x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.acos.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_acos_float4x3(float4x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.acos.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_acos_float4x4(float4x4 p0) { return acos(p0); }
+
+
+// CHECK-LABEL: test_acos_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.acos.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_acos_half1x2(half1x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.acos.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_acos_half1x3(half1x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.acos.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_acos_half1x4(half1x4 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.acos.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_acos_half2x1(half2x1 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.acos.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_acos_half2x2(half2x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.acos.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.acos.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_acos_half2x3(half2x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.acos.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.acos.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_acos_half2x4(half2x4 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.acos.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_acos_half3x1(half3x1 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.acos.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.acos.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_acos_half3x2(half3x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.acos.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.acos.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_acos_half3x3(half3x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.acos.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.acos.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_acos_half3x4(half3x4 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.acos.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_acos_half4x1(half4x1 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.acos.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.acos.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_acos_half4x2(half4x2 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.acos.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.acos.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_acos_half4x3(half4x3 p0) { return acos(p0); }
+
+// CHECK-LABEL: test_acos_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.acos.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.acos.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_acos_half4x4(half4x4 p0) { return acos(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/asin_mat.hlsl b/clang/test/CodeGenHLSL/builtins/asin_mat.hlsl
new file mode 100644
index 0000000000000..a453dcfec4860
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/asin_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_asin_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_asin_float1x2(float1x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_asin_float1x3(float1x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_asin_float1x4(float1x4 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_asin_float2x1(float2x1 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_asin_float2x2(float2x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.asin.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_asin_float2x3(float2x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.asin.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_asin_float2x4(float2x4 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_asin_float3x1(float3x1 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.asin.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_asin_float3x2(float3x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.asin.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_asin_float3x3(float3x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.asin.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_asin_float3x4(float3x4 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_asin_float4x1(float4x1 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.asin.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_asin_float4x2(float4x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.asin.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_asin_float4x3(float4x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.asin.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_asin_float4x4(float4x4 p0) { return asin(p0); }
+
+
+// CHECK-LABEL: test_asin_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.asin.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_asin_half1x2(half1x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.asin.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_asin_half1x3(half1x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.asin.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_asin_half1x4(half1x4 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.asin.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_asin_half2x1(half2x1 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.asin.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_asin_half2x2(half2x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.asin.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.asin.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_asin_half2x3(half2x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.asin.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.asin.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_asin_half2x4(half2x4 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.asin.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_asin_half3x1(half3x1 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.asin.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.asin.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_asin_half3x2(half3x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.asin.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.asin.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_asin_half3x3(half3x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.asin.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.asin.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_asin_half3x4(half3x4 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.asin.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_asin_half4x1(half4x1 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.asin.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.asin.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_asin_half4x2(half4x2 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.asin.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.asin.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_asin_half4x3(half4x3 p0) { return asin(p0); }
+
+// CHECK-LABEL: test_asin_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.asin.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.asin.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_asin_half4x4(half4x4 p0) { return asin(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/atan_mat.hlsl b/clang/test/CodeGenHLSL/builtins/atan_mat.hlsl
new file mode 100644
index 0000000000000..976e1d6c42d3e
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/atan_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_atan_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_atan_float1x2(float1x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_atan_float1x3(float1x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_atan_float1x4(float1x4 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_atan_float2x1(float2x1 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_atan_float2x2(float2x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.atan.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_atan_float2x3(float2x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.atan.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_atan_float2x4(float2x4 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_atan_float3x1(float3x1 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.atan.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_atan_float3x2(float3x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.atan.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_atan_float3x3(float3x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.atan.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_atan_float3x4(float3x4 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_atan_float4x1(float4x1 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.atan.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_atan_float4x2(float4x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.atan.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_atan_float4x3(float4x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.atan.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_atan_float4x4(float4x4 p0) { return atan(p0); }
+
+
+// CHECK-LABEL: test_atan_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.atan.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_atan_half1x2(half1x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.atan.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_atan_half1x3(half1x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.atan.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_atan_half1x4(half1x4 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.atan.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_atan_half2x1(half2x1 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.atan.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_atan_half2x2(half2x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.atan.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.atan.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_atan_half2x3(half2x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.atan.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.atan.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_atan_half2x4(half2x4 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.atan.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_atan_half3x1(half3x1 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.atan.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.atan.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_atan_half3x2(half3x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.atan.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.atan.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_atan_half3x3(half3x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.atan.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.atan.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_atan_half3x4(half3x4 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.atan.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_atan_half4x1(half4x1 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.atan.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.atan.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_atan_half4x2(half4x2 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.atan.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.atan.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_atan_half4x3(half4x3 p0) { return atan(p0); }
+
+// CHECK-LABEL: test_atan_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.atan.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.atan.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_atan_half4x4(half4x4 p0) { return atan(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/ceil_mat.hlsl b/clang/test/CodeGenHLSL/builtins/ceil_mat.hlsl
new file mode 100644
index 0000000000000..2ef55a6aaefce
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/ceil_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_ceil_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.ceil.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_ceil_float1x2(float1x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.ceil.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_ceil_float1x3(float1x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.ceil.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_ceil_float1x4(float1x4 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.ceil.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_ceil_float2x1(float2x1 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.ceil.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_ceil_float2x2(float2x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.ceil.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_ceil_float2x3(float2x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.ceil.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_ceil_float2x4(float2x4 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.ceil.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_ceil_float3x1(float3x1 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.ceil.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_ceil_float3x2(float3x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.ceil.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_ceil_float3x3(float3x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.ceil.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_ceil_float3x4(float3x4 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.ceil.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_ceil_float4x1(float4x1 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.ceil.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_ceil_float4x2(float4x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.ceil.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_ceil_float4x3(float4x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.ceil.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_ceil_float4x4(float4x4 p0) { return ceil(p0); }
+
+
+// CHECK-LABEL: test_ceil_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.ceil.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.ceil.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_ceil_half1x2(half1x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.ceil.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.ceil.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_ceil_half1x3(half1x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.ceil.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.ceil.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_ceil_half1x4(half1x4 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.ceil.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.ceil.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_ceil_half2x1(half2x1 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.ceil.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.ceil.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_ceil_half2x2(half2x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.ceil.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.ceil.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_ceil_half2x3(half2x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.ceil.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.ceil.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_ceil_half2x4(half2x4 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.ceil.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.ceil.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_ceil_half3x1(half3x1 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.ceil.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.ceil.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_ceil_half3x2(half3x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.ceil.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.ceil.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_ceil_half3x3(half3x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.ceil.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.ceil.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_ceil_half3x4(half3x4 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.ceil.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.ceil.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_ceil_half4x1(half4x1 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.ceil.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.ceil.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_ceil_half4x2(half4x2 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.ceil.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.ceil.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_ceil_half4x3(half4x3 p0) { return ceil(p0); }
+
+// CHECK-LABEL: test_ceil_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.ceil.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.ceil.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_ceil_half4x4(half4x4 p0) { return ceil(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/cos_mat.hlsl b/clang/test/CodeGenHLSL/builtins/cos_mat.hlsl
new file mode 100644
index 0000000000000..cf6154eb2d558
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/cos_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_cos_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cos.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_cos_float1x2(float1x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cos.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_cos_float1x3(float1x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cos.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_cos_float1x4(float1x4 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cos.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_cos_float2x1(float2x1 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cos.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_cos_float2x2(float2x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cos.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_cos_float2x3(float2x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cos.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_cos_float2x4(float2x4 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cos.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_cos_float3x1(float3x1 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cos.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_cos_float3x2(float3x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.cos.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_cos_float3x3(float3x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cos.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_cos_float3x4(float3x4 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cos.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_cos_float4x1(float4x1 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cos.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_cos_float4x2(float4x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cos.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_cos_float4x3(float4x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.cos.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_cos_float4x4(float4x4 p0) { return cos(p0); }
+
+
+// CHECK-LABEL: test_cos_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.cos.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cos.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_cos_half1x2(half1x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.cos.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cos.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_cos_half1x3(half1x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.cos.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cos.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_cos_half1x4(half1x4 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.cos.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cos.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_cos_half2x1(half2x1 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.cos.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cos.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_cos_half2x2(half2x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.cos.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cos.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_cos_half2x3(half2x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.cos.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cos.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_cos_half2x4(half2x4 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.cos.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cos.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_cos_half3x1(half3x1 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.cos.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cos.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_cos_half3x2(half3x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.cos.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.cos.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_cos_half3x3(half3x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.cos.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cos.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_cos_half3x4(half3x4 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.cos.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cos.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_cos_half4x1(half4x1 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.cos.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cos.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_cos_half4x2(half4x2 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.cos.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cos.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_cos_half4x3(half4x3 p0) { return cos(p0); }
+
+// CHECK-LABEL: test_cos_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.cos.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.cos.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_cos_half4x4(half4x4 p0) { return cos(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/cosh_mat.hlsl b/clang/test/CodeGenHLSL/builtins/cosh_mat.hlsl
new file mode 100644
index 0000000000000..d2810df6663b5
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/cosh_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_cosh_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cosh.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_cosh_float1x2(float1x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cosh.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_cosh_float1x3(float1x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cosh.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_cosh_float1x4(float1x4 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cosh.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_cosh_float2x1(float2x1 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cosh.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_cosh_float2x2(float2x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cosh.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_cosh_float2x3(float2x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cosh.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_cosh_float2x4(float2x4 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cosh.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_cosh_float3x1(float3x1 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cosh.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_cosh_float3x2(float3x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.cosh.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_cosh_float3x3(float3x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cosh.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_cosh_float3x4(float3x4 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cosh.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_cosh_float4x1(float4x1 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cosh.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_cosh_float4x2(float4x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cosh.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_cosh_float4x3(float4x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.cosh.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_cosh_float4x4(float4x4 p0) { return cosh(p0); }
+
+
+// CHECK-LABEL: test_cosh_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.cosh.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cosh.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_cosh_half1x2(half1x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.cosh.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cosh.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_cosh_half1x3(half1x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.cosh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cosh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_cosh_half1x4(half1x4 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.cosh.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.cosh.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_cosh_half2x1(half2x1 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.cosh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cosh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_cosh_half2x2(half2x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.cosh.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cosh.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_cosh_half2x3(half2x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.cosh.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cosh.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_cosh_half2x4(half2x4 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.cosh.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.cosh.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_cosh_half3x1(half3x1 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.cosh.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.cosh.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_cosh_half3x2(half3x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.cosh.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.cosh.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_cosh_half3x3(half3x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.cosh.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cosh.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_cosh_half3x4(half3x4 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.cosh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.cosh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_cosh_half4x1(half4x1 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.cosh.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.cosh.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_cosh_half4x2(half4x2 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.cosh.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.cosh.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_cosh_half4x3(half4x3 p0) { return cosh(p0); }
+
+// CHECK-LABEL: test_cosh_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.cosh.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.cosh.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_cosh_half4x4(half4x4 p0) { return cosh(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/exp2_mat.hlsl b/clang/test/CodeGenHLSL/builtins/exp2_mat.hlsl
new file mode 100644
index 0000000000000..8a93b85b5ac20
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/exp2_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_exp2_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp2.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_exp2_float1x2(float1x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp2.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_exp2_float1x3(float1x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp2.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_exp2_float1x4(float1x4 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp2.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_exp2_float2x1(float2x1 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp2.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_exp2_float2x2(float2x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp2.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_exp2_float2x3(float2x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp2.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_exp2_float2x4(float2x4 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp2.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_exp2_float3x1(float3x1 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp2.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_exp2_float3x2(float3x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.exp2.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_exp2_float3x3(float3x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp2.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_exp2_float3x4(float3x4 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp2.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_exp2_float4x1(float4x1 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp2.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_exp2_float4x2(float4x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp2.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_exp2_float4x3(float4x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.exp2.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_exp2_float4x4(float4x4 p0) { return exp2(p0); }
+
+
+// CHECK-LABEL: test_exp2_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.exp2.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp2.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_exp2_half1x2(half1x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.exp2.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp2.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_exp2_half1x3(half1x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.exp2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp2.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_exp2_half1x4(half1x4 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.exp2.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp2.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_exp2_half2x1(half2x1 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.exp2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp2.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_exp2_half2x2(half2x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.exp2.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp2.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_exp2_half2x3(half2x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.exp2.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp2.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_exp2_half2x4(half2x4 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.exp2.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp2.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_exp2_half3x1(half3x1 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.exp2.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp2.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_exp2_half3x2(half3x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.exp2.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.exp2.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_exp2_half3x3(half3x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.exp2.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp2.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_exp2_half3x4(half3x4 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.exp2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp2.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_exp2_half4x1(half4x1 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.exp2.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp2.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_exp2_half4x2(half4x2 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.exp2.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp2.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_exp2_half4x3(half4x3 p0) { return exp2(p0); }
+
+// CHECK-LABEL: test_exp2_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.exp2.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.exp2.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_exp2_half4x4(half4x4 p0) { return exp2(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/exp_mat.hlsl b/clang/test/CodeGenHLSL/builtins/exp_mat.hlsl
new file mode 100644
index 0000000000000..e46d43d2d43f0
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/exp_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_exp_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_exp_float1x2(float1x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_exp_float1x3(float1x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_exp_float1x4(float1x4 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_exp_float2x1(float2x1 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_exp_float2x2(float2x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_exp_float2x3(float2x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_exp_float2x4(float2x4 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_exp_float3x1(float3x1 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_exp_float3x2(float3x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.exp.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_exp_float3x3(float3x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_exp_float3x4(float3x4 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_exp_float4x1(float4x1 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_exp_float4x2(float4x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_exp_float4x3(float4x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.exp.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_exp_float4x4(float4x4 p0) { return exp(p0); }
+
+
+// CHECK-LABEL: test_exp_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.exp.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_exp_half1x2(half1x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.exp.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_exp_half1x3(half1x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.exp.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_exp_half1x4(half1x4 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.exp.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.exp.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_exp_half2x1(half2x1 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.exp.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_exp_half2x2(half2x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.exp.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_exp_half2x3(half2x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.exp.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_exp_half2x4(half2x4 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.exp.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.exp.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_exp_half3x1(half3x1 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.exp.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.exp.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_exp_half3x2(half3x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.exp.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.exp.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_exp_half3x3(half3x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.exp.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_exp_half3x4(half3x4 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.exp.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.exp.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_exp_half4x1(half4x1 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.exp.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.exp.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_exp_half4x2(half4x2 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.exp.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.exp.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_exp_half4x3(half4x3 p0) { return exp(p0); }
+
+// CHECK-LABEL: test_exp_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.exp.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.exp.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_exp_half4x4(half4x4 p0) { return exp(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/floor_mat.hlsl b/clang/test/CodeGenHLSL/builtins/floor_mat.hlsl
new file mode 100644
index 0000000000000..d3f8009549246
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/floor_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_floor_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.floor.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_floor_float1x2(float1x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.floor.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_floor_float1x3(float1x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.floor.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_floor_float1x4(float1x4 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.floor.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_floor_float2x1(float2x1 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.floor.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_floor_float2x2(float2x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.floor.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_floor_float2x3(float2x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.floor.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_floor_float2x4(float2x4 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.floor.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_floor_float3x1(float3x1 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.floor.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_floor_float3x2(float3x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.floor.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_floor_float3x3(float3x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.floor.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_floor_float3x4(float3x4 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.floor.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_floor_float4x1(float4x1 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.floor.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_floor_float4x2(float4x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.floor.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_floor_float4x3(float4x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.floor.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_floor_float4x4(float4x4 p0) { return floor(p0); }
+
+
+// CHECK-LABEL: test_floor_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.floor.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.floor.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_floor_half1x2(half1x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.floor.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.floor.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_floor_half1x3(half1x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.floor.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.floor.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_floor_half1x4(half1x4 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.floor.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.floor.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_floor_half2x1(half2x1 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.floor.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.floor.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_floor_half2x2(half2x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.floor.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.floor.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_floor_half2x3(half2x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.floor.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.floor.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_floor_half2x4(half2x4 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.floor.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.floor.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_floor_half3x1(half3x1 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.floor.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.floor.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_floor_half3x2(half3x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.floor.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.floor.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_floor_half3x3(half3x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.floor.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.floor.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_floor_half3x4(half3x4 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.floor.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.floor.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_floor_half4x1(half4x1 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.floor.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.floor.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_floor_half4x2(half4x2 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.floor.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.floor.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_floor_half4x3(half4x3 p0) { return floor(p0); }
+
+// CHECK-LABEL: test_floor_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.floor.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.floor.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_floor_half4x4(half4x4 p0) { return floor(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/log10_mat.hlsl b/clang/test/CodeGenHLSL/builtins/log10_mat.hlsl
new file mode 100644
index 0000000000000..3efaf62d8cc82
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/log10_mat.hlsl
@@ -0,0 +1,180 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_log10_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log10.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_log10_float1x2(float1x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log10.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_log10_float1x3(float1x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log10.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_log10_float1x4(float1x4 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log10.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_log10_float2x1(float2x1 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log10.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_log10_float2x2(float2x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log10.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_log10_float2x3(float2x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log10.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_log10_float2x4(float2x4 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log10.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_log10_float3x1(float3x1 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log10.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_log10_float3x2(float3x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.log10.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_log10_float3x3(float3x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log10.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_log10_float3x4(float3x4 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log10.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_log10_float4x1(float4x1 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log10.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_log10_float4x2(float4x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log10.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_log10_float4x3(float4x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.log10.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_log10_float4x4(float4x4 p0) { return log10(p0); }
+
+
+// CHECK-LABEL: test_log10_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.log10.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log10.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_log10_half1x2(half1x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.log10.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log10.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_log10_half1x3(half1x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log10.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log10.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_log10_half1x4(half1x4 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.log10.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log10.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_log10_half2x1(half2x1 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log10.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log10.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_log10_half2x2(half2x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.log10.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log10.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_log10_half2x3(half2x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.log10.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log10.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_log10_half2x4(half2x4 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.log10.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log10.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_log10_half3x1(half3x1 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.log10.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log10.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_log10_half3x2(half3x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.log10.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.log10.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_log10_half3x3(half3x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.log10.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log10.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_log10_half3x4(half3x4 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log10.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log10.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_log10_half4x1(half4x1 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.log10.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log10.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_log10_half4x2(half4x2 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.log10.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log10.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_log10_half4x3(half4x3 p0) { return log10(p0); }
+
+// CHECK-LABEL: test_log10_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.log10.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.log10.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_log10_half4x4(half4x4 p0) { return log10(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/log2_mat.hlsl b/clang/test/CodeGenHLSL/builtins/log2_mat.hlsl
new file mode 100644
index 0000000000000..6ad4bde95e8f7
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/log2_mat.hlsl
@@ -0,0 +1,180 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_log2_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log2.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_log2_float1x2(float1x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log2.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_log2_float1x3(float1x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log2.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_log2_float1x4(float1x4 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log2.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_log2_float2x1(float2x1 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log2.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_log2_float2x2(float2x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log2.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_log2_float2x3(float2x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log2.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_log2_float2x4(float2x4 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log2.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_log2_float3x1(float3x1 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log2.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_log2_float3x2(float3x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.log2.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_log2_float3x3(float3x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log2.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_log2_float3x4(float3x4 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log2.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_log2_float4x1(float4x1 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log2.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_log2_float4x2(float4x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log2.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_log2_float4x3(float4x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.log2.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_log2_float4x4(float4x4 p0) { return log2(p0); }
+
+
+// CHECK-LABEL: test_log2_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.log2.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log2.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_log2_half1x2(half1x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.log2.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log2.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_log2_half1x3(half1x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log2.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_log2_half1x4(half1x4 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.log2.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log2.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_log2_half2x1(half2x1 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log2.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_log2_half2x2(half2x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.log2.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log2.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_log2_half2x3(half2x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.log2.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log2.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_log2_half2x4(half2x4 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.log2.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log2.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_log2_half3x1(half3x1 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.log2.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log2.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_log2_half3x2(half3x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.log2.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.log2.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_log2_half3x3(half3x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.log2.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log2.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_log2_half3x4(half3x4 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log2.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_log2_half4x1(half4x1 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.log2.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log2.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_log2_half4x2(half4x2 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.log2.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log2.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_log2_half4x3(half4x3 p0) { return log2(p0); }
+
+// CHECK-LABEL: test_log2_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.log2.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.log2.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_log2_half4x4(half4x4 p0) { return log2(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/log_mat.hlsl b/clang/test/CodeGenHLSL/builtins/log_mat.hlsl
new file mode 100644
index 0000000000000..859672944945a
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/log_mat.hlsl
@@ -0,0 +1,180 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_log_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_log_float1x2(float1x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_log_float1x3(float1x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_log_float1x4(float1x4 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_log_float2x1(float2x1 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_log_float2x2(float2x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_log_float2x3(float2x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_log_float2x4(float2x4 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_log_float3x1(float3x1 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_log_float3x2(float3x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.log.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_log_float3x3(float3x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_log_float3x4(float3x4 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_log_float4x1(float4x1 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_log_float4x2(float4x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_log_float4x3(float4x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.log.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_log_float4x4(float4x4 p0) { return log(p0); }
+
+
+// CHECK-LABEL: test_log_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.log.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_log_half1x2(half1x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.log.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_log_half1x3(half1x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_log_half1x4(half1x4 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.log.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_log_half2x1(half2x1 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_log_half2x2(half2x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.log.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_log_half2x3(half2x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.log.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_log_half2x4(half2x4 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.log.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.log.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_log_half3x1(half3x1 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.log.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.log.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_log_half3x2(half3x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.log.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.log.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_log_half3x3(half3x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.log.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_log_half3x4(half3x4 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.log.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.log.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_log_half4x1(half4x1 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.log.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.log.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_log_half4x2(half4x2 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.log.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.log.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_log_half4x3(half4x3 p0) { return log(p0); }
+
+// CHECK-LABEL: test_log_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.log.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.log.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_log_half4x4(half4x4 p0) { return log(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/round_mat.hlsl b/clang/test/CodeGenHLSL/builtins/round_mat.hlsl
new file mode 100644
index 0000000000000..99b8426fb125f
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/round_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_round_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.roundeven.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_round_float1x2(float1x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.roundeven.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_round_float1x3(float1x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.roundeven.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_round_float1x4(float1x4 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.roundeven.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_round_float2x1(float2x1 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.roundeven.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_round_float2x2(float2x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.roundeven.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_round_float2x3(float2x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.roundeven.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_round_float2x4(float2x4 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.roundeven.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_round_float3x1(float3x1 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.roundeven.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_round_float3x2(float3x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.roundeven.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_round_float3x3(float3x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.roundeven.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_round_float3x4(float3x4 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.roundeven.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_round_float4x1(float4x1 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.roundeven.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_round_float4x2(float4x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.roundeven.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_round_float4x3(float4x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.roundeven.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_round_float4x4(float4x4 p0) { return round(p0); }
+
+
+// CHECK-LABEL: test_round_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.roundeven.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.roundeven.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_round_half1x2(half1x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.roundeven.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.roundeven.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_round_half1x3(half1x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.roundeven.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.roundeven.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_round_half1x4(half1x4 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.roundeven.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.roundeven.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_round_half2x1(half2x1 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.roundeven.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.roundeven.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_round_half2x2(half2x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.roundeven.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.roundeven.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_round_half2x3(half2x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.roundeven.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.roundeven.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_round_half2x4(half2x4 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.roundeven.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.roundeven.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_round_half3x1(half3x1 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.roundeven.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.roundeven.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_round_half3x2(half3x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.roundeven.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.roundeven.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_round_half3x3(half3x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.roundeven.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.roundeven.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_round_half3x4(half3x4 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.roundeven.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.roundeven.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_round_half4x1(half4x1 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.roundeven.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.roundeven.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_round_half4x2(half4x2 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.roundeven.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.roundeven.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_round_half4x3(half4x3 p0) { return round(p0); }
+
+// CHECK-LABEL: test_round_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.roundeven.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.roundeven.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_round_half4x4(half4x4 p0) { return round(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/sin_mat.hlsl b/clang/test/CodeGenHLSL/builtins/sin_mat.hlsl
new file mode 100644
index 0000000000000..012a30616eb20
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/sin_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_sin_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sin.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_sin_float1x2(float1x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sin.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_sin_float1x3(float1x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sin.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_sin_float1x4(float1x4 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sin.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_sin_float2x1(float2x1 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sin.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_sin_float2x2(float2x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sin.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_sin_float2x3(float2x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sin.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_sin_float2x4(float2x4 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sin.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_sin_float3x1(float3x1 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sin.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_sin_float3x2(float3x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.sin.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_sin_float3x3(float3x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sin.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_sin_float3x4(float3x4 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sin.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_sin_float4x1(float4x1 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sin.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_sin_float4x2(float4x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sin.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_sin_float4x3(float4x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.sin.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_sin_float4x4(float4x4 p0) { return sin(p0); }
+
+
+// CHECK-LABEL: test_sin_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.sin.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sin.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_sin_half1x2(half1x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.sin.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sin.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_sin_half1x3(half1x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sin.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sin.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_sin_half1x4(half1x4 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.sin.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sin.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_sin_half2x1(half2x1 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sin.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sin.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_sin_half2x2(half2x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.sin.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sin.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_sin_half2x3(half2x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.sin.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sin.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_sin_half2x4(half2x4 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.sin.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sin.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_sin_half3x1(half3x1 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.sin.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sin.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_sin_half3x2(half3x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.sin.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.sin.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_sin_half3x3(half3x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.sin.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sin.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_sin_half3x4(half3x4 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sin.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sin.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_sin_half4x1(half4x1 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.sin.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sin.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_sin_half4x2(half4x2 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.sin.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sin.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_sin_half4x3(half4x3 p0) { return sin(p0); }
+
+// CHECK-LABEL: test_sin_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.sin.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.sin.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_sin_half4x4(half4x4 p0) { return sin(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/sinh_mat.hlsl b/clang/test/CodeGenHLSL/builtins/sinh_mat.hlsl
new file mode 100644
index 0000000000000..8583fcbe0b57c
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/sinh_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_sinh_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sinh.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_sinh_float1x2(float1x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sinh.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_sinh_float1x3(float1x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sinh.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_sinh_float1x4(float1x4 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sinh.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_sinh_float2x1(float2x1 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sinh.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_sinh_float2x2(float2x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sinh.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_sinh_float2x3(float2x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sinh.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_sinh_float2x4(float2x4 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sinh.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_sinh_float3x1(float3x1 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sinh.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_sinh_float3x2(float3x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.sinh.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_sinh_float3x3(float3x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sinh.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_sinh_float3x4(float3x4 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sinh.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_sinh_float4x1(float4x1 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sinh.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_sinh_float4x2(float4x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sinh.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_sinh_float4x3(float4x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.sinh.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_sinh_float4x4(float4x4 p0) { return sinh(p0); }
+
+
+// CHECK-LABEL: test_sinh_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.sinh.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sinh.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_sinh_half1x2(half1x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.sinh.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sinh.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_sinh_half1x3(half1x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sinh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sinh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_sinh_half1x4(half1x4 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.sinh.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sinh.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_sinh_half2x1(half2x1 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sinh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sinh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_sinh_half2x2(half2x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.sinh.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sinh.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_sinh_half2x3(half2x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.sinh.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sinh.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_sinh_half2x4(half2x4 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.sinh.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sinh.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_sinh_half3x1(half3x1 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.sinh.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sinh.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_sinh_half3x2(half3x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.sinh.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.sinh.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_sinh_half3x3(half3x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.sinh.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sinh.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_sinh_half3x4(half3x4 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sinh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sinh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_sinh_half4x1(half4x1 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.sinh.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sinh.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_sinh_half4x2(half4x2 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.sinh.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sinh.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_sinh_half4x3(half4x3 p0) { return sinh(p0); }
+
+// CHECK-LABEL: test_sinh_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.sinh.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.sinh.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_sinh_half4x4(half4x4 p0) { return sinh(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/sqrt_mat.hlsl b/clang/test/CodeGenHLSL/builtins/sqrt_mat.hlsl
new file mode 100644
index 0000000000000..efb8cfdf322c0
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/sqrt_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_sqrt_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sqrt.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_sqrt_float1x2(float1x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sqrt.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_sqrt_float1x3(float1x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sqrt.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_sqrt_float1x4(float1x4 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sqrt.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_sqrt_float2x1(float2x1 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sqrt.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_sqrt_float2x2(float2x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sqrt.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_sqrt_float2x3(float2x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sqrt.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_sqrt_float2x4(float2x4 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sqrt.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_sqrt_float3x1(float3x1 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sqrt.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_sqrt_float3x2(float3x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.sqrt.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_sqrt_float3x3(float3x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sqrt.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_sqrt_float3x4(float3x4 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sqrt.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_sqrt_float4x1(float4x1 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sqrt.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_sqrt_float4x2(float4x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sqrt.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_sqrt_float4x3(float4x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.sqrt.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_sqrt_float4x4(float4x4 p0) { return sqrt(p0); }
+
+
+// CHECK-LABEL: test_sqrt_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.sqrt.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sqrt.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_sqrt_half1x2(half1x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.sqrt.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sqrt.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_sqrt_half1x3(half1x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sqrt.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sqrt.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_sqrt_half1x4(half1x4 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.sqrt.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.sqrt.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_sqrt_half2x1(half2x1 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sqrt.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sqrt.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_sqrt_half2x2(half2x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.sqrt.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sqrt.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_sqrt_half2x3(half2x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.sqrt.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sqrt.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_sqrt_half2x4(half2x4 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.sqrt.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.sqrt.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_sqrt_half3x1(half3x1 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.sqrt.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.sqrt.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_sqrt_half3x2(half3x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.sqrt.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.sqrt.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_sqrt_half3x3(half3x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.sqrt.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sqrt.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_sqrt_half3x4(half3x4 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.sqrt.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.sqrt.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_sqrt_half4x1(half4x1 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.sqrt.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.sqrt.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_sqrt_half4x2(half4x2 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.sqrt.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.sqrt.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_sqrt_half4x3(half4x3 p0) { return sqrt(p0); }
+
+// CHECK-LABEL: test_sqrt_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.sqrt.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.sqrt.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_sqrt_half4x4(half4x4 p0) { return sqrt(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/tan_mat.hlsl b/clang/test/CodeGenHLSL/builtins/tan_mat.hlsl
new file mode 100644
index 0000000000000..b2023b060beba
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/tan_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_tan_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tan.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_tan_float1x2(float1x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tan.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_tan_float1x3(float1x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tan.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_tan_float1x4(float1x4 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tan.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_tan_float2x1(float2x1 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tan.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_tan_float2x2(float2x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tan.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_tan_float2x3(float2x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tan.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_tan_float2x4(float2x4 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tan.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_tan_float3x1(float3x1 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tan.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_tan_float3x2(float3x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.tan.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_tan_float3x3(float3x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tan.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_tan_float3x4(float3x4 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tan.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_tan_float4x1(float4x1 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tan.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_tan_float4x2(float4x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tan.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_tan_float4x3(float4x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.tan.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_tan_float4x4(float4x4 p0) { return tan(p0); }
+
+
+// CHECK-LABEL: test_tan_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.tan.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tan.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_tan_half1x2(half1x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.tan.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tan.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_tan_half1x3(half1x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.tan.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tan.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_tan_half1x4(half1x4 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.tan.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tan.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_tan_half2x1(half2x1 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.tan.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tan.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_tan_half2x2(half2x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.tan.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tan.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_tan_half2x3(half2x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.tan.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tan.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_tan_half2x4(half2x4 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.tan.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tan.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_tan_half3x1(half3x1 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.tan.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tan.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_tan_half3x2(half3x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.tan.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.tan.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_tan_half3x3(half3x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.tan.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tan.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_tan_half3x4(half3x4 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.tan.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tan.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_tan_half4x1(half4x1 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.tan.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tan.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_tan_half4x2(half4x2 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.tan.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tan.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_tan_half4x3(half4x3 p0) { return tan(p0); }
+
+// CHECK-LABEL: test_tan_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.tan.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.tan.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_tan_half4x4(half4x4 p0) { return tan(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/tanh_mat.hlsl b/clang/test/CodeGenHLSL/builtins/tanh_mat.hlsl
new file mode 100644
index 0000000000000..542f4d9ff2613
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/tanh_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_tanh_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tanh.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_tanh_float1x2(float1x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tanh.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_tanh_float1x3(float1x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tanh.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_tanh_float1x4(float1x4 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tanh.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_tanh_float2x1(float2x1 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tanh.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_tanh_float2x2(float2x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tanh.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_tanh_float2x3(float2x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tanh.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_tanh_float2x4(float2x4 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tanh.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_tanh_float3x1(float3x1 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tanh.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_tanh_float3x2(float3x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.tanh.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_tanh_float3x3(float3x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tanh.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_tanh_float3x4(float3x4 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tanh.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_tanh_float4x1(float4x1 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tanh.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_tanh_float4x2(float4x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tanh.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_tanh_float4x3(float4x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.tanh.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_tanh_float4x4(float4x4 p0) { return tanh(p0); }
+
+
+// CHECK-LABEL: test_tanh_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.tanh.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tanh.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_tanh_half1x2(half1x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.tanh.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tanh.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_tanh_half1x3(half1x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.tanh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tanh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_tanh_half1x4(half1x4 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.tanh.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.tanh.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_tanh_half2x1(half2x1 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.tanh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tanh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_tanh_half2x2(half2x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.tanh.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tanh.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_tanh_half2x3(half2x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.tanh.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tanh.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_tanh_half2x4(half2x4 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.tanh.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.tanh.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_tanh_half3x1(half3x1 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.tanh.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.tanh.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_tanh_half3x2(half3x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.tanh.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.tanh.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_tanh_half3x3(half3x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.tanh.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tanh.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_tanh_half3x4(half3x4 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.tanh.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.tanh.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_tanh_half4x1(half4x1 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.tanh.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.tanh.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_tanh_half4x2(half4x2 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.tanh.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.tanh.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_tanh_half4x3(half4x3 p0) { return tanh(p0); }
+
+// CHECK-LABEL: test_tanh_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.tanh.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.tanh.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_tanh_half4x4(half4x4 p0) { return tanh(p0); }
+
diff --git a/clang/test/CodeGenHLSL/builtins/trunc_mat.hlsl b/clang/test/CodeGenHLSL/builtins/trunc_mat.hlsl
new file mode 100644
index 0000000000000..5d863d3fec45c
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/trunc_mat.hlsl
@@ -0,0 +1,181 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_trunc_float1x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.trunc.v2f32
+// CHECK: ret <2 x float>
+float1x2 test_trunc_float1x2(float1x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float1x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.trunc.v3f32
+// CHECK: ret <3 x float>
+float1x3 test_trunc_float1x3(float1x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float1x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.trunc.v4f32
+// CHECK: ret <4 x float>
+float1x4 test_trunc_float1x4(float1x4 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float2x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.trunc.v2f32
+// CHECK: ret <2 x float>
+float2x1 test_trunc_float2x1(float2x1 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float2x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.trunc.v4f32
+// CHECK: ret <4 x float>
+float2x2 test_trunc_float2x2(float2x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float2x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.trunc.v6f32
+// CHECK: ret <6 x float>
+float2x3 test_trunc_float2x3(float2x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float2x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.trunc.v8f32
+// CHECK: ret <8 x float>
+float2x4 test_trunc_float2x4(float2x4 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float3x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.trunc.v3f32
+// CHECK: ret <3 x float>
+float3x1 test_trunc_float3x1(float3x1 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float3x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.trunc.v6f32
+// CHECK: ret <6 x float>
+float3x2 test_trunc_float3x2(float3x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float3x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.trunc.v9f32
+// CHECK: ret <9 x float>
+float3x3 test_trunc_float3x3(float3x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float3x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.trunc.v12f32
+// CHECK: ret <12 x float>
+float3x4 test_trunc_float3x4(float3x4 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float4x1
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.trunc.v4f32
+// CHECK: ret <4 x float>
+float4x1 test_trunc_float4x1(float4x1 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float4x2
+// CHECK: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.trunc.v8f32
+// CHECK: ret <8 x float>
+float4x2 test_trunc_float4x2(float4x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float4x3
+// CHECK: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.trunc.v12f32
+// CHECK: ret <12 x float>
+float4x3 test_trunc_float4x3(float4x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_float4x4
+// CHECK: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.trunc.v16f32
+// CHECK: ret <16 x float>
+float4x4 test_trunc_float4x4(float4x4 p0) { return trunc(p0); }
+
+
+// CHECK-LABEL: test_trunc_half1x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.trunc.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.trunc.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half1x2 test_trunc_half1x2(half1x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half1x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.trunc.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.trunc.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half1x3 test_trunc_half1x3(half1x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half1x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.trunc.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.trunc.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half1x4 test_trunc_half1x4(half1x4 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half2x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.trunc.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.trunc.v2f32
+// CHECK: ret <2 x {{half|float}}>
+half2x1 test_trunc_half2x1(half2x1 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half2x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.trunc.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.trunc.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half2x2 test_trunc_half2x2(half2x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half2x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.trunc.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.trunc.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half2x3 test_trunc_half2x3(half2x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half2x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.trunc.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.trunc.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half2x4 test_trunc_half2x4(half2x4 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half3x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.trunc.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.trunc.v3f32
+// CHECK: ret <3 x {{half|float}}>
+half3x1 test_trunc_half3x1(half3x1 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half3x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <6 x half> @llvm.trunc.v6f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <6 x float> @llvm.trunc.v6f32
+// CHECK: ret <6 x {{half|float}}>
+half3x2 test_trunc_half3x2(half3x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half3x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <9 x half> @llvm.trunc.v9f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <9 x float> @llvm.trunc.v9f32
+// CHECK: ret <9 x {{half|float}}>
+half3x3 test_trunc_half3x3(half3x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half3x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.trunc.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.trunc.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half3x4 test_trunc_half3x4(half3x4 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half4x1
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.trunc.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.trunc.v4f32
+// CHECK: ret <4 x {{half|float}}>
+half4x1 test_trunc_half4x1(half4x1 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half4x2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <8 x half> @llvm.trunc.v8f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <8 x float> @llvm.trunc.v8f32
+// CHECK: ret <8 x {{half|float}}>
+half4x2 test_trunc_half4x2(half4x2 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half4x3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <12 x half> @llvm.trunc.v12f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <12 x float> @llvm.trunc.v12f32
+// CHECK: ret <12 x {{half|float}}>
+half4x3 test_trunc_half4x3(half4x3 p0) { return trunc(p0); }
+
+// CHECK-LABEL: test_trunc_half4x4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <16 x half> @llvm.trunc.v16f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <16 x float> @llvm.trunc.v16f32
+// CHECK: ret <16 x {{half|float}}>
+half4x4 test_trunc_half4x4(half4x4 p0) { return trunc(p0); }
+
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