[clang] [CIR][RISCV] Support vector builtins codegen (PR #199889)

Pengcheng Wang via cfe-commits cfe-commits at lists.llvm.org
Tue Jun 9 20:07:55 PDT 2026

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@@ -0,0 +1,2299 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
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wangpc-pp wrote:

Great! I am OK with combined tests.

https://github.com/llvm/llvm-project/pull/199889

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