[clang] [CIR] Implement Unary inc for VectorType of int (PR #202707)
Amr Hesham via cfe-commits
cfe-commits at lists.llvm.org
Tue Jun 9 11:53:16 PDT 2026
https://github.com/AmrDeveloper updated https://github.com/llvm/llvm-project/pull/202707
>From 7f92f0100d376eaa05369c6f6da65b7abe600d98 Mon Sep 17 00:00:00 2001
From: Amr Hesham <amr96 at programmer.net>
Date: Tue, 9 Jun 2026 18:35:27 +0200
Subject: [PATCH] [CIR] Implement Unary inc for VectorType of int
---
clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 18 ++++++++---
clang/test/CIR/CodeGenOpenCL/vector.cl | 36 ++++++++++++++++++++++
2 files changed, 49 insertions(+), 5 deletions(-)
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index d8b7fa062b845..8448fb98417cd 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -614,6 +614,8 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> {
mlir::Value value;
mlir::Value input;
+ mlir::Location loc = cgf.getLoc(e->getSourceRange());
+ int amount = e->isIncrementOp() ? 1 : -1;
if (type->getAs<AtomicType>()) {
cgf.cgm.errorNYI(e->getSourceRange(), "Atomic inc/dec");
@@ -683,16 +685,22 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> {
value = cgf.getBuilder().createPtrStride(loc, value, numElts);
} else {
// For everything else, we can just do a simple increment.
- mlir::Location loc = cgf.getLoc(e->getSourceRange());
- CIRGenBuilderTy &builder = cgf.getBuilder();
- int amount = e->isIncrementOp() ? 1 : -1;
mlir::Value amt = builder.getSInt32(amount, loc);
assert(!cir::MissingFeatures::sanitizers());
value = builder.createPtrStride(loc, value, amt);
}
} else if (type->isVectorType()) {
- cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec vector");
- return {};
+ if (type->hasIntegerRepresentation()) {
+ mlir::Type vecElemTy =
+ mlir::cast<cir::VectorType>(value.getType()).getElementType();
+ cir::ConstantOp constAmt = builder.getConstInt(loc, vecElemTy, amount);
+ auto amtVec =
+ cir::VecSplatOp::create(builder, loc, value.getType(), constAmt);
+ value = builder.createAdd(loc, value, amtVec);
+ } else {
+ cgf.cgm.errorNYI(e->getSourceRange(), "Unary inc/dec vector of float");
+ return {};
+ }
} else if (type->isRealFloatingType()) {
CIRGenFunction::CIRGenFPOptionsRAII FPOptsRAII(cgf, e);
diff --git a/clang/test/CIR/CodeGenOpenCL/vector.cl b/clang/test/CIR/CodeGenOpenCL/vector.cl
index 34183fcffabf8..a99e8820bbc38 100644
--- a/clang/test/CIR/CodeGenOpenCL/vector.cl
+++ b/clang/test/CIR/CodeGenOpenCL/vector.cl
@@ -70,3 +70,39 @@ float4 vec_ternary_f4(int4 c, float4 a, float4 b) {
// LLVM: %[[IS_NEG:.*]] = icmp slt <4 x i32> %[[COND:.*]], zeroinitializer
// LLVM: %[[RESULT:.*]] = select <4 x i1> %[[IS_NEG]], <4 x float> %[[A:.*]], <4 x float> %[[B:.*]]
// LLVM: ret <4 x float> %[[RESULT]]
+
+int4 vec_unary_inc(int4 a) {
+ ++a;
+ return a;
+}
+
+// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a", init]
+// CIR: %[[RET_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["__retval"]
+// CIR: cir.store %{{.*}}, %[[A_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
+// CIR: %[[CONST_1_VEC:.*]] = cir.const #cir.const_vector<[#cir.int<1> : !s32i, #cir.int<1> : !s32i, #cir.int<1> : !s32i, #cir.int<1> : !s32i]> : !cir.vector<4 x !s32i>
+// CIR: %[[VEC_INC:.*]] = cir.add %[[TMP_A]], %[[CONST_1_VEC]] : !cir.vector<4 x !s32i>
+// CIR: cir.store {{.*}} %[[VEC_INC]], %[[A_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[RESULT:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
+// CIR: cir.store %[[RESULT]], %[[RET_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+
+// LLVM: %[[VEC_INC:.*]] = add <4 x i32> %[[A:.*]], splat (i32 1)
+// LLVM: ret <4 x i32> %[[VEC_INC]]
+
+int4 vec_unary_dec(int4 a) {
+ --a;
+ return a;
+}
+
+// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a", init]
+// CIR: %[[RET_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["__retval"]
+// CIR: cir.store %{{.*}}, %[[A_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
+// CIR: %[[CONST_N1_VEC:.*]] = cir.const #cir.const_vector<[#cir.int<-1> : !s32i, #cir.int<-1> : !s32i, #cir.int<-1> : !s32i, #cir.int<-1> : !s32i]> : !cir.vector<4 x !s32i>
+// CIR: %[[VEC_DEC:.*]] = cir.add %[[TMP_A]], %[[CONST_N1_VEC]] : !cir.vector<4 x !s32i>
+// CIR: cir.store {{.*}} %[[VEC_DEC]], %[[A_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[RESULT:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
+// CIR: cir.store %[[RESULT]], %[[RET_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+
+// LLVM: %[[VEC_DEC:.*]] = add <4 x i32> %[[A:.*]], splat (i32 -1)
+// LLVM: ret <4 x i32> %[[VEC_DEC]]
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