[clang-tools-extra] [compiler-rt] [llvm] [AMDGPU] Enable WMMA256bInsts + Wave32 for gfx1200/gfx1201 + SISchedule + TargetParser + Virtual FP4/MXFP4 (PR #201810)

via cfe-commits cfe-commits at lists.llvm.org
Sat Jun 6 07:54:39 PDT 2026


clearnature wrote:

@krzysz00 @searlmc1 The virtual FP4 types were originally submitted as part of ROCm/rocm-libraries#8061. That PR was closed with the instruction:

> "I would advise you to reopen such a PR against upstream LLVM if you believe it is relevant there."

— Torrezuk (rocBLAS maintainer)

So we are now caught in a circular dependency:

```
rocWMMA says → "submit to LLVM"
LLVM says    → "submit to rocWMMA"
```

The FP4 types (`VirtualFp4Hw.h`, etc.) define numerical format representations (E2M1/E3M0/Q16) that are used by the WMMA/SWMMAC instruction lowering in the AMDGPU backend. They are infrastructure headers, not application code.

**Request for direction:** Please clarify where these FP4 type definitions should live:
- `lib/Support/` (LLVM infrastructure, alongside APFloat)
- `lib/Target/AMDGPU/` (backend-only)
- Some other location you recommend

I will move them wherever you direct. The rest of this PR (WMMA256bInsts, SISchedule, TargetParser) is backend-only and uncontroversial.

https://github.com/llvm/llvm-project/pull/201810


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