[clang] [llvm] [RISCV] Add partial support for -fzero-call-used-regs (PR #194883)

[Sam Elliott via cfe-commits]

================
@@ -819,6 +819,17 @@ Register RISCVRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
   return TFI->hasFP(MF) ? RISCV::X8 : RISCV::X2;
 }
 
+bool RISCVRegisterInfo::isArgumentRegister(const MachineFunction &MF,
+                                           MCRegister Reg) const {
+  auto const &STI = MF.getSubtarget<RISCVSubtarget>();
+  if (!STI.getRegisterInfo()->isGeneralPurposeRegister(MF, Reg))
+    llvm::report_fatal_error(
+        "isArgumentRegister is not implemented for non-GPR registers");
+
+  return llvm::any_of(RISCV::getArgGPRs(STI.getTargetABI()),
+                      [&](MCPhysReg R) { return Reg == R; });
----------------
lenary wrote:

```suggestion
  return llvm::is_contained(RISCV::getArgGPRs(STI.getTargetABI()), Reg);
```

https://github.com/llvm/llvm-project/pull/194883