[clang] 6530683 - [CIR] Maximum across vector (IEEE754) (#199779)
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Thu Jun 4 07:49:23 PDT 2026
Author: Kartik Ohlan
Date: 2026-06-04T15:49:18+01:00
New Revision: 6530683b31d8b9a3cb7e04eae7c59abeb223faae
URL: https://github.com/llvm/llvm-project/commit/6530683b31d8b9a3cb7e04eae7c59abeb223faae
DIFF: https://github.com/llvm/llvm-project/commit/6530683b31d8b9a3cb7e04eae7c59abeb223faae.diff
LOG: [CIR] Maximum across vector (IEEE754) (#199779)
Part of https://github.com/llvm/llvm-project/issues/185382
Move the test cases to
[intrinsics.c](https://github.com/llvm/llvmproject/pull/clang/test/CodeGen/AArch64/neon/intrinsics.c)
Removed the test cases from
[neon-intrinsics.c](https://github.com/llvm/llvmproject/pull/clang/test/CodeGen/AArch64/neon/intrinsics.c)
Removed [neon-across.c](clang/test/CodeGen/AArch64/neon-across.c)
---------
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Added:
Modified:
clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
clang/test/CodeGen/AArch64/neon-intrinsics.c
clang/test/CodeGen/AArch64/neon/intrinsics.c
Removed:
clang/test/CodeGen/AArch64/neon-across.c
################################################################################
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index 31021170139fb..81f66727b251c 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -434,6 +434,9 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
case NEON::BI__builtin_neon_vqrshrund_n_s64:
case NEON::BI__builtin_neon_vqrshrnd_n_s64:
case NEON::BI__builtin_neon_vqrshrnd_n_u64:
+ case NEON::BI__builtin_neon_vmaxnmv_f32:
+ case NEON::BI__builtin_neon_vmaxnmvq_f32:
+ case NEON::BI__builtin_neon_vmaxnmvq_f64:
case NEON::BI__builtin_neon_vsrid_n_s64:
case NEON::BI__builtin_neon_vsrid_n_u64:
break;
diff --git a/clang/test/CodeGen/AArch64/neon-across.c b/clang/test/CodeGen/AArch64/neon-across.c
deleted file mode 100644
index f248e31b374ba..0000000000000
--- a/clang/test/CodeGen/AArch64/neon-across.c
+++ /dev/null
@@ -1,18 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
-// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
-
-// REQUIRES: aarch64-registered-target || arm-registered-target
-
-#include <arm_neon.h>
-
-
-// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmvq_f32
-// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: entry:
-// CHECK-NEXT: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> [[A]])
-// CHECK-NEXT: ret float [[VMAXNMVQ_F32_I]]
-//
-float32_t test_vmaxnmvq_f32(float32x4_t a) {
- return vmaxnmvq_f32(a);
-}
diff --git a/clang/test/CodeGen/AArch64/neon-intrinsics.c b/clang/test/CodeGen/AArch64/neon-intrinsics.c
index c4eac89e78bc1..34cdeb6a9e571 100644
--- a/clang/test/CodeGen/AArch64/neon-intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon-intrinsics.c
@@ -18720,26 +18720,6 @@ int64x1_t test_vneg_s64(int64x1_t a) {
return vneg_s64(a);
}
-// CHECK-LABEL: define dso_local double @test_vmaxnmvq_f64(
-// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VMAXNMVQ_F64_I:%.*]] = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> [[A]])
-// CHECK-NEXT: ret double [[VMAXNMVQ_F64_I]]
-//
-float64_t test_vmaxnmvq_f64(float64x2_t a) {
- return vmaxnmvq_f64(a);
-}
-
-// CHECK-LABEL: define dso_local float @test_vmaxnmv_f32(
-// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VMAXNMV_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> [[A]])
-// CHECK-NEXT: ret float [[VMAXNMV_F32_I]]
-//
-float32_t test_vmaxnmv_f32(float32x2_t a) {
- return vmaxnmv_f32(a);
-}
-
// CHECK-LABEL: define dso_local <2 x i64> @test_vpaddq_s64(
// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c
index efa2691ef611e..f3c1014a5613d 100644
--- a/clang/test/CodeGen/AArch64/neon/intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c
@@ -24,6 +24,41 @@
#include <arm_neon.h>
+//===------------------------------------------------------===//
+// 2.1.1.13.5 Maximum across vector (IEEE754)
+// https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#maximum-across-vector-ieee754
+//===------------------------------------------------------===//
+
+//ALL-LABEL: @test_vmaxnmv_f32(
+float32_t test_vmaxnmv_f32(float32x2_t a) {
+ //CIR: cir.call @vmaxnmv_f32
+
+ // LLVM-SAME: <2 x float> {{.*}} [[A:%.*]])
+ // LLVM: [[VMAXNMV_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> [[A]])
+ // LLVM: ret float [[VMAXNMV_F32_I]]
+ return vmaxnmv_f32(a);
+}
+
+// ALL-LABEL: @test_vmaxnmvq_f32(
+float32_t test_vmaxnmvq_f32(float32x4_t a) {
+ //CIR: cir.call @vmaxnmvq_f32
+
+ // LLVM-SAME: <4 x float> {{.*}}[[A:%.*]])
+ // LLVM: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> [[A]])
+ // LLVM: ret float [[VMAXNMVQ_F32_I]]
+ return vmaxnmvq_f32(a);
+}
+
+// ALL-LABEL: @test_vmaxnmvq_f64(
+float64_t test_vmaxnmvq_f64(float64x2_t a) {
+ //CIR: cir.call @vmaxnmvq_f64
+
+ // LLVM-SAME: <2 x double> {{.*}}[[A:%.*]])
+ // LLVM: [[VMAXNMVQ_F64_I:%.*]] = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> [[A]])
+ // LLVM: ret double [[VMAXNMVQ_F64_I]]
+ return vmaxnmvq_f64(a);
+}
+
//===------------------------------------------------------===//
// 2.1.3.2.7 Vector saturating rounding shift right and narrow
// TODO: Implement SISD variants
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