[clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 lookup table intrinsics (PR #187046)

[Jonathan Thackray via cfe-commits]

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@@ -11415,26 +11415,48 @@ multiclass sve2_luti4_vector_vg2_index<string mnemonic> {
 }
 
 // Look up table read with 6-bit indices
-multiclass sve2_luti6_vector_index<string mnemonic> {
+multiclass sve2_luti6_vector_index<string mnemonic, SDPatternOperator intrinsic> {
   def _H : sve2_lut_vector_index<ZPR16, ZZ_h, VectorIndexD32b, 0b1011, mnemonic> {
     bit idx;
     let Inst{23} = idx;
   }
+
+  def : Pat<(nxv8i16 (intrinsic nxv8i16:$Op1, nxv8i16:$Op2,
+                      nxv16i8:$Op3, (i32 timm32_0_1:$Op4))),
+            (nxv8i16 (!cast<Instruction>(NAME # _H) (REG_SEQUENCE ZPR2, nxv8i16:$Op1, zsub0,
+                                                                      nxv8i16:$Op2, zsub1),
+                                                nxv16i8:$Op3, timm32_0_1:$Op4))>;
+  def : Pat<(nxv8f16 (intrinsic nxv8f16:$Op1, nxv8f16:$Op2,
+                      nxv16i8:$Op3, (i32 timm32_0_1:$Op4))),
+            (nxv8f16 (!cast<Instruction>(NAME # _H) (REG_SEQUENCE ZPR2, nxv8f16:$Op1, zsub0,
+                                                                      nxv8f16:$Op2, zsub1),
+                                                nxv16i8:$Op3, timm32_0_1:$Op4))>;
+  def : Pat<(nxv8bf16 (intrinsic nxv8bf16:$Op1, nxv8bf16:$Op2,
+                       nxv16i8:$Op3, (i32 timm32_0_1:$Op4))),
+            (nxv8bf16 (!cast<Instruction>(NAME # _H) (REG_SEQUENCE ZPR2, nxv8bf16:$Op1, zsub0,
+                                                                        nxv8bf16:$Op2, zsub1),
+                                                 nxv16i8:$Op3, timm32_0_1:$Op4))>;
 }
 
 // Look up table
-class sve2_luti6_vector<string mnemonic>
-    : I<(outs ZPR8:$Zd), (ins ZZ_b:$Zn, ZPRAny:$Zm),
-      mnemonic, "\t$Zd, $Zn, $Zm",
-      "", []>, Sched<[]> {
-  bits<5> Zd;
-  bits<5> Zn;
-  bits<5> Zm;
-  let Inst{31-21} = 0b01000101001;
-  let Inst{20-16} = Zm;
-  let Inst{15-10} = 0b101011;
-  let Inst{9-5}   = Zn;
-  let Inst{4-0}   = Zd;
+multiclass sve2_luti6_vector<string mnemonic, SDPatternOperator intrinsic> {
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jthackray wrote:

Yes, done.

https://github.com/llvm/llvm-project/pull/187046