[clang] [llvm] [AMDGPU] Add async variants of tensor load/store LDS intrinsics. (PR #200775)

Matt Arsenault via cfe-commits cfe-commits at lists.llvm.org
Wed Jun 3 04:59:11 PDT 2026


arsenm wrote:

> This "convention" that intrinsics should correspond to instructions is severely outdated. It is from a time when all we did was expose ISA to LLVM IR. We have moved beyond that, where we use intrinsics to represent semantics rather than instructions. 

We have not and cannot move away from this. The backend's job is not to provide high level semantics, and we cannot guarantee high level semantics especially when the hardware so frequently rug pulls the underlying behavior. The backend is not supposed to be the end-all-be-all provider of everything, we should have far more code moved out of the compiler and into libraries 

https://github.com/llvm/llvm-project/pull/200775


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