[clang] [CIR] vector-saturating-left vqshl_*/ vqshlu_* (PR #199153)
Kartik Ohlan via cfe-commits
cfe-commits at lists.llvm.org
Tue Jun 2 22:00:47 PDT 2026
https://github.com/Ko496-glitch updated https://github.com/llvm/llvm-project/pull/199153
>From 3db9ed41e03169e4160d64c4a6f877a8855c9762 Mon Sep 17 00:00:00 2001
From: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: Thu, 21 May 2026 22:35:27 -0400
Subject: [PATCH 1/3] added implementation vqshl/vqshlq -- vqshlu/vqshluq
---
.../lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 23 +++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index a06b76d453d48..f65cb8a09e244 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -878,10 +878,6 @@ static mlir::Value emitCommonNeonBuiltinExpr(
case NEON::BI__builtin_neon_vqdmulh_laneq_v:
case NEON::BI__builtin_neon_vqrdmulhq_laneq_v:
case NEON::BI__builtin_neon_vqrdmulh_laneq_v:
- case NEON::BI__builtin_neon_vqshl_n_v:
- case NEON::BI__builtin_neon_vqshlq_n_v:
- case NEON::BI__builtin_neon_vqshlu_n_v:
- case NEON::BI__builtin_neon_vqshluq_n_v:
case NEON::BI__builtin_neon_vrecpe_v:
case NEON::BI__builtin_neon_vrecpeq_v:
case NEON::BI__builtin_neon_vrsqrte_v:
@@ -911,6 +907,25 @@ static mlir::Value emitCommonNeonBuiltinExpr(
std::string("unimplemented AArch64 builtin call: ") +
ctx.BuiltinInfo.getName(builtinID));
return mlir::Value{};
+ case NEON::BI__builtin_neon_vqshlu_n_v:
+ case NEON::BI__builtin_neon_vqshluq_n_v: {
+ llvm::StringRef intrName = "aarch.neon.sqshlu";
+ return emitNeonCall(cgf.cgm, cgf.getBuilder(),
+ {ty, getSignChangedVectorType(cgf.getBuilder(), ty)},
+ ops, intrName, ty, loc,
+ /*isConstrainedFPIntrinsic=*/false,
+ /*shift=*/1);
+ }
+ case NEON::BI__builtin_neon_vqshl_n_v:
+ case NEON::BI__builtin_neon_vqshlq_n_v: {
+ llvm::StringRef intrName =
+ usgn ? "aarch64.neon.uqshl" : "aarch64.neon.sqshl";
+ return emitNeonCall(
+ cgf.cgm, cgf.getBuilder(),
+ {ty, usgn ? getSignChangedVectorType(cgf.getBuilder(), ty) : ty}, ops,
+ intrName, ty, loc, /*isConstrainedFPIntrinsic=*/false,
+ /*shift=*/1);
+ }
case NEON::BI__builtin_neon_vshl_n_v:
case NEON::BI__builtin_neon_vshlq_n_v:
return emitCommonNeonShift(cgf.getBuilder(), loc, vTy, ops[0], ops[1],
>From 1193e7a3c834dcb7cb9ff7b2a88dcc0209c5674c Mon Sep 17 00:00:00 2001
From: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: Tue, 2 Jun 2026 21:31:47 -0700
Subject: [PATCH 2/3] added revisions
---
.../lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 42 ++++++++++---------
1 file changed, 23 insertions(+), 19 deletions(-)
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index f65cb8a09e244..08f49888de651 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -878,6 +878,29 @@ static mlir::Value emitCommonNeonBuiltinExpr(
case NEON::BI__builtin_neon_vqdmulh_laneq_v:
case NEON::BI__builtin_neon_vqrdmulhq_laneq_v:
case NEON::BI__builtin_neon_vqrdmulh_laneq_v:
+ cgf.cgm.errorNYI(expr->getSourceRange(),
+ std::string("unimplemented AArch64 builtin call: ") +
+ cgf.getContext().BuiltinInfo.getName(builtinID));
+ return mlir::Value{};
+ case NEON::BI__builtin_neon_vqshl_n_v:
+ case NEON::BI__builtin_neon_vqshlq_n_v: {
+ llvm::StringRef intrName =
+ usgn ? "aarch64.neon.uqshl" : "aarch64.neon.sqshl";
+ return emitNeonCall(
+ cgf.cgm, cgf.getBuilder(),
+ {ty, usgn ? getSignChangedVectorType(cgf.getBuilder(), ty) : ty}, ops,
+ intrName, ty, loc, /*isConstrainedFPIntrinsic=*/false,
+ /*shift=*/1);
+ }
+ case NEON::BI__builtin_neon_vqshlu_n_v:
+ case NEON::BI__builtin_neon_vqshluq_n_v: {
+ llvm::StringRef intrName = "aarch.neon.sqshlu";
+ return emitNeonCall(cgf.cgm, cgf.getBuilder(),
+ {ty, getSignChangedVectorType(cgf.getBuilder(), ty)},
+ ops, intrName, ty, loc,
+ /*isConstrainedFPIntrinsic=*/false,
+ /*shift=*/1);
+ }
case NEON::BI__builtin_neon_vrecpe_v:
case NEON::BI__builtin_neon_vrecpeq_v:
case NEON::BI__builtin_neon_vrsqrte_v:
@@ -907,25 +930,6 @@ static mlir::Value emitCommonNeonBuiltinExpr(
std::string("unimplemented AArch64 builtin call: ") +
ctx.BuiltinInfo.getName(builtinID));
return mlir::Value{};
- case NEON::BI__builtin_neon_vqshlu_n_v:
- case NEON::BI__builtin_neon_vqshluq_n_v: {
- llvm::StringRef intrName = "aarch.neon.sqshlu";
- return emitNeonCall(cgf.cgm, cgf.getBuilder(),
- {ty, getSignChangedVectorType(cgf.getBuilder(), ty)},
- ops, intrName, ty, loc,
- /*isConstrainedFPIntrinsic=*/false,
- /*shift=*/1);
- }
- case NEON::BI__builtin_neon_vqshl_n_v:
- case NEON::BI__builtin_neon_vqshlq_n_v: {
- llvm::StringRef intrName =
- usgn ? "aarch64.neon.uqshl" : "aarch64.neon.sqshl";
- return emitNeonCall(
- cgf.cgm, cgf.getBuilder(),
- {ty, usgn ? getSignChangedVectorType(cgf.getBuilder(), ty) : ty}, ops,
- intrName, ty, loc, /*isConstrainedFPIntrinsic=*/false,
- /*shift=*/1);
- }
case NEON::BI__builtin_neon_vshl_n_v:
case NEON::BI__builtin_neon_vshlq_n_v:
return emitCommonNeonShift(cgf.getBuilder(), loc, vTy, ops[0], ops[1],
>From 38a3b5d5d8beb7f641cfa6e78e4d9bb9b4b0f153 Mon Sep 17 00:00:00 2001
From: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: Tue, 2 Jun 2026 22:00:26 -0700
Subject: [PATCH 3/3] adding test-cases
---
clang/test/CodeGen/AArch64/neon-intrinsics.c | 22 --------------------
clang/test/CodeGen/AArch64/neon/intrinsics.c | 22 ++++++++++++++++++++
2 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/clang/test/CodeGen/AArch64/neon-intrinsics.c b/clang/test/CodeGen/AArch64/neon-intrinsics.c
index c4eac89e78bc1..aa01013d12615 100644
--- a/clang/test/CodeGen/AArch64/neon-intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon-intrinsics.c
@@ -14263,16 +14263,6 @@ int32_t test_vqshls_n_s32(int32_t a) {
return (int32_t)vqshls_n_s32(a, 31);
}
-// CHECK-LABEL: define dso_local <8 x i8> @test_vqshl_n_s8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[VQSHL_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[A]], <8 x i8> zeroinitializer)
-// CHECK-NEXT: ret <8 x i8> [[VQSHL_N]]
-//
-int8x8_t test_vqshl_n_s8(int8x8_t a) {
- return vqshl_n_s8(a, 0);
-}
-
// CHECK-LABEL: define dso_local <16 x i8> @test_vqshlq_n_s8(
// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
@@ -14283,18 +14273,6 @@ int8x16_t test_vqshlq_n_s8(int8x16_t a) {
return vqshlq_n_s8(a, 0);
}
-// CHECK-LABEL: define dso_local <4 x i16> @test_vqshl_n_s16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>
-// CHECK-NEXT: [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
-// CHECK-NEXT: [[VQSHL_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[VQSHL_N]], <4 x i16> zeroinitializer)
-// CHECK-NEXT: ret <4 x i16> [[VQSHL_N1]]
-//
-int16x4_t test_vqshl_n_s16(int16x4_t a) {
- return vqshl_n_s16(a, 0);
-}
-
// CHECK-LABEL: define dso_local <8 x i16> @test_vqshlq_n_s16(
// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c
index efa2691ef611e..90509ce1b4b3e 100644
--- a/clang/test/CodeGen/AArch64/neon/intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c
@@ -459,6 +459,28 @@ float64_t test_vmaxvq_f64(float64x2_t a) {
// TODO: Implement the remaining intrinsics from this group.
//===------------------------------------------------------===//
+// ALL-LABEL: @test_vqshl_n_s8(
+int8x8_t test_vqshl_n_s8(int8x8_t a) {
+ //CIR: cir.call_llvm_intrinsic "aarch64.neon.sqshl"
+
+ // LLVM-SAME: <8 x i8> {{.*}} [[A:%.*]])
+ // LLVM: [[VQSHL_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[A]], <8 x i8> zeroinitializer)
+ // LLVM: ret <8 x i8> [[VQSHL_N]]
+ return vqshl_n_s8(a, 0);
+}
+
+// ALL-LABEL: @test_vqshl_n_s16(
+int16x4_t test_vqshl_n_s16(int16x4_t a) {
+ //CIR: cir.call_llvm_intrinsic "aarch64.neon.sqshl"
+ //
+ // LLVM-SAME: <4 x i16> {{.*}} [[A:%.*]])
+ // LLVM: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>
+ // LLVM: [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
+ // LLVM: [[VQSHL_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[VQSHL_N]], <4 x i16> zeroinitializer)
+ // LLVM: ret <4 x i16> [[VQSHL_N1]]
+ return vqshl_n_s16(a, 0);
+}
+
// ALL-LABEL: @test_vqshlud_n_s64(
int64_t test_vqshlud_n_s64(int64_t a) {
// CIR: [[CONST:%.*]] = cir.const #cir.int<63> : !s64i
More information about the cfe-commits
mailing list