[clang] [llvm] [RISC-V][MC] Introduce initial support for RVY (CHERI) (PR #199771)

[Craig Topper via cfe-commits]

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@@ -0,0 +1,169 @@
+//===-- RISCVInstrInfoY.td - RISCV instructions -------------*- tblgen-*---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the RISC-V instructions from the standard 'Base Y'
+// Packed SIMD instruction set extension.
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topperc wrote:

"Packed SIMD"?

https://github.com/llvm/llvm-project/pull/199771